National Institute of Technology, Meghalaya

About: National Institute of Technology, Meghalaya is a education organization based out in Shillong, India. It is known for research contribution in the topics: Control theory & Electric power system. The organization has 503 authors who have published 1062 publications receiving 6818 citations. The organization is also known as: NIT Meghalaya & NITM.

Improving Identity Privacy in 3GPP-WLAN

Abstract: The mobile telephony system has become popular due to its wide coverage, resulting in near-universal roaming service to its subscribers. However, when it comes to data transfer rates, the WLANs lead the way. WLANs have much restricted hot-spot coverage compared to mobile telephony systems, but provide better data rates at lower costs. Combining the two, results in best of both the worlds. Thus, 3GPP has proposed 3GPP-WLAN architecture to bring in this synergy between the two systems. From the subscriber’s perspective, one of the issues to be taken care of is “identity privacy”—how the identity of the subscriber be hidden from the eavesdroppers wanting to track the subscriber. 3GPP has devised a scheme for taking care of this in 3GPP-WLAN, which is different from that followed in other 3GPP systems. However, the said scheme does have certain vulnerabilities, and cannot guarantee the desired privacy. In this paper, we put forward an extension to the existing scheme to take care of these vulnerabilities. Also, this can be implemented without changes to intermediary networks or components, allowing for an easier transition.

Doppler velocity measurement using closed-loop Goertzel algorithm in PLL technique

Abstract: A closed-loop comb-Goertzel algorithm in phase-locked loop technique is proposed for non-contact method of Doppler velocity extraction from a moving object. The Goetrzel algorithm is an efficient Discrete Fourier Transform (DFT) where the system complexity reduces from normal Sliding-DFT (SDFT) algorithm by inserting zero/pole in the system function. Stability is improved by introducing a damping factor that allows the system poles to lie within the unit circle z-plane. The algorithm is implemented in phase locking design to enhance the sampling control adaptively. The simulation and experimental investigations show less errors even in large noise condition.

Area Efficient & High Performance Word Line Segmented Architecture in 7nm FinFET SRAM Compiler

Abstract: In 7nm TSMC FinFET nodes, metal resistance plays a critical role in achieving the best performance in SRAM design. Random variations and interconnect RC delay is increased due to the continual scaling of physical dimensions, which seriously degrades SRAM performance. In 7nm, it is being observed that Word line (WL) and Bit line resistance limits SRAMs to achieve the speed scaling that technology offers at SoC and Standard Cell library design level. Word line resistance plays a vital role in achieving better access time and operating frequency specifications. This paper proposes a High-Performance Word line segmented architecture that segments a wider memory array with minimum area impact. Based on the simulation results for a 7nm High Density, Single Port SRAM compiler, it was observed that the proposed architecture improved access time by 20% and operating frequency by 15%. Improved Word line RC also improves performance at high voltages when Read Assist (Word line underdrive) is enabled.

Anti-Synchronisation of Vallis Chaotic Systems using Nonlinear Active Control Technique Quantitative Features of El-Nino Southern Oscillation (ENSO) Phenomenon

Abstract: In this paper, anti-synchronisation of Vallis chaotic systems is reported. Vallis chaotic system represents the fluctuation of surface temperatures in the east and west part of the Equatorial Ocean and a wind driven current advecting temperature field. A nonlinear active control technique is used to achieve the anti-synchronisation of Vallis chaotic systems. The modified nonlinear active control laws are derived by using sum of the relevant variables of the master and slave systems. Required Lyapunov stability condition is derived to ensure the asymptotic stability of the error dynamics. MATLAB simulation results are presented and reflect that the proposed objective is achieved successfully.