National Institute of Technology, Meghalaya

About: National Institute of Technology, Meghalaya is a education organization based out in Shillong, India. It is known for research contribution in the topics: Control theory & Electric power system. The organization has 503 authors who have published 1062 publications receiving 6818 citations. The organization is also known as: NIT Meghalaya & NITM.

Machining of thin sections using multi-pass wire electrical discharge machining process

Abstract: The increasing application of fine metallic sections in various sophisticated areas has led to the growth of advanced machining technique to produce thin metallic sections. Wire electrical discharge machining process can prove to be an effective means to machine such sections. The current work identifies the thin wall machining of H13 tool steel using Taguchi's design. An optimal parametric setting is identified using a regression model for lower kerf width (kf) and higher machining rate. The decrease in kf and increase in machining rate is found to be highly dominated by the variation of the input parametric conditions. Machining of thin wall sections is performed to identify the extent of minimum sections that can be machined. A mesh-like structure is observed with wall thickness of less than 80 μm. Further, to improve the surface and edge characteristics, multi pass trimming process is incorporated.

Design of a bio-inspired CMOS circuit realizing features of binocular rivalry between left and right eye

Abstract: This paper is an attempt to realize a unique feature of visual brain on CMOS circuit. There is a binocular rivalry phenomenon of visual brain in which, if two different images are shown to left and right eye then they compete for perceptual dominance such that one image become visible while the other get suppressed. Thus inspired from the concepts of neuromorphic and bio-inspired computing circuits, we would like to explain various features of binocular rivalry (BR) using Adaptive Winner Takes All (WTA) CMOS circuit. The application of this work lies in the fact that CMOS circuit can be implanted in the robot brain and hence opens a window in the area of artificial intelligence. The circuit is simulated using BSIM3 level 49 MOSFET models using T-Spice 0.35μm CMOS process. The key structure is an electronic synapse which is based around a floating-gate pFET. Thus the simulated results of the circuit depict two main features of binocular rivalry i.e., dominance and suppression of images and neural adaption. The circuit consumes 0.4mW total power, shows thermal stability of about 1.23μA/°C and occupies 25μm×20 μm chip area. Moreover a third and remarkable feature in BR is focused attention, which may considerably influence the binocular rivalry switching and can be attained using meditation. We would like to modify the circuit with additional, control of adaption at floating gate, circuitry to realize the later feature as well. The paper catered the later feature in future work.

Development of 1-ph hybrid active power filter with an efficient FPGA platform for power conditioning

Abstract: This paper deals with an advanced digital method to design the control algorithm for a single phase Hybrid Active Power Filter which shows a great promise in reducing harmonics and improvement in power quality. Major point of discussion in this paper includes principle of operation of Hybrid Active Power Filter (HAPF) with an efficient control algorithm for generation of the reference current. Generated reference currents are passed through the fixed band hysteresis current controller to produce switching signals for the Insulated Gate Bipolar Transistor (IGBTs) of the Hybrid Active Power Filter. Hybrid Active Power Filter is the combination of Passive Power Filter (PPF) and Active Power Filter (APF) responsible for producing opposite phase signals for compensation of the harmonics. The considered system is developed in Matlab/Simulink environment using Power system block set and the control algorithm is developed using Xilinx System Generator block set which automatically generates HDL code and can be downloaded to FPGA (Field programmable gate array) kit which is capable of producing faster switching signals for the IGBTs resulting a very good acceptable Total Harmonic Distortion (THD).

Implementation of OFDM and Pulsed-OFDM

Abstract: This work undertaken, aims to develop pulsed-OFD transmission system, which is used in wide area of wireless communications. It is noteworthy to mention that the system is baseband transmission by excluding the RF (radio frequency) part. Pulsed-OFDM enhances the OFDM that endeavors prominent performance parameters with lesser complexity in implementation. This is possible by pulsating the OFDM symbols and spreading the frequency spectrum of the modulated signals. In this paper the implementation of the pulsed-OFDM transmission, as well as comparison results with OFDM have been presented. Focus is on the architectural characteristics of the system blocks which are used for transmission and reception. In this paper up-sampling is applied to the OFDM signal to induce the pulsed-OFDM signal. Finally, the performance of the system has been analyzed.

An idea of implementing CMOS operational amplifier in summer configuration for the designing of highly sensitive pressure transducer

Abstract: This work presents the designing and simulation of a piezoresistive pressure transducer using an operational amplifier (op-amp) in summer configuration for higher pressure sensitivity. Piezoresistors placed on high-stress regions of the square silicon diaphragm are used as the sensing elements that detect the variation in the resistance of piezoresistors under an applied pressure range of 0-1 MPa in a step size of 100 KPa. An operational amplifier circuit has been designed using five micron CMOS technology parameters in T-Spice simulation tool. A non-inverting op-amp in summer configuration has been used as the readout circuit of the pressure transducer which converts the resistance variation of piezoresistors into output voltage. The Intellisuite software has been used to simulate the analytical model which describes the complete behavior of the pressure transducer employing both p-type and n-type piezoresistors as the sensing elements. Simulation result clearly shows that the op-amp in summer configuration based pressure transducer using p-type and n-type piezoresistors have a sensitivity of 187 mV/MPa and 1047 mV/MPa, respectively.