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Showing papers by "NEC published in 1976"


Proceedings ArticleDOI
Y. Takayama1
14 Jun 1976
TL;DR: In this paper, a novel method for microwave power transistor load-pull characterization is presented, where both input and output ports of a test transistor are simultaneously driven by external signals at the same specified frequency.
Abstract: A novel method for microwave power transistor load-pull characterization is presented. The method provides an equivalent load-pull measurement technique without using an output impedance tuner. In this method, both input and output ports of a test transistor are simultaneously driven by external signals at the same specified frequency. Results of its application to a medium-power GaAs FET are given.

240 citations


Journal ArticleDOI
R. Lang1, K. Kobayashi1
TL;DR: In this article, a GaAs injection laser was proposed as a method for suppressing the relaxation oscillation of the light intensity in the cavity modes of a semiconductor laser under constant injection of external radiation into the cavity mode.
Abstract: Practical rates of direct pulse modulation of semiconductor lasers have so far been limited to below several hundred megahertz, owing to serious distortion in the output signal caused by the relaxation oscillation of the light intensity. Based on theoretical analysis of the dynamic properties of lasing under constant injection of external radiation into the cavity modes, light injection is proposed as a method for suppressing the relaxation oscillation. The effectiveness of this method has been confirmed in a series of preliminary experiments which employed GaAs injection lasers both as the modulated laser and as the external source of the injected radiation.

95 citations


Journal ArticleDOI
TL;DR: In this article, the problem of finding a minimal triangulation of an undirected graph G = (V, E) is considered, and an algorithm for finding an optimal ordering α which produces a minimal set of "fill-in" is presented.

78 citations


Patent
Kyo Kinoshita1
22 Jun 1976
TL;DR: In this article, a space diversity receiving system is described which eliminates the low frequency phase modulation component at the intermediate frequency stage output, and the received signals from two antennae are converted to intermediate frequency signals and then combined after one signal has been passed through a variable phase shifter.
Abstract: A space diversity receiving system is described which eliminates the low frequency phase modulation component at the intermediate frequency stage output. Received signals from two antennae are converted to intermediate frequency signals and then combined after one signal has been passed through a variable phase shifter. Branching amplifiers are provided in each intermediate frequency channel so that all phase modulation, phase detection and production of the control signal necessary for controlling the variable phase shifter are achieved outside of all main intermediate frequency channels that are to be combined to obtain an intermediate frequency output.

74 citations


Patent
Masahiro Yanagisawa1, Yoji Suganuma1
22 Oct 1976
TL;DR: In this article, a lubricant is applied to the magnetic storage layer and serves to reduce wearing due to frictional drag between the disc and a cooperating magnetic head (or heads).
Abstract: Magnetic storage means which may be a disc having a magnetic storage layer coated with a protective layer. The protective layer, which is preferably an inorganic oxide material, protects the magnetic storage layer from corrosion. A lubricant is applied to the protective layer and serves to reduce wearing due to frictional drag between the disc and a cooperating magnetic head (or heads). The lubricant is oriented so as to make very good adherence with the oxide sublayer and thereby prevent removal of the lubricant through continued use and/or cleaning.

68 citations


Patent
Hiroaki Sakoe1
21 Dec 1976
TL;DR: In this paper, a speech pattern recognition system for continuous speech is described, which includes calculating means which calculates similarity measures between an input pattern and all of the series of patterns including reference word-patterns arranged in all possible orders through a pattern matching process without resorting to a segmentation process.
Abstract: A speech pattern recognition system for continuous speech is disclosed. The system includes calculating means which calculates similarity measures between an input pattern and all of the series of patterns including reference word-patterns arranged in all possible orders through a pattern matching process without resorting to a segmentation process. The reference pattern which provides the maximum similarity measure is adopted as the recognized result.

51 citations


Journal ArticleDOI
T. Horiguchi, K. Morita1
TL;DR: A few new modulation codes in digital magnetic recording is presented and one of the new codes shows the highest linear density limit among the existing codes and is improved over, for example, MFM and 4/5-rate-NRZI codes by about 20% to 30% in the density limit for the channel.
Abstract: A few new modulation codes(or run-length-limited codes) in digital magnetic recording is presented. Linear density limits of the new codes and the existing codes are evaluated for a typical recording channel. One of the new codes shows the highest linear density limit among the existing codes and is improved over, for example, MFM and 4/5-rate-NRZI codes by about 20% to 30% in the density limit for the channel. A method for constructing the new codes is presented.

48 citations


Patent
Yujiro Ishikawa1, Kyo Kinoshita1
05 Jan 1976
TL;DR: In this paper, a level detection circuit provides a pair of voltages representative of the levels of the received signals, the outputs of the level detector are compared to determine which one is at a higher level, and a switching circuit selectively leads the higher level one of received signals to an output terminal of the receiving system.
Abstract: A diversity receiving system having a hysteresis switching characteristic has first and second signal receiver portions supplied with at least one radio frequency signal for producing a pair of received signals, a level detection circuit provides a pair of voltages representative of the levels of the received signals, the outputs of the level detection circuit are compared to determine which one is at a higher level, a switching circuit selectively leads the higher level one of the received signals to an output terminal of the receiving system, and the level of the higher level one of the received signals is raised with respect to the lower level one which has not been led to said output terminal. In the present system, the higher level signal is selected while the reference level for detection with respect to the higher level signal is relatively lowered so that the higher level signal is more stably selected. Then, if the input signal of the unselected receiver is later selected, the reference level for detection thereof is relatively lowered. This results in alternate lowering of the reference level for detection at the detection circuit. As a result, the frequency of the switch-over is reduced while the reception is equally shared by the two receivers, maintaining the high quality of reception.

45 citations


Patent
Mitani Toshihiko1
02 Jun 1976
TL;DR: In this paper, a 2N-phase carrier pulse sequence is converted into a 3N-level N'ary code sequence, where N = 2 n, n being a positive integer, and the carrier signal is given in each carrier pulse a phase selected in the manner specified.
Abstract: A novel modulator converts a sequence of N'ary codes representative of an element P of a set (0, 1, 2, . . . , N - 1) into a sequence of 2N-phase carrier pulses, where N = 2 n , n being a positive integer. A phase shift in the carrier signal between each carrier pulse and the next preceding one is selected from Pπ/N and (P + N)π/N in compliance with a prescribed law of correlation between the N'ary codes in the sequence. Alternatively, the carrier signal is given in each carrier pulse a phase selected in the manner specified. For convenience of resorting to the prescribed correlation law, the N'ary code sequence may be converted into N trains, corresponding to the respective elements P, of three-level signals, 0 and ±1. In the train corresponding to a particular element, the three-level signals are successively produced with the prescribed correlation law, such as with resort to a bipolar or duobinary technique. A novel demodulator converts the 2N-phase carrier pulse sequence into the original N'ary code sequence.

41 citations


Journal ArticleDOI
T. Irie1, I. Nagasako1, H. Kohzu1, K. Sekido1
TL;DR: In this article, a small-signal GaAs MESFET with a 1mu m aluminum gate was studied and three major failure modes were revealed, i.e., gradual degradation due to source and drain contact degradation, catastrophic damage due to surge pulse, and instability or reversible drift of electrical characteristics during operation.
Abstract: Failure modes have been studied phenomenologically on a small-signal GaAs MESFET with a 1mu m aluminum gate. Three major failure modes have been revealed, i.e., gradual degradation due to source and drain contact degradation, catastrophic damage due to surge pulse, and instability or reversible drift of electrical characteristics during operation. To confirm the product quality and to assure the device reliability, a quality assurance program has been designed and incorporated in a production line. A cost-effective lifetime prediction method is presented that utilizes correlations between RF parameters and dc parameters calculated using an equivalent circuit model. Mean time to failure (MTTF) value of over 10/sup 8/ h has been obtained for the GaAs MESFET for an operating channel temperature of 100/spl deg/C.

39 citations


Patent
Hiroaki Sakoe1
01 Nov 1976
TL;DR: In this article, a continuous speech recognition system comprises a word number specifier for specifying, as the number of continuously spoken words or words, either a single integer or a set of different integers.
Abstract: A continuous speech recognition system comprises a word number specifier for specifying, as the number of continuously spoken word or words, either a single integer or a set of different integers. The single integer may be manually or automatically adjusted. In compliance with the specified word number or numbers, the system carries out pattern matching between an input pattern representative of the spoken word or words and a predetermined number of reference patterns. The matching may be carried into effect by dynamic programming. The input pattern is recognized to be one of the reference patterns or to be a concatenation of some or all of the reference patterns, equal in number either to the single integer or to one of the different integers.

Patent
Tomoyuki Isono1, Toshio Nakada1
22 Apr 1976
TL;DR: In this paper, a pre-scanning apparatus was used to detect the position on a mail item of a postal code and its position can be sent to the main scanner and recognition circuitry.
Abstract: A postal code detection system is described having a prescanning apparatus operable to detect the position on a mail item of a postal code The pre-scanning apparatus detects word length, character height of each word, and word position Based on the latter detected information and on a set of predetermined rules of postal code placement, the postal code can be identified to the exclusion of all other words on the mail item, and its position can be identified and sent to the main scanner and recognition circuitry

Patent
Teiji Uchida1, Atsufumi Ueki1
20 Apr 1976
TL;DR: In this article, an improved lightmode separator for orientation in axially offset adjacency to an end of an optical fiber, in a plane perpendicular to the fiber axis, is proposed.
Abstract: The invention contemplates an improved light-mode separator for orientation in axially offset adjacency to an end of an optical fiber, in a plane perpendicular to the fiber axis; separate concentric regions of the separator about the fiber axis have different light-converging properties such that the convergence point for each light-converging region is (a) offset with respect to the convergence point for each remaining light-converging region, and is also (b) independently externally accessible for focused-energy utilization without masking interference with any other converging light from the separator.

Patent
Ishiguro Tatsuo1
08 Apr 1976
TL;DR: In this article, the coding error occurring in the interframe coding process is effectively corrected by low-bit intraframe coding with limited increase in the volume of coding information, which permits raising the significance determination threshold value without impairment of picture quality.
Abstract: A television signal encoder uses correlation between frames for data compression or reduction in redundancy of information to be transmitted. The coding error occurring in the interframe coding process is effectively corrected by low-bit intraframe coding with limited increase in the volume of coding information. This permits raising the significance determination threshold value without impairment of picture quality.

Patent
Susumu Sato1, Hideo Tsunemitsu1
09 Jun 1976
TL;DR: In this paper, the bump terminal is characterized by improved mechanical strength for gang bonding, which is a step-like profile of the metal layers of a bump terminal for a semiconductor device.
Abstract: A terminal electrode for a semiconductor device includes a bump terminal comprising first, second, and third metal layers producing a step-like profile. The bump terminal is characterized by improved mechanical strength for gang bonding.

Patent
Ikeda Kiyoshi1, Toshihiko Mitani1
17 Feb 1976
TL;DR: In this paper, a baseband signal switching arrangement for diversity reception in a PCM communication system is described, characterized by the provision of a 1/n write-in frequency-dividing counter in each receiving channel to count clock signals in response to being reset by a frame signal.
Abstract: A baseband signal switching arrangement for diversity reception in a PCM communication system is disclosed. The switching arrangement is characterized by the provision of a 1/n write-in frequency-dividing counter in each receiving channel to count clock signals in response to being reset by a frame signal and n buffer memory circuits for successively writing bit information of a received digital signal in response to the n frequency-divided outputs of the 1/n frequency-dividing counter. The switching arrangement further includes a 1/n read-out frequency-dividing counter which is adapted to successively read out memory outputs of one set of the n buffer memory circuits and a switching means for enabling the 1/n read-out frequency-dividing counter to selectively read out memory outputs of a given set of buffer memory circuits.

Patent
Kunihiko Niwa1
18 Jun 1976
TL;DR: An FFT processing unit of simplified construction comprises one or more arithmetic stages serially connected, each stage has a plurality of recursive arithmetic paths each consisting of a delay element, a simplified multiplier for multiplying by ±1 and ±j where j = √-1, and an adder as mentioned in this paper.
Abstract: An FFT processing unit of simplified construction comprises one or more arithmetic stages serially connected. Each stage has a plurality of recursive arithmetic paths each consisting of a delay element, a simplified multiplier for multiplying by ±1 and ±j where j = √-1, and an adder. The adder is supplied with a serial input digital data series and the output is provided to the delay element and multiplier connected in series. A switch successively selects the output signals obtained from the plurality of recursive arithmetic paths. A second multiplier multiplies the signals selected by the switch by predetermined coefficients.

Journal ArticleDOI
Yoshito Ueno1, Motoh Shimizu1
TL;DR: An optical pulse reflection method based on the optical radar principle is discussed for optical fiber cable fault location and the optical reflection coefficient at flat surfaces of optical fibers was measured and found to be in good agreement with calculated value.
Abstract: An optical pulse reflection method based on the optical radar principle is discussed for optical fiber cable fault location. The optical reflection coefficient at flat surfaces of optical fibers was measured and found to be in good agreement with calculated value. The average reflection coefficient at fractures in optical fibers, which were generated by simple tensile stress, was about 0.5%. The reflected pulse signal from an optical fiber fault at a distance of 1.4 km in a selfoc fiber having transmission loss of 17 dB/km was detected experimentally.

Journal ArticleDOI
H. Muta1, S. Suzuki, K. Yamada, Y. Nagahashi, T. Tanaka, H. Okabayashi, N. Kawamura 
TL;DR: In this article, a high-speed and low-power femto-joule logic circuit was developed by using an enhancement-type Schottky barrier gate FET (ESBT) with31P implanted channel layer.
Abstract: As an approach to an advanced LSI logic, a high-speed and low-power femto-joule logic circuit has been developed by using an enhancement-type Schottky barrier gate FET (ESBT) with31P implanted channel layer. A direct coupled transistor logic (DCTL) was designed using ESBT and resistor as a basic logic circuit. To evaluate the dynamic performance of the logic circuit, a 15-stage ring oscillator with an output buffer was integrated on a chip. A power-delay product was found in the femto-joule range. The logic swing is about 0.4 V and typical noise margin is 30 percent of the logic swing. A high-speed (40 ns) and low-power (10 mW) 4 bit ALU has been developed by using DCTL, NOR gates. Furthermore, improving ESBT channel layer carrier profile to the higher carrier concentration and abruptly changing shallower carrier profile by31P and11B double implantation resulted in advanced characteristics of ESBT and logic circuit using it as follows. ESBT transconductance was increased by a factor of two. Power-delay product reduced to 80 percent of that of logic circuit, using ESBT with31P single implanted channel layer, was satisfactorily confirmed, together with a circuit density as large as 300 gates/ mm2.

Patent
Junji Namiki1
21 Dec 1976
TL;DR: In this article, a phase synchronizer for a reference carrier signal reproduced in a receiver for a combined amplitude and phase modulated signal comprises a window specifier for specifying windows for preselected ones of true signal points of which the demodulated signal is selectively representative.
Abstract: A phase synchronizer for a reference carrier signal reproduced in a receiver for a combined amplitude and phase modulated signal comprises a window specifier for specifying windows for preselected ones of true signal points of which the demodulated signal is selectively representative. The phase synchronizer includes a demodulator for producing complex signals representative of coarse signal points so long as the reproduced carrier signal has a phase error which falls within the windows. Differences between the true points and the coarse points falling within the windows are calculated and summed up to produce a control signal for reducing the phase error substantially to zero.

Patent
01 Mar 1976
TL;DR: In this paper, a printed circuit board with a conductor pattern is printed on an insulating base, first solder resist layers are formed on the surface of the conductor pattern remaining lands which are for soldering thereon, second solder resist resist layers for prevention of bridging for preventing bridging of solder are formed at least at portions where the gap between the lands is narrow.
Abstract: A printed circuit board wherein a conductor pattern is printed on an insulating base, first solder resist layers are formed on the surface of the conductor pattern remaining lands which are for soldering thereon, second solder resist layers for prevention of bridging for preventing bridging of solder are formed at least at portions where the gap between the lands is narrow, and thereby electronic parts such as an IC can be reliably assembled on the printed circuit board.

Patent
Kohroh Kobayashi1, Roy Lang1
12 May 1976
TL;DR: In this article, a semiconductor laser device in which a part of the laser output is reflected from an external reflector and injected into the laser element with a delay that is less than the relaxation oscillation period of laser pulse output is described.
Abstract: A semiconductor laser device in which a part of the laser output is reflected from an external reflector and injected into the laser element with a delay that is less than the relaxation oscillation period of the laser pulse output.

Patent
Isao Kaneda1
07 Jan 1976
TL;DR: In this paper, a discharge lamp is connected to a conventional a.c. power source through ballast means and an oscillation booster circuit, which provides an intermittent oscillation output for the reignition operation of the discharge lamp.
Abstract: It is the purpose of the present discharge lamp lighting system to provide reignition energy to a discharge lamp in each half cycle of the a.c. power source. The discharge lamp is connected to a conventional a.c. power source through ballast means and an oscillation booster circuit, which provides an intermittent oscillation output for the reignition operation of the discharge lamp. The operation period of the intermittent oscillation output is so controlled that the reignition operation period is included in each half cycle of the discharge lamp current. The lamp voltage and source voltage are established to agree as much as possible with each other for minimizing the terminal voltage of the ballast means, whereby a compact and economical device with a small inductance ballast means is achieved.

Patent
Hiroo Yonezu1
15 Jun 1976
TL;DR: A semiconductor laser device includes a narrow elongated semiconductor region, which extends in depth from the surface of the device to the vicinity of the active region as mentioned in this paper, and a surface semiconductor layer of an opposite conductivity type covers the entire surface of a device except for the elongated region.
Abstract: A semiconductor laser device includes a narrow elongated semiconductor region of the same conductivity type as another semiconductor region lying in the vicinity of the active region of the laser device. The elongated region extends in depth from the surface of the device to the vicinity of the active region. A surface semiconductor layer of an opposite conductivity type covers the entire surface of the device except for the elongated region.

Patent
Tatsuo Ishiguro1
13 Feb 1976
TL;DR: In this article, a buffer memory of a transmitter stores, for transmission at a predetermined transmission rate, synchronization codes produced regularly, buffer occupancy codes immediately following the respective synchronization codes, and information codes produced between each buffer occupancy code and the next following synchronization code unevenly in response to information to be transmitted.
Abstract: A buffer memory of a transmitter stores, for transmission at a predetermined transmission rate, synchronization codes produced regularly, buffer occupancy codes immediately following the respective synchronization codes, and information codes produced between each buffer occupancy code and the next following synchronization code unevenly in response to information to be transmitted. A buffer memory of a receiver stores the codes transmitted from the transmitter. A decoder, coupled to the receiver buffer memory, decodes the information codes at a decoding rate controlled with reference to the difference between an actual sum of buffer occupancies of both buffer memories and a value predetermined for the sum.

Journal ArticleDOI
TL;DR: An on-line character recognition system was developed which recognized small sized characters, whose typical height was 4 mm, with a recognition rate of 98%.

Patent
25 Feb 1976
TL;DR: In this paper, a dual-gate Schottky barrier gate field effect transistor is provided with an intermediate electrode between a first and a second gate electrode, which forms an ohmic contact with a semiconductor substrate of the transistor.
Abstract: A dual-gate Schottky barrier gate field effect transistor is provided with an intermediate electrode between a first and a second gate electrode. This intermediate electrode forms an ohmic contact with a semiconductor substrate of the transistor. The transistor is produced by etching a first film formed on a planar surface of the substrate by the use of a pair of mask pieces to leave a pair of gate electrodes narrower than the mask pieces and projecting a metal capable of forming an ohmic contact with the semiconductor towards the planar surface perpendicularly thereof. The projected metal provides source and drain electrode on both sides of the gate electrode pair and an intermediate electrode between the gate electrodes. The intermediate electrode may be left floating during operation.


Patent
19 Oct 1976
TL;DR: In this article, a gas laser tube includes a metal supporting body installed at one end of the laser tube, and a seal casing is secured to the supporting body, and accommodates at least one cylindrical holding body having one end cut to a Brewster angle, and an optical flat plate installed in close contact with the cut surface of the holding body.
Abstract: A gas laser tube includes a metal supporting body installed at one end of the laser tube. A seal casing is secured to the supporting body, and accommodates at least one cylindrical holding body having one end cut to a Brewster angle, and an optical flat plate installed in close contact with the cut surface of the holding body. A reflecting mirror is secured to an end of the seal casing.

Patent
Toshio Oura1
23 Jan 1976
TL;DR: A signal generating circuit includes a switching circuit that includes two series-connected circuits each of the latter includes an enhancement-type MOS FET and a depletion-type FET connected between one terminal of a power source and a junction point of the series connected circuits The junction point is used as the output terminal of the switching circuit as mentioned in this paper.
Abstract: A signal generating circuit includes a switching circuit that includes two series-connected circuits Each of the latter includes an enhancement-type MOS FET and a depletion-type MOS FET connected between one terminal of a power source and a junction point of the series-connected circuits The junction point is used as the output terminal of the switching circuit