Showing papers by "NEC published in 2001"

Color and texture descriptors

Abstract: This paper presents an overview of color and texture descriptors that have been approved for the Final Committee Draft of the MPEG-7 standard. The color and texture descriptors that are described in this paper have undergone extensive evaluation and development during the past two years. Evaluation criteria include effectiveness of the descriptors in similarity retrieval, as well as extraction, storage, and representation complexities. The color descriptors in the standard include a histogram descriptor that is coded using the Haar transform, a color structure histogram, a dominant color descriptor, and a color layout descriptor. The three texture descriptors include one that characterizes homogeneous texture regions and another that represents the local edge distribution. A compact descriptor that facilitates texture browsing is also defined. Each of the descriptors is explained in detail by their semantics, extraction and usage. The effectiveness is documented by experimental results.

Generic text summarization using relevance measure and latent semantic analysis

Abstract: In this paper, we propose two generic text summarization methods that create text summaries by ranking and extracting sentences from the original documents. The first method uses standard IR methods to rank sentence relevances, while the second method uses the latent semantic analysis technique to identify semantically important sentences, for summary creations. Both methods strive to select sentences that are highly ranked and different from each other. This is an attempt to create a summary with a wider coverage of the document's main content and less redundancy. Performance evaluations on the two summarization methods are conducted by comparing their summarization outputs with the manual summaries generated by three independent human evaluators. The evaluations also study the influence of different VSM weighting schemes on the text summarization performances. Finally, the causes of the large disparities in the evaluators' manual summarization results are investigated, and discussions on human text summarization patterns are presented.

Rotation, scale, and translation resilient watermarking for images

Abstract: Many electronic watermarks for still images and video content are sensitive to geometric distortions. For example, simple rotation, scaling, and/or translation (RST) of an image can prevent blind detection of a public watermark. In this paper, we propose a watermarking algorithm that is robust to RST distortions. The watermark is embedded into a one-dimensional (1-D) signal obtained by taking the Fourier transform of the image, resampling the Fourier magnitudes into log-polar coordinates, and then summing a function of those magnitudes along the log-radius axis. Rotation of the image results in a cyclical shift of the extracted signal. Scaling of the image results in amplification of the extracted signal, and translation of the image has no effect on the extracted signal. We can therefore compensate for rotation with a simple search, and compensate for scaling by using the correlation coefficient as the detection measure. False positive results on a database of 10 000 images are reported. Robustness results on a database of 2000 images are described. It is shown that the watermark is robust to rotation, scale, and translation. In addition, we describe tests examining the watermarks resistance to cropping and JPEG compression.

Development of precipitation radar onboard the Tropical Rainfall Measuring Mission (TRMM) satellite

Abstract: The precipitation radar (PR) onboard the Tropical Rainfall Measuring Mission (TRMM) satellite is the first spaceborne radar to measure precipitation from space. The PR, operating at 13.8 GHz, is a 128-element active phased array that allows a fast and sophisticated cross-track scanning over a swath width of 215 km with a cross-range spatial resolution of about 4.3 km. The PR has a minimum detectable rain rate of 0.5 mm/h with range resolution of 250 m. In order to achieve a reliable and accurate rain echo data for three years mission life, functions for internal and external calibrations are implemented. Through a series of PR flight-model tests on the ground and an initial checkout just after the TRMM launch, it is confirmed that the PR functions properly and meets the performance requirements to quantitatively measure three-dimensional (3D) precipitation distribution from space.

Ab Initio Investigation of Physisorption of Molecular Hydrogen on Planar and Curved Graphenes

Abstract: Ab initio molecular orbital theory was used to examine the physisorption of a hydrogen molecule on planar and curved graphene clusters. The repulsive nature of a H2−H2 interaction and the small dependence of physisorption energies on physisorption sites favor a close-packed structure for molecular hydrogen physisorption on a planar graphene. It was also found that the physisorption energies are significantly increased on curved graphenes.

An Efficient Scheme for Proving a Shuffle

Abstract: In this paper, we propose a novel and efficient protocol for proving the correctness of a shuffle, without leaking how the shuffle was performed. Using this protocol, we can prove the correctness of a shuffle of n data with roughly 18n exponentiations, where as the protocol of Sako-Kilian[SK95] required 642n and that of Abe[Ab99] required 22n log n. The length of proof will be only 211n bits in our protocol, opposed to 218n bits and 214 n log n bits required by Sako-Kilian and Abe, respectively. The proposed protocol will be a building block of an efficient, universally verifiable mix-net, whose application to voting system is prominent.

Page information display method and device and storage medium storing program for displaying page information

Abstract: A page information display method for displaying electronic information includes a page turning operation detecting step of outputting a page turning operation detecting signal when a dragging is made on an operation unit in parallel or unparallel to a predefined page turning direction at a current page read from a storage unit that is to be displayed at present, a next display page setting step of setting a preceding page or a succeeding page immediately before or after a current page depending on a direction of a dragging operation to a next display page to be displayed next, when a page turning operation detecting signal is detected in the page turning operation detecting step, and a page turning process step of displaying the next display page set in the next display page setting step in place of the current page on a display unit.

LPV system analysis via quadratic separator for uncertain implicit systems

Abstract: This paper considers a class of linear systems containing time-varying parameters whose behavior is not known exactly. We assume that the parameters vary within known intervals and there are known bounds on their rates of variation. Our objective is to give a computationally verifiable condition that guarantees stability of the system for all possible parameter variations. We first point out that the information on the rate bounds can be exploited by considering an augmented system described by an implicit model. We then develop a tool, called the quadratic separator, for stability analysis of uncertain implicit systems. Using this tool, a sufficient stability condition is obtained for the original linear parameter-varying system. Moreover, we show that the stability condition obtained is equivalent to the existence of a Lyapunov function that depends on the parameters in a linear fractional manner. Finally, the computational aspects of the proposed stability conditions are addressed.

The MPEG-7 color layout descriptor: a compact image feature description for high-speed image/video segment retrieval

Abstract: This paper proposes a color feature description for image and video retrieving applications such as personal video recorder, which manages a large amount of data. This descriptor specifies the spatial distribution of colors with a few nonlinear quantized DCT coefficients of grid based average colors. The tradeoff between the number of the coefficients enclosed in the descriptor and retrieval cost is studied. The experimental results show that the descriptor enclosing six for luminance and three for each chrominance coefficient achieves the best trade-off between the storage cost and retrieval efficiency. It requires 6 bits for DC and 5 bits for AC coefficients, and therefore total storage cost is just 63 bits per image. This description, named color layout descriptor, has been accepted as a part of the MPEG-7 final committee draft.

Battery life estimation of mobile embedded systems

Abstract: Since battery life directly impacts the extent and duration of mobility, one of the key considerations in the design of a mobile embedded system should be to maximize the energy delivered by the battery, and hence the battery lifetime. To facilitate exploration of alternative implementations for a mobile embedded system, in this paper we address the issue of developing a fast and accurate battery model, and providing a framework for battery life estimation of Hardware/Software (HW/SW) embedded systems. We introduce a stochastic model of a battery, which can simultaneously model two key phenomena affecting the battery life and the amount of energy that can be delivered by the battery: the rate capacity effect and the recovery effect. We model the battery behavior mathematically in terms of parameters that can be related to physical characteristics of the electro-chemical cell. We show how this model can be used for battery life estimation of a HW/SW embedded system, by calculating battery discharge demand waveforms using a power co-estimation technique. Based on the discharge demand, the battery model estimates the battery lifetime as well as the delivered energy. Application of the battery life estimation methodology to three system implementations of an example TCP/IP network interface subsystem demonstrates that different system architectures can have significantly different delivered energy and battery lifetimes.

10.92-Tb/s (273/spl times/40-Gb/s) triple-band/ultra-dense WDM optical-repeatered transmission experiment

Abstract: With LD-pumped gain-shifted thulium-doped fiber amplifiers, polarization interleave multiplexing combined with wavelength/polarization demultiplexing for 50-GHz-spaced 40-Gb/s/ch WDM signals, and a transmission line optimization for triple-band systems, the first 10-Tb/s WDM transmission in single fiber using S-, C- and L-bands is demonstrated.

168-Gb/s all-optical wavelength conversion with a symmetric-Mach-Zehnder-type switch

Abstract: Error-free all-optical wavelength conversion at 168 Gb/s, which is the highest repetition rate ever reported, has been achieved by using a symmetric-Mach-Zehnder (SMZ)-type switch. Low-power-penalty 84-Gb/s operation is also demonstrated. The push-pull switching mechanism of the SMZ switch enables such ultrafast operation based on cross-phase modulation associated with the carrier depletion in a semiconductor optical amplifier. The configuration of the delayed-interference signal-wavelength converter, which is a simplified variant of the SMZ switch, is used in this experiment.

Semiconductor devices having different package sizes made by using common parts

Abstract: A semiconductor device having a semiconductor element and a plurality of segments formed by dividing a conductive plate. Some of the segments are electrically coupled with electrodes of said semiconductor element and constitute lead pad portions as mounting electrodes of the semiconductor device. Other segments among the plurality of divided segments constitute die pad portions on which the semiconductor element is mounted. The plurality of divided segments and the semiconductor element are sealed and supported together by a resin material portion. The resin material portion fills the space between the divided segments as the lead pad portions. Semiconductor devices having various package sizes can be fabricated by using standardized common parts.

System-level performance analysis for designing on-chip communication architectures

Abstract: This paper presents a novel system-level performance analysis technique to support the design of custom communication architectures for system-on-chip integrated circuits. Our technique fills a gap in existing techniques for system-level performance analysis, which are either too slow to use in an iterative communication architecture design framework (e.g., simulation of the complete system) or are not accurate enough to drive the design of the communication architecture (e.g., techniques that perform a "static" analysis of the system performance). Our technique is based on a hybrid trace-based performance-analysis methodology in which an initial cosimulation of the system is performed with the communication described in an abstract manner (e.g., as events or abstract data transfers). An abstract set of traces are extracted from the initial cosimulation containing necessary and sufficient information about the computations and communications of the system components. The system designer then specifies a communication architecture by: 1) selecting a topology consisting of dedicated as well as shared communication channels (shared buses) interconnected by bridges; 2) mapping the abstract communications to paths in the communication architecture; and 3) customizing the protocol used for each channel. The traces extracted in the initial step are represented as a communication analysis graph (CAG) and an analysis of the CAG provides an estimate of the system performance as well as various statistics about the components and their communication. Experimental results indicate that our performance-analysis technique achieves accuracy comparable to complete system simulation (an average error of 1.88%) while being over two orders of magnitude faster.

A structural Bayes approach to speaker adaptation

Abstract: Maximum a posteriori (MAP) estimation has been successfully applied to speaker adaptation in speech recognition systems using hidden Markov models. When the amount of data is sufficiently large, MAP estimation yields recognition performance as good as that obtained using maximum-likelihood (ML) estimation. This paper describes a structural maximum a posteriori (SMAP) approach to improve the MAP estimates obtained when the amount of adaptation data is small. A hierarchical structure in the model parameter space is assumed and the probability density functions for model parameters at one level are used as priors for those of the parameters at adjacent levels. Results of supervised adaptation experiments using nonnative speakers' utterances showed that SMAP estimation reduced error rates by 61% when ten utterances were used for adaptation and that it yielded the same accuracy as MAP and ML estimation when the amount of data was sufficiently large. Furthermore, the recognition results obtained in unsupervised adaptation experiments showed that SMAP estimation was effective even when only one utterance from a new speaker was used for adaptation. An effective way to combine rapid supervised adaptation and on-line unsupervised adaptation was also investigated.

Magnetic random access memory circuit

Abstract: A magnetic random access memory circuit comprises first and second row decoders receiving a part of a given address, first and second column decoders receiving the other part of a given address, a plurality of pairs of sense lines connected between output terminals of the first row decoder and output terminals of the second row decoder, each pair of sense lines being located adjacent to each other, a plurality of word lines connected between output terminals of the first column decoder and output terminals of the second column decoder, and extending to intersect the sense lines so that intersections of the sense lines and the word lines are located in the form of a matrix. A memory array includes a plurality of cell pairs distributed over the matrix, each cell pair including a memory cell and a reference cell located adjacent to each other. Each of the memory cell and the reference cell includes a magneto-resistive element. The memory cell and the reference cell of each cell pair are located at intersections of one word line and one pair of sense lines, respectively. The memory cell of the each cell pair is connected between one sense line of the one pair of sense lines and the one word line, and the reference cell of the each cell pair is connected between the other sense line of the one pair of sense lines and the one word line.

Antenna apparatus and electronic toll collection system and electronic toll collection method using the same

Abstract: In an antenna apparatus and the electronic toll collection (hereinafter, abbreviated to an ETC) system using it, an antenna apparatus ( 2 ) is provided in a space over a lane ( 3 ) through which an automobile ( 1 ) having ETC on-vehicle equipment ( 10 ) passes. An antenna which the antenna apparatus has radiates a radio wave having a radio beam emitted area ( 21 ) of a radio wave to communicate with the ETC on-vehicle equipment and, thereby, electronic toll collection is performed for the passing automobile. It is an object of the present invention to provide an antenna apparatus which is controllable so that the ETC on-vehicle equipment is in the center of the radio beam emitted area of the antenna apparatus, and also to provide an ETC system using it. The antenna apparatus integrates an antenna and a light emitting unit. The light emitting unit emits a visible light ( 31 ) to the radio beam emitted area for communicating with the ETC on-vehicle equipment 10 mounted on the automobile along the center line within the radio beam emitted area. A sensor ( 40 ) can detect the automobile and can determine an emitted period of the visible light.

Large thermoelectric power factor in TiS 2 crystal with nearly stoichiometric composition

Abstract: A ${\mathrm{TiS}}_{2}$ crystal with a layered structure was found to have a large thermoelectric power factor. The in-plane power factor ${S}^{2}/\ensuremath{\rho}$ at 300 K is $37.1\ensuremath{\mu}{\mathrm{W}/\mathrm{K}}^{2}\mathrm{cm}$ with resistivity (\ensuremath{\rho}) of 1.7 m\ensuremath{\Omega} cm and thermopower (S) of -251 \ensuremath{\mu}V/K, and this value is comparable to that of the best thermoelectric material, ${\mathrm{Bi}}_{2}{\mathrm{Te}}_{3}$ alloy. The electrical resistivity shows both metallic and highly anisotropic behaviors, suggesting that the electronic structure of this ${\mathrm{TiS}}_{2}$ crystal has a quasi-two-dimensional nature. The large thermoelectric response can be ascribed to the large density of states just above the Fermi energy and inter-valley scattering. In spite of the large power factor, the figure of merit $\mathrm{ZT}$ of ${\mathrm{TiS}}_{2}$ is 0.16 at 300 K, because of relatively large thermal conductivity, 68 mW/K cm. However, most of this value comes from reducible lattice contribution. Thus, $\mathrm{ZT}$ can be improved by reducing lattice thermal conductivity, e.g., by introducing a rattling unit into the inter-layer sites.

Semiconductor integrated circuit and semiconductor integrated circuit wiring layout method

Abstract: A semiconductor integrated circuit includes a first wiring layer formed in a first direction, a second wiring layer formed in a second direction perpendicular to the first direction, and a third wiring layer formed in the second direction to sandwich the first wiring layer between the third wiring layer and the second wiring layer. The second and third wiring layers are shifted from each other by a predetermined distance in the first direction. An automatic layout method for a semiconductor integrated circuit, and a recording medium are also disclosed.

Disk array apparatus, error control method for the same apparatus, and control program for the same method

Abstract: To provide a disk array apparatus, which possesses capability to deal with data read/write errorswithout delaying its essential operations and to avoid operations that allow normal disk devices to be set in a degeneration state. The disk array apparatus includes: a failed disk specifying and storage part which detects and stores which disk device is failed; a disconnection state manager which temporarily disconnects the failed disk device and manages the disk array apparatus in temporary degeneration operation; an instruction execution unit for allowing the normal disk devices to perform data read/write operations using redundancy with upper devices when receiving data read/write instructions during temporary degeneration operation; a retry part which performs retry for the failed disk device in parallel with performing data read/write operations with upper devices; and a turning off and resupplying power unit for turning off and then resupplying power to the failed disk device if normal completion is not achieved by retry.

Electron diffraction study of one-dimensional crystals of fullerenes

Abstract: A variety of fullerene molecules are found to be fully packed in the interior space of a single-wall carbon nanotube (SWNT) and form a novel one-dimensional crystal with a regular intermolecular distance. Using electron diffraction, we have successfully measured the ``lattice constants'' for these crystals of various fullerenes and found that the intermolecular spacing of adjacent fullerenes in SWNTs is smaller than that of the three-dimensional bulk crystal but larger than that of polymerized crystal. It is also revealed that elongated fullerenes with a certain aspect ratio [such as ${\mathrm{C}}_{70}$ and ${\mathrm{C}}_{80}{(D}_{5d})]$ exhibit polymorphic packing structures with different intermolecular distances due to their constrained orientations with respect to the tube axis. The packing orientations of elongated fullerenes strongly depend on the diameter of the host nanotube.

0.18-/spl mu/m CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation

Abstract: A feedback MOS current mode logic (MCML) is proposed for the high-speed operation of CMOS transistors. This logic is more tolerant to the threshold voltage fluctuation than the conventional MCML and is suitable for gigahertz operation of deep-submicron CMOS transistors. Using this logic, 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) ICs for optical-fiber-link systems have been fabricated with 0.18-/spl mu/m CMOS transistors. The ICs are faster than conventional CMOS MUX and DEMUX ICs and their power consumption is less than 1/4 of that of the conventional 10-Gb/s MUX and DEMUX ICs made using Si bipolar or GaAs transistors.

Flip chip type semiconductor device and method for manufacturing the same

Abstract: A multilayer wiring structure is formed on a flat metal plate and then an entire surface of the metal plate is etched away to thereby leave only a multilayer wiring layer. An insulating substrate having through hole sections is bonded to the multilayer wiring layer, a conductive bonding agent is embedded into the through hole section, a semiconductor chip is mounted and a solder ball is coupled.

Evaluation of the traffic-performance characteristics of system-on-chip communication architectures

Abstract: The emergence of several communication architectures for system-on-chips provides designers with a variety of design alternatives. In addition, the need to customize the system architecture for a specific application or domain, makes it critical for a designer to be aware of (and to evaluate) the trade-offs involved in selecting an optimal system-level communication architecture. While it is generally known that different communication architectures may be better suited to serve the needs of different applications, very little work has been done on quantitatively comparing and characterizing their performance for different classes of on-chip communication traffic. In this paper, we present a detailed analysis of the performance of various system-on-chip communication architectures under different classes of on-chip communication traffic. We present high-level models of a few commonly used on-chip architectures, which take into account key architectural features, including their characteristic topologies and communication protocols. We present an efficient methodology to study the performance of each architecture, making use of (i) parameterized traffic generators, that help create a wide variety of on-chip communication traffic, and (ii) an implementation independent communication interface abstraction, to enable plug-and-play evaluation of alternative communication architectures. Our experiments show that the effectiveness of each architecture varies significantly, depending on the characteristics of the communication traffic (average communication rates of common architectures were seen to vary by as much as 409%). Additionally, they also demonstrate the criticality of judiciously selecting an on-chip communication architecture for a given application. We discuss the implications of our experiments, including the relative strengths and weaknesses of the considered architectures, the classes of traffic that each is well suited to, and requirements for system design tools and methodologies in order to support efficient communication architecture selection and customization.

Communication control system using telephone directory management system of mobile phone

Abstract: A communication control system including a directory server which include a storage unit and a communication control unit. The storage unit stores a replica of directory data of records, each of which includes data of a counter communication end. The communication control unit refers to the directory data replica to determine whether or not a connection of a communication request from the counter communication end to the mobile phone is permitted, in response to a connection confirmation request which is generated in response to the communication request, and transmits a response indicative permission or non-permission of the connection of the communication request to the mobile phone.

Multi-layer class identifying communication apparatus with priority control

Abstract: A multi-layer class identifying communication apparatus, includes an input interface connected to input communication lines; a switch circuit; and an output interface connected to output communication lines. The input interface comprises an allocating section which determines a class identifier indicative of one of classes to which an IP packet belongs, from header data of the IP packet received through one of the input communication lines, and allocates an IP-QOS (Internet-Protocol-Quality-of-Service) code to the IP packet. The switch circuit selects one of the output communication lines based on a destination address of the IP packet, such that the IP packet is outputted from the output interface to the selected output communication output interface.