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Institution

NEC

CompanyTokyo, Japan
About: NEC is a company organization based out in Tokyo, Japan. It is known for research contribution in the topics: Signal & Layer (electronics). The organization has 33269 authors who have published 57670 publications receiving 835952 citations. The organization is also known as: NEC Corporation & NEC Electronics Corporation.


Papers
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Book ChapterDOI
Tomoyasu Suzaki1, Kazuhiko Minematsu1
07 Feb 2010
TL;DR: This paper improves the security-efficiency treading off of Type-II GFS when k is a power of two and obtains a significant improvement using a highly effective permutation based on the de Bruijn graph.
Abstract: The generalized Feistel structure (GFS) is a generalized form of the classical Feistel cipher A popular version of GFS, called Type-II, divides a message into k > 2 sub blocks and applies a (classical) Feistel transformation for every two sub blocks, and then performs a cyclic shift of k sub blocks Type-II GFS has many desirable features for implementation A drawback, however, is its low diffusion property with a large k This weakness can be exploited by some attacks, such as impossible differential attack To protect from them, Type-II GFS generally needs a large number of rounds In this paper, we improve the Type-II GFS's diffusion property by replacing the cyclic shift with a different permutation Our proposal enables to reduce the number of rounds to attain a sufficient level of security Thus, we improve the security-efficiency treading off of Type-II GFS In particular, when k is a power of two, we obtain a significant improvement using a highly effective permutation based on the de Bruijn graph

125 citations

Patent
Fukuzo Yukio1
23 Mar 1993
TL;DR: In this paper, a dynamic random access memory device is used to provide a data path from a data input/output port and a memory cell selected from the memory cell array, and latch circuits are provided in addressing section and the data transferring path for temporarily storing address decoded signal and write-in and read-out data bits in response to latch control signals higher in frequency than the system clock signal, thereby controlling the data stream in a pipeline fashion.
Abstract: A dynamic random access memory device is responsive to a row address signal and a column address signal supplied in synchronism with a system clock signal for providing a data path from a data input/output port and a memory cell selected from the memory cell array, and latch circuits are provided in the addressing section and the data transferring path for temporarily storing address decoded signal and write-in and read-out data bits in response to latch control signals higher in frequency than the system clock signal, thereby controlling the data stream in a pipeline fashion.

124 citations

Patent
Kazuhiko Iwata1
26 Dec 1996
TL;DR: In this paper, a phonetic E-mail reader for reading out e-mails phonetically enabling easy grasping of their contents by a user with its vocal output even when quotation codes or header information are included in the E-mails.
Abstract: In order to provide a practical E-mail reader for reading out E-mails phonetically enabling easy grasping of their contents by a user with its vocal output even when quotation codes or header information are included in the E-mails, a phonetic E-mail reader of the invention comprises a speech synthesizer (102) for converting text data into vocal data, quotation code storing means (105) for storing quotation codes used for indicating a quotation line inserted at a top of the quotation line, and quotation code elimination means (106) for detecting and eliminating a quotation code inserted at tops of quotation lines referring to the quotation code storing means (105) before supplying the quotation lines to the speech synthesizer (102).

124 citations

Proceedings ArticleDOI
Malay K. Ganai1, Lintao Zhang1, P. Ashar2, Aarti Gupta1, Sharad Malik1 
10 Jun 2002
TL;DR: This work demonstrates that by employing the same innovations as in advanced CNF-based SAT solvers, but in a hybrid approach where these two portions of the formula are represented differently and processed separately, it is possible to obtain the consistently highest performing SAT solver for circuit oriented problem domains.
Abstract: We propose satisfiability checking (SAT) techniques that lead to a consistent performance improvement of up to 3/spl times/ over state-of-the-art SAT solvers like Chaff on important problem domains in VLSI CAD. We observe that in circuit oriented applications like ATPG and verification, different software engineering techniques are required for the portions of the formula corresponding to learnt clauses compared to the original formula. We demonstrate that by employing the same innovations as in advanced CNF-based SAT solvers, but in a hybrid approach where these two portions of the formula are represented differently and processed separately, it is possible to obtain the consistently highest performing SAT solver for circuit oriented problem domains. We also present controlled experiments to highlight where these gains come from. Once it is established that the hybrid approach is faster, it becomes possible to apply low overhead circuit-based heuristics that would be unavailable in the CNF domain for greater speedup.

124 citations

Patent
20 Nov 2001
TL;DR: In this paper, a chemical mechanical polishing slurry for polishing a copper-based metal film formed on an insulating film comprising a concave on a substrate, comprising a polishing material, an oxidizing agent and water as well as a benzotriazole compound and a triazole compounds, was presented.
Abstract: This invention provides a chemical mechanical polishing slurry for polishing a copper-based metal film formed on an insulating film comprising a concave on a substrate, comprising a polishing material, an oxidizing agent and water as well as a benzotriazole compound and a triazole compound. The polishing slurry may be used in CMP to form a reliable damascene electric connection with excellent electric properties at a higher polishing rate, i.e., a higher throughput while preventing dishing.

124 citations


Authors

Showing all 33297 results

NameH-indexPapersCitations
Pulickel M. Ajayan1761223136241
Xiaodong Wang1351573117552
S. Shankar Sastry12285886155
Sumio Iijima106633101834
Thomas W. Ebbesen9930570789
Kishor S. Trivedi9569836816
Sharad Malik9561537258
Shigeo Ohno9130328104
Adrian Perrig8937453367
Jan M. Rabaey8152536523
C. Lee Giles8053625636
Edward A. Lee7846234620
Otto Zhou7432218968
Katsumi Kaneko7458128619
Guido Groeseneken73107426977
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20238
202220
2021234
2020518
2019952
20181,088