NEC

About: NEC is a company organization based out in Tokyo, Japan. It is known for research contribution in the topics: Signal & Layer (electronics). The organization has 33269 authors who have published 57670 publications receiving 835952 citations. The organization is also known as: NEC Corporation & NEC Electronics Corporation.

Routing method for use in wiring design

Abstract: A routing method for wiring design including a determining step for identifying, in one of the wiring sections where no wiring path is determined as yet, the direction of the line segment which is prohibited by an obstacle and accordingly determining a wiring path. The routing method also includes a generating step for generating, on a layer opposite to the layer on which one unprocessed line segment is present and in a position having the same plane coordinates as the line segment, an obstacle which prohibits only such line segments as are parallel in direction to the line segment, on the wiring path determined by the determining step.

Method and apparatus for performing priority control for cells in output buffer type atm switch

Abstract: There is provided a method of performing priority control for cells in an output buffer type ATM switch including a switching unit, having a plurality of input ports and a plurality of output ports, for switching/outputting the cells input from the input ports to the output ports in accordance with routing information, and a plurality of output buffer units having output buffer memories, connected to the output ports of the switching unit, for temporarily storing the cells output from the output ports to perform output control of the cells A loss quality class, a delay quality class and the routing information are added to each of the cells A plurality of logical queues for temporarily storing the cells are virtually set in an input buffer memory in accordance with the delay quality classes and the routing information The input cells are selectively written in the logical queues on the basis of the loss quality classes and the routing information added to the cells A transition process is performed for all the logical queues to change the delay quality class of each of the logical queues into one of upper and lower classes depending on a cell storage amount in the logical queue Upon completion of the transition process, the cells are read from the logical queue having the delay quality class which is an uppermost class

Electrically erasable and programmable non-volatile memory (EEPROM), wherein write pulses can be interrupted by subsequently received read requests

Abstract: A microcomputer having an electrically erasable and programmable nonvolatile memory into which data is written without prolonging the data write processing time, even when a data read request is issued during the data write processing operation. The microcomputer includes a data erasing/writing/reading control circuit which coordinates the writing and reading of data to and from memory. The control circuit includes a timer for counting a predetermined number of counts during the data write process corresponding to the time period required to positively write data into the memory. If a data read request occurs during the data write process, the counting of the timer is suspended while the data is read out from the memory. After the data read process is completed, the data write process is resumed, and the timer continues counting toward the predetermined count from the count at which it was suspended. When the timer reaches the predetermined count, the data has been positively written into memory, and the data write process is terminated.

Language model creation apparatus, language model creation method, speech recognition apparatus, speech recognition method, and recording medium

Abstract: A frequency counting unit ( 15 A) counts occurrence frequencies ( 14 B) in input text data ( 14 A) for respective words or word chains contained in the input text data ( 14 A). A context diversity calculation unit ( 15 B) calculates, for the respective words or word chains, diversity indices ( 14 C) each indicating the context diversity of a word or word chain. A frequency correction unit ( 15 C) corrects the occurrence frequencies ( 14 B) of the respective words or word chains based on the diversity indices ( 14 C) of the respective words or word chains. An N-gram language model creation unit ( 15 D) creates an N-gram language model ( 14 E) based on the corrected occurrence frequencies ( 14 D) obtained for the respective words or word chains.

A 1Tb/s 3W inductive-coupling transceiver for inter-chip clock and data link

Abstract: A 1Tb/s 3W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1GHz and data rate of 1Gb/s per channel. 1024 data transceivers are arranged with a pitch of 30mum. The total layout area is 2mm2 in 0.18mum CMOS and the chip thickness is 10mum. 4-phase TDMA reduces crosstalk and the BER is <10minus;12. Bi-phase modulation is used to improve noise immunity, reducing power in the transceiver