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Institution

Oki Electric Industry

CompanyTokyo, Japan
About: Oki Electric Industry is a company organization based out in Tokyo, Japan. It is known for research contribution in the topics: Signal & Layer (electronics). The organization has 4949 authors who have published 6588 publications receiving 74571 citations. The organization is also known as: Oki Denki Kōgyō Kabushiki-gaisha.


Papers
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Journal ArticleDOI
Shinichi Kato, Sadayuki Tsugawa, K. Tokuda1, T. Matsui2, H. Fujii 
TL;DR: Describes the technologies of cooperative driving with automated vehicles and intervehicle communications in the Demo 2000 cooperative driving, which was held in November 2000, on a test track with five automated vehicles.
Abstract: Describes the technologies of cooperative driving with automated vehicles and intervehicle communications in the Demo 2000 cooperative driving. Cooperative driving, aiming at the compatibility of safety and efficiency of road traffic, means that automated vehicles drive by forming a flexible platoon over a couple of lanes with a short intervehicle distance while performing lane changing, merging, and leaving the platoon. The vehicles for the demonstration are equipped with automated lateral and longitudinal control functions with localization data by the differential global positioning system (DGPS) and the intervehicle communication function with 5.8-GHz dedicated short range communication (DSRC) designed for the dedicated use in the demonstration. In order to show the feasibility and potential of the technologies, the demonstration was held in November 2000, on a test track with five automated vehicles. The scenario included stop and go, platooning, merging, and obstacle avoidance.

405 citations

Patent
15 May 2003
TL;DR: In this article, the authors proposed a semiconductor memory device which can be operated with low power source voltage such that write-in speed is not reduced and of which power consumption is low.
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor memory device which can be operated with low power source voltage such that write-in speed is not reduced and of which power consumption is low. SOLUTION: At the time of read-out of data, a pseudo ground line VGj provided corresponding to a pair of bit lines BLj, /BLj of memory cells 11 i , j to be read out is connected to ground voltage GND through a transistor 31 j . Thereby, the bit line BLj (or /BLj) corresponding to a 'L' level is connected to ground voltage GND through an acceleration circuit AC in the memory cells 11 i , j , read-out speed is accelerated. At the time of write-in time of data, a pseudo ground line VGj provided corresponding to the pair of bit lines BLj, /BLj to be written is connected to power source voltage VDD through a transistor 33 j . Thereby, a current from the bit line BLj (or /BLj) of a 'H' level to the pseudo ground line VGj is prevented, and write-in speed is not reduced. COPYRIGHT: (C)2004,JPO

302 citations

Patent
20 Jan 1998
TL;DR: In this article, the first and second electrodes are disposed around a tubular chamber for generating a plasma, and each of the electrodes comprises a plurality of web-shaped electrode segments spaced by a constant distant and disposed substantially halfway around the chamber.
Abstract: A plasma processing apparatus has first and second electrodes disposed around a tubular chamber for generating a plasma. Each of the first and second electrodes comprises a plurality of web-shaped electrode segments spaced by a constant distant and disposed substantially halfway around the chamber. Each of the web-shaped electrode segments has opposite ends fastened to a pair of respective insulators disposed diametrically opposite to each other across the chamber. The web-shaped electrode segments of the first electrode are electrically connected to each other by a conductor on one of the insulators, and the web-shaped electrode segments of the second electrode are electrically connected to each other by a conductor on the other conductors. The first electrode is connected to a high-frequency power supply, and the second electrode is connected to ground.

254 citations

Patent
13 Apr 2000
TL;DR: In this paper, a multi-layer interconnection structure is proposed in which the wiring length is reduced, and the interconnection is straightened, at the same time as measures need to be taken against radiation noise.
Abstract: In a multi-layer interconnection structure, the wiring length is to be reduced, and the interconnection is to be straightened, at the same time as measures need to be taken against radiation noise. To this end, there is disclosed a semiconductor device in which plural semiconductor substrates, each carrying semiconductor elements, are bonded together. On each semiconductor substrate is deposited an insulating layer through which is formed a connection wiring passed through the insulating layer so as to be connected to the interconnection layer of the semiconductor element. On a junction surface of at least one of the semiconductor substrates is formed an electrically conductive layer of an electrically conductive material in which an opening is bored in association with the connection wiring. The semiconductor substrates are bonded together by the solid state bonding technique to interconnect the connection wirings formed on each semiconductor substrate.

245 citations

Journal ArticleDOI
TL;DR: In this paper, surface passivation effects were studied on AlGaN/GaN high-electron-mobility transistors (HEMTs) using SiO2, Si3N4, and silicon oxynitride (SiON) formed by plasma enhanced chemical vapor deposition.
Abstract: Surface passivation effects were studied on AlGaN/GaN high-electron-mobility transistors (HEMTs) using SiO2, Si3N4, and silicon oxynitride (SiON) formed by plasma enhanced chemical vapor deposition. An increase of IDmax and gmmax has been observed on the passivated (SiO2, Si3N4 and SiON) HEMTs when compared with the unpassivated HEMTs. About an order of magnitude low IgLeak and three orders of magnitude high IgLeak was observed on Si3N4 and SiO2 passivated HEMTs, respectively, when compared with the unpassivated HEMTs. The increase of IgLeak is due to the occurrence of surface related traps, which was confirmed by the observation of kink and hysteresis effect on dc and ac IDS–VDS characteristics, respectively. Though the Si3N4 passivated HEMTs show better dc characteristics, the breakdown voltage (BVgd) characteristics are not comparable with SiO2, SiON passivated and unpassivated HEMTs. The SiON is also a very promising candidate as a surface passivant for AlGaN/GaN HEMTs because it shows better BVgd wit...

238 citations


Authors

Showing all 4949 results

NameH-indexPapersCitations
Yuji Matsumoto6078819287
Tadatomo Suga476168680
Ci-Ling Pan434696684
Takashi Egawa393856642
Seiji Samukawa374697260
Hiroyasu Ishikawa371524496
Hiroshi c346155420
Takashi c324854324
Yasuhiro Matsui311432844
Takuro Sato293093470
Shinsuke Hara283206038
Hideaki Kuzuoka271182573
Chang-Qing Xu272192420
Nobukazu Araki25833381
Hitoshi Abe241354673
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20218
202015
201932
201838
201738
201647