scispace - formally typeset
Search or ask a question
Institution

Qualcomm

CompanyFarnborough, United Kingdom
About: Qualcomm is a company organization based out in Farnborough, United Kingdom. It is known for research contribution in the topics: Wireless & Signal. The organization has 19408 authors who have published 38405 publications receiving 804693 citations. The organization is also known as: Qualcomm Incorporated & Qualcomm, Inc..


Papers
More filters
Patent
Gordon Skinner1, Brian Harms1
30 Jun 1995
TL;DR: In this paper, a technique for using energy received by subscriber units over multiple orthogonal channels within a spread spectrum communication system to acquire signal timing by controlling signal amplitude integration intervals used in detecting such timing is presented.
Abstract: A technique for using energy received by subscriber units over multiple orthogonal channels within a spread spectrum communication system to acquire signal timing by controlling signal amplitude integration intervals used in detecting such timing. Received signals are despread and respective amplitudes integrated over periods that are divisible by factors of 2 into the length of Walsh functions used to generate orthogonal signal channels. Non-coherent combinations of the results of this integration are subsequently formed over periods that commence and terminate on Walsh function boundaries, and used to determine when a correct time offset has been selected for despreading signals. Additional advantages are realized by assigning signals that consistently provide a higher energy content such as paging, synchronization, and most frequently assigned traffic channels to specific orthogonal channels within the communication system. In exemplary embodiments, Walsh functions of length 128 are used as channelizing codes and a pilot signal is assigned to channel 0. This results in traffic channels or paging and synchronization functions being assigned to channel 64 when the integration periods are 64 chips long, and to channels 32, 64, and 96 when the periods are 32 chips long. In this manner, additional energy is available during the integration process for use in determining when correct signal acquisition timing offsets have been selected, without the use of additional hardware.

121 citations

Patent
Thomas Richardson1
17 Dec 2004
TL;DR: In this paper, an iterative message passing decoder, operating in conjunction with a soft input-soft output signal processing unit (402), has an error floor performance region influenced by the decoder's suboptimal message passing nature.
Abstract: An iterative message passing decoder, e.g., an LDPC decoder (404), operating in conjunction with a soft input - soft output signal processing unit (402), e.g., an ISI detector, has an error floor performance region influenced by the decoder’s suboptimal message passing nature. Error floor reduction is achieved by a simple message re-initialization mechanism. Decoder edge states, e.g., constraint to variable node messages in decoder memory, are reinitialized, e.g., for an iteration, during the decoding after soft values provided by signal-processing unit (402) have improved. During the message re-initialization and for some subsequent amount of iterative decoder processing, extrinsic information (416) fed back from the decoder to the signal processing unit (402) and/or soft values delivered to the decoder from the signal processing unit (402), in an outer communications loop, is temporarily frozen, e.g., using a switch and a buffer (410). Then, the outer communications loop is restored as the decoding continues, achieving improved decoding performance.

121 citations

Patent
Alkinoos Hector Vayanos1
29 Oct 2001
TL;DR: In this paper, the velocity of a terminal in a wireless communication system is estimated based on the estimated Doppler frequency shift due to the movement of the terminal and the residual rates of change of pseudo-range for the satellites.
Abstract: Techniques to estimate the velocity of a terminal in a wireless communication system. Movement by the terminal results in a Doppler shift in the frequency of each transmitted signal received at the terminal. In one method, the positions of the terminal, a base station, and each of two or more satellites are initially determined. A residual rate of a change of pseudo-range may also be determined for each satellite, e.g., based on (1) an estimated baseband frequency error that includes the Doppler frequency shift due to the terminal's movement and (2) an estimated Doppler frequency shift due to movement by the satellite. A set of equations is then formed based on the determined positions of the terminal, the base station, and the satellites and the determined residual rates of change of pseudo-ranges for the satellites. The velocity of the terminal may thereafter be estimated based on the set of equations.

121 citations

Proceedings ArticleDOI
18 May 2020
TL;DR: The inner workings of TRR are demystified, which shows that what is advertised as a single mitigation mechanism is actually a series of different solutions coalesced under the umbrella term Target Row Refresh, and it is demonstrated that modern implementations operate entirely inside DRAM chips.
Abstract: After a plethora of high-profile RowHammer attacks, CPU and DRAM vendors scrambled to deliver what was meant to be the definitive hardware solution against the RowHammer problem: Target Row Refresh (TRR). A common belief among practitioners is that, for the latest generation of DDR4 systems that are protected by TRR, RowHammer is no longer an issue in practice. However, in reality, very little is known about TRR. How does TRR exactly prevent RowHammer? Which parts of a system are responsible for operating the TRR mechanism? Does TRR completely solve the RowHammer problem or does it have weaknesses? In this paper, we demystify the inner workings of TRR and debunk its security guarantees. We show that what is advertised as a single mitigation mechanism is actually a series of different solutions coalesced under the umbrella term Target Row Refresh. We inspect and disclose, via a deep analysis, different existing TRR solutions and demonstrate that modern implementations operate entirely inside DRAM chips. Despite the difficulties of analyzing in-DRAM mitigations, we describe novel techniques for gaining insights into the operation of these mitigation mechanisms. These insights allow us to build TRRespass, a scalable black-box RowHammer fuzzer that we evaluate on 42 recent DDR4 modules. TRRespass shows that even the latest generation DDR4 chips with in-DRAM TRR, immune to all known RowHammer attacks, are often still vulnerable to new TRR-aware variants of RowHammer that we develop. In particular, TRRespass finds that, on present-day DDR4 modules, RowHammer is still possible when many aggressor rows are used (as many as 19 in some cases), with a method we generally refer to as Many-sided RowHammer. Overall, our analysis shows that 13 out of the 42 modules from all three major DRAM vendors (i.e., Samsung, Micron, and Hynix) are vulnerable to our TRR-aware RowHammer access patterns, and thus one can still mount existing state-of-the-art system-level RowHammer attacks. In addition to DDR4, we also experiment with LPDDR4(X)1 chips and show that they are susceptible to RowHammer bit flips too. Our results provide concrete evidence that the pursuit of better RowHammer mitigations must continue.

121 citations

Patent
11 Apr 2012
TL;DR: In this paper, the techniques for transmitting control information to support communication on multiple component carriers (CCs) are described. But the authors do not consider the control message definition for the second CC.
Abstract: Techniques for transmitting control information to support communication on multiple component carriers (CCs) are disclosed. A user equipment (UE) may be configured for operation on multiple CCs. These CCs may be associated with control messages having different definitions. For example, a control message for a CC configured for frequency division duplex (FDD) may have a different definition than a control message for a CC configured for time division duplex (TDD). A base station may send first control information for a first CC based on a definition of a control message for a second CC, instead of a definition of a control message for the first CC. The control message for the second CC may be selected for use to send the first control information based on various designs.

121 citations


Authors

Showing all 19413 results

NameH-indexPapersCitations
Jian Yang1421818111166
Xiaodong Wang1351573117552
Jeffrey G. Andrews11056263334
Martin Vetterli10576157825
Vinod Menon10126960241
Michael I. Miller9259934915
David Tse9243867248
Kannan Ramchandran9159234845
Michael Luby8928234894
Max Welling8944164602
R. Srikant8443226439
Jiaya Jia8029433545
Hai Li7957033848
Simon Haykin7745462085
Christopher W. Bielawski7633432512
Network Information
Related Institutions (5)
Intel
68.8K papers, 1.6M citations

92% related

Motorola
38.2K papers, 968.7K citations

89% related

Samsung
163.6K papers, 2M citations

88% related

NEC
57.6K papers, 835.9K citations

87% related

Texas Instruments
39.2K papers, 751.8K citations

86% related

Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20229
20211,188
20202,266
20192,224
20182,124
20171,477