Showing papers by "Roma Tre University published in 1990"
16 Apr 1990
TL;DR: Carrier recovery-not trivial because of the absence of preambles-can be implemented by either exploiting the inherent frame-to-frame coherence in a PLL (phase locked loop)-based scheme or a nonlinear phase estimation algorithm originally proposed by Viterbi.
Abstract: Some design and implementation aspects of an eight-channel 2.048-Mb/s multicarrier demodulator for multifrequency TDMA (time division multiple access) systems, requiring assured network synchronization and the likely absence of preambles in data bursts, are reported. The 32 voice channels in a 2-Mb/s primary group are assigned an equal number of time slots in the frame; timing (symbol) synchronization permits each slot to be occupied by different users from frame to frame if needed by the overall network efficiency. The study phase started with the requirement of a fully digital demodulator, substantially exploiting multistage and block approaches for the demultiplexer. The latter approach was selected for detailed design and implementation, utilizing a bank of polyphase filters followed by an eight-point fast Fourier transform. Carrier recovery-not trivial because of the absence of preambles-can be implemented by either exploiting the inherent frame-to-frame coherence in a PLL (phase locked loop)-based scheme or a nonlinear phase estimation algorithm originally proposed by Viterbi. >
22 citations
03 Apr 1990
TL;DR: The proposed method realizes a full parallel linear combinator as a single device by the residue number system (RNS) approach, which reduces the computational costs of multipliers to that of adders.
Abstract: Unconventional number systems have been proposed as an alternative to conventional weighted number systems in realizing digital signal processing (DSP) processors. A well-known advantage of these systems is related to the intrinsic property of performing operations in a finite field of numbers, thus always avoiding overflow. This advantage is fully met by applying the proposed method, which realizes a full parallel linear combinator as a single device by the residue number system (RNS) approach. The linear combinator is implemented as two parallel modular structures which can work very quickly by means the well-known isomorphism technique. This technique reduces the computational costs of multipliers to that of adders. Some particular aspects of VLSI implementation are also discussed. >
6 citations
TL;DR: The evolution of modern communications satellites from the older cable-in-the-sky concept toward more intelligent architectures, exploiting onboard processing (OBP) techniques involving various technologies to improve the system performance and flexibility, is addressed.
Abstract: The evolution of modern communications satellites from the older cable-in-the-sky concept toward more intelligent architectures, exploiting onboard processing (OBP) techniques involving various technologies to improve the system performance and flexibility, is addressed. The key components in advanced communications satellite repeaters compatible with integrated optical device implementation are presented. The relevant device technologies and fabrication techniques are examined, and integrated optical circuit configurations that can be applied to OBP are described with reference to recent experimental data. Particular attention is given to optical beamforming networks. Areas for further research and development are suggested. >
6 citations
01 May 1990
TL;DR: In this article, a technique called double module method (DMM) is applied to recursive digital filters, which confines overflow and quantization errors to some internal points of the filter, so that behavior even better than that of conventional fixed-point realization can be obtained for a given word length.
Abstract: A technique called the double module method (DMM) is applied to recursive digital filters. The method confines overflow and quantization errors to some internal points of the filter, so that behavior even better than that of conventional fixed-point realization can be obtained for a given word length. Some considerations regarding the VLSI realization of the filters are included. >
2 citations
12 Aug 1990
TL;DR: An approach to search an optimal realization of an IIR digital filter, applying RNS methods, working in the field of rational numbers, is presented and it is shown that with an increase of only 5% in the occupied area, the dynamic range is extended by about one bit.
Abstract: An approach to search an optimal realization of an IIR digital filter, applying RNS methods, working in the field of rational numbers, is presented. The approach, denoted as DMM, implements the given structure by two processors working in parallel and based on two modular integer arithmetics. Two different moduli, prime with respect to each other, are chosen. The outputs of these processors are then recombined to accounting for the quantization effects. The choice of these modules has been optimized, showing that a value of a power-of-two for one module and a composite value for the second one can minimize the chip area. This result was compared with the choice of prime modules, which is very simple from a theoretical point of view. It is shown that with an increase of only 5% in the occupied area, the dynamic range is extended by about one bit. >