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Showing papers by "Samsung published in 1992"


Journal ArticleDOI
01 Aug 1992
TL;DR: In this paper, the effects of various environmental conditions which degrade the performance of a digital image stabilization (DIS) system in a video camera are analyzed and a new DIS system with an adaptive motion decision system is proposed.
Abstract: The effects of various environmental conditions which degrade the performance of a digital image stabilization (DIS) system in a video camera are analyzed. On the basis of the analysis, a new DIS system with an adaptive motion decision system is proposed. The DIS system is composed of (i) a local motion vector generation unit, (ii) a field motion vector generation unit, (iii) an accumulated motion vector generation unit, and (iv) field memory address control and a digital zooming unit. >

165 citations


Journal ArticleDOI
TL;DR: The new approach provides a unified framework for implementing members of Cohen's class, which was formulated in the continuous-time domain, and provides proper implementation of the discrete-time spectrogram, correct evaluation of the instantaneous frequency of the underlying continuous- time signal, and correct frequency marginal.
Abstract: A definition of generalized discrete-time time-frequency distribution that utilizes all of the outer product terms from a data sequence, so that one can avoid aliasing, is introduced. The new approach provides (1) proper implementation of the discrete-time spectrogram, (2) correct evaluation of the instantaneous frequency of the underlying continuous-time signal, and (3) correct frequency marginal. The formulation provides a unified framework for implementing members of Cohen's class, which was formulated in the continuous-time domain. Some requirements for the discrete-time kernel in the new approach are discussed in association with desirable distribution properties. Some experimental results are provided to illustrate the features of the proposed method. >

149 citations


Patent
Lenz Delek J1, Yasuaki Hagiwara2, Te-Li Lau2, Cheng-Long Tang2, Le Trong Nguyen2 
07 Jul 1992
TL;DR: In this paper, the authors propose a memory control unit for controlling access by one or more devices within a processor to a memory array unit external to the processor via ports of the processor.
Abstract: A memory control unit for controlling access, by one or more devices within a processor, to a memory array unit external to the processor via one or more memory ports of the processor. The memory control unit includes a switch network to transfer data between the one or more devices of the processor and the one or more memory ports of the processor. The memory control unit also includes a switch arbitration unit to arbitrate for the switch network, and a port arbitration unit to arbitrate for the one or more memory ports.

143 citations


Patent
Na Un-Heui1
11 Mar 1992
TL;DR: In this paper, a channel selection method for programs of the same category is disclosed, wherein arbitrary channels are assigned according to the same types of programs as those contained in signals the broadcast sent from the broadcasting station using a VPS function.
Abstract: A channel selecting method for programs of the same category is disclosed, wherein arbitrary channels are assigned according to the same types of programs as those contained in signals the broadcast sent from the broadcasting station using a VPS function. This method determines whether the received broadcast signal uses video program system broadcasting, encoding and recognizes codes according to the programs to arbitrarily assign channels for the programs according to the codes. Then, if a desired channel to be viewed is selected, the same types of programs corresponding to that channel can be automatically recognized, so that the broadcasting channel selection for viewing the same type of programs can be easily performed.

125 citations


Patent
Seung K. Pack1, Tae Y. Chung1
18 Dec 1992
TL;DR: In this paper, an intraframe and an interframe process is defined such that the present frame image data is compressed in a variable length compressing manner by way of two-dimensional discrete coding transform.
Abstract: The image signal band compressing method employs a three-dimensional motion compensating technique, an intraframe and an interframe processes which are alternatively executed. The transfer rate of the intraframe to the interframe is set to 4:1 in a unit of fixed length. The intraframe process is defined such that the present frame image data is compressed in a variable length compressing manner by way of two-dimensional discrete coding transform. The interframe process is defined such that motion data is estimated by comparing the present frame and the preceding frame, the present frame is expected on the basis of the motion data and the difference data between the motion compensated image data and the present frame data.

113 citations


Patent
25 Aug 1992
TL;DR: In this paper, the first electrodes of the storage capacitors are laid out in such a manner as to substantially surround their associated pixel electrodes, and preferably, only overlap a marginal edge portion of their associated pixels electrodes, about the periphery thereof.
Abstract: An active matrix LCD which essentially differs from presently available active matrix LCDs in that the layout of a first electrode of a storage capacitor associated with each pixel thereof is modified in such a manner as to significantly increase the aperture and contrast ratios thereof relative to those of presently available active matrix LCDs. More particularly, the first electrodes of the storage capacitors are laid out in such a manner as to substantially surround their associated pixel electrodes, and preferably, only overlap a marginal edge portion of their associated pixel electrodes, about the periphery thereof.

112 citations


Patent
J. Eric Ruetz1
05 Oct 1992
TL;DR: In this paper, a programmable output driver circuit is provided having multiple drive capabilities for optimising noise margins at different frequencies, each comprising a driver unit made up of a pulldown and a pull-up transistor.
Abstract: A programmable output driver circuit is provided having multiple drive capabilities for optimising noise margins at different frequencies. Several signal paths are designed in parallel, each comprising a driver unit made up of a pull-down and a pull-up transistor. Some of the paths can be disabled by NAND gates slowing down the driver circuit to reduce the attendant noise at lower frequencies. Different types of parallel structures can be designed, allowing for variable rise and fall times of the output signal, as well as skewed duty cycles.

103 citations


Patent
Rhee Pil Gon1
17 Aug 1992
TL;DR: In this article, an OSD circuit for displaying advertising picture data on the screen of a television receiver is disclosed, and the circuit includes an oscillator, a first counter, a second counter and a third counter, an F/F circuit, a ROM, and automatic color adjusting circuitry.
Abstract: An OSD circuit for displaying advertising picture data on the screen of a television receiver is disclosed, and the circuit includes: an oscillator, a first counter, a second counter, a third counter, an F/F circuit, a ROM, and automatic color adjusting circuitry. The oscillator supplies clock signals to the first counter, and the first and second counters supplies horizontal and vertical scanning addresses to the ROM so as for the advertising picture data to be outputted from the ROM. The third counter, supplies a delay signal for displaying of an advertising picture data of a picture scene at a time, thereby inhibiting the output of the ROM for a certain period of time. The F/F circuit prevents a dual display of the advertising picture on the screen, and the ROM stores the advertising picture data separately for main color data, first sub-color data, second sub-color data and brightness data. The automatic color adjusting circuitry receives the advertising data consisting of the main color data, the first sub-color data and the second sub-color data from the ROM, and supplies an advertising picture having a color definitely contrasting to the color of the picture of the currently broadcasting program. If the OSD circuit of the present invention is applied to television receivers, not only advertising picture data can be continuously displayed for a certain period of time in a successive manner, but also a clear and harmonized picture color can be obtained.

91 citations


Patent
Jin-Ki Kim1, Kang-Deog Suh1
30 Apr 1992
TL;DR: In this article, a nonvolatile semiconductor memory device particularly relates to an EEPROM having NAND-structured cells, and an optimizing programming method thereof is presented. But the performance of the chip is enhanced by automatically optimizing the programming with a chip's internal verification function.
Abstract: A nonvolatile semiconductor memory device particularly relates to an EEPROM having NAND-structured cells, and an optimizing programming method thereof. The device includes a memory cell array arranged as matrix having NAND cells formed by a plurality of serially-connected memory cells each of which is formed by stacking a charge storage layer and a control gate on a semiconductor substrate, and enables electrical erasing by the mutual exchange of a charge between the charge storage layer and the substrate, a data latch circuit, a high voltage supply circuit, a current source circuit, a program checking circuit, and a program status detecting circuit. The programming state is optimized while being unaffected by the variance of process parameters, over-programming is prevented by the use of a verifying potential, and the performance of the chip is enhanced by automatically optimizing the programming with a chip's internal verification function. External control is not required, which enhances performance of the overall system. Also, a page buffer of an existing flash memory having the page mode function is employed, which is applicable to the currently used products.

90 citations


Patent
20 Jul 1992
TL;DR: In this paper, an image coding system for coding a digital image signal sequence into a coded signal sequence and transmitting an amount of information of the coded signal at a fixed bit rate is described.
Abstract: In an image coding system for coding a digital image signal sequence into a coded signal sequence and transmitting an amount of information of the coded signal at a fixed bit rate, an image coding method for coding the image signal sequence includes the steps of setting an initial quantization step size by calculation of frame information measures (PIM) with respect to an image signal sequence for each frame, segmenting the image signal sequence of each frame into a block signal sequence including a plurality of N×N blocks, obtaining an allocated number of bits for each block to be coded with respect to the fixed bit rate by calculation of block PIM for each block of the block signal sequence, coding the block signal sequence for each block into a coded signal sequence according to a quantization step size currently set, subtracting the number of bits in the coded signal sequence for each block from the allocated bit number, and accumulating the differences, and adjusting the quantization step size currently set when the differences accumulated deviate from a previously set range. An image coding apparatus suitable for implementing the method is disclosed. According to one aspect of the disclosed method, since the number of bits are fixed by calculating PIM, the bit amount can be accurately calculated.

82 citations


Patent
Yang Kun-Mo1
12 May 1992
TL;DR: A portable refrigerating/heating apparatus comprises a heat exchanging portion and a preserving portion, which assure the cooling state and the heating state of the foodstuff and are separable from each other as mentioned in this paper.
Abstract: A portable refrigerating/heating apparatus comprises a heat exchanging portion and a preserving portion, which assure the cooling state and the heating state of the foodstuff and are separable from each other, in which a preserving portion for storing the storage goods in its enclosed hollow space is removably placed on the upper surface of said heat exchanging portion provided with the heat exchanging member and the blowing member, the air heat-exchanged by the heat exchanging member is forcedly blown by the blowing member into the preserving portion while being discharged through the heat exchanging means therefrom to the outside so as to cool or heat the storage goods, and then the preserving portion is separated from the heat exchanging means to be portable.

Patent
04 Dec 1992
TL;DR: In this paper, the authors present a digital image compression and decompression method and apparatus for dividing a supplied digital image signal into blocks of predetermined size, performing variable-length coding of the signal, separating the signal with respect to principle information and remaining information, and controlling the record format so that each type of information is alternately recorded on a recording medium in an equal interval whenever recording the compressed information and decompressing the information, according to the reverse order, during decoding.
Abstract: Disclosed is a digital image compression and decompression method and apparatus for dividing a supplied digital image signal into blocks of predetermined size, performing variable-length coding of the signal, separating the signal with respect to principle information and remaining information, and controlling the record format so that each type of information is alternately recorded on a recording medium in an equal interval whenever recording the compressed information and decompressing the information, according to the reverse order, during decoding. Also, the function for extracting an activity in two steps during coding and then controlling the permitted number of bits of the variable length coding is provided. Accordingly, the coding efficiency is improved and the circuitry is simplified so that the price of the end product can be lowered.

Patent
Han Ki-Man1, Chang-Gyu Hwang1, Dug-Dong Kang1, Young-jae Choi1, Joo-young Yoon1 
27 Nov 1992
TL;DR: In this article, a method for manufacturing a capacitor of a semiconductor device is described, where a polycrystalline layer (50) composed of grains with microscopic structure to include an impurity (70) in them is etched to cut the boundary portions of the grains.
Abstract: Disclosed is a method for manufacturing a capacitor of a semiconductor device After forming a polycrystalline layer (50) composed of grains with microscopic structure to include an impurity (70) in them, the polycrystalline layer is etched to cut the boundary portions of the grains, thereby allowing the surface of the polycrystalline layer to be rugged The micro-trenches (1) or micro-pillars (11) are formed by using the oxide layer or an anisotropic etching after exposing the surface of the first rugged polycrystalline layer, and epitaxial grains (95) are formed by epitaxial growth, so that cell capacitance can be further increased The simple process allows the formation of a reliable semiconductor device having regularity and reproducibility, and capable of increasing and adjusting the cell capacitance easily

Patent
Kee-Won Kwon1, Young-Wug Kim1
17 Jun 1992
TL;DR: In this paper, a high dielectric constant capacitance was proposed, which consists of at least a first dual-film layer, which includes a first tantalum oxide film, and a first metal oxide film which is made of a metal oxide whose valence is smaller than that of tantalum, and whose dielectoric constant is equal to or greater than the one of the metal oxide.
Abstract: A high dielectric constant film comprised of at least a first dual-film layer, which includes a first tantalum oxide film, and a first metal oxide film which is made of a metal oxide whose valence is smaller than that of tantalum, and whose dielectric constant is equal to or greater than that of tantalum oxide. The first metal oxide film preferably has a thickness of less than approximately 50 angstroms, in order to thereby avoid the formation of a columnar structure, which has been identified as a principal cause of the high leakage current problem which has plagued presently available high dielectric constant capacitors. The first tantalum oxide film preferably has a thickness in the range of between approximately 5 angstroms to approximately 200 angstroms, with the ratio of the thickness of the first tantalum oxide film to the thickness of the first metal oxide film being in the range of 1:10 to 100:1. The high dielectric constant film preferably further includes a plurality of additional dual-film layers formed on the first dual-film layer, to thereby provide a multilayer high dielectric constant film. Each of the additional dual-film layers is preferably of the same construction as that of the first dual-film layer. The present invention also encompasses a high dielectric constant capacitor which incorporates the above-described high dielectric constant film, and a method for manufacturing the same.

Patent
Tae-Hong Jung1
14 May 1992
TL;DR: In this paper, a picture adjusting method of a color television and its circuit for obtaining enhanced picture resolution by automatically adjusting the contrast, a brightness and sharpness of a picture in accordance with the ambient brightness, picture brightness, magnitude of RF signals and viewing distances of a remote controller from a television screen, utilizing either a set of fuzzy logic rules with fuzzy logic reasoning, or a look-up table having data corresponding to the detected ambient brightness.
Abstract: The present invention relates to a picture adjusting method of a color television and its circuit for obtaining enhanced picture resolution by automatically adjusting the contrast, a brightness and sharpness of a picture in accordance with the ambient brightness, picture brightness, magnitude of RF signals and viewing distances of a remote controller from a television screen, utilizing either a set of fuzzy logic rules with fuzzy logic reasoning, or a look-up table having data corresponding to the detected ambient brightness, picture brightness, magnitude of the RF signals and the viewing distances of the remote controller from the television screen.

Patent
Chan-Sok Park1, Young-Gwon Choi1, Dong-Jae Lee1, Do-Chan Choi1, Dong-Soo Jun1, Yong-Sik Seok1 
09 Nov 1992
TL;DR: In this paper, a high density semiconductor device is provided with an improved voltage pumping (bootstrapping) circuit, which generates at an initial power-up state a first output voltage which is substantially identical to the memory device source supply voltage.
Abstract: A high density semiconductor device is provided with an improved voltage pumping (bootstrapping) circuit. The voltage pumping circuit generates at an initial power-up state a first output voltage which is substantially identical to the memory device source supply voltage. The pumping circuit then pumps the first output voltage up to a second output voltage which is higher than the first output voltage. The pumping operation is achieved prior to or upon the semiconductor memory device being enabled in response to a series of pulses output from an oscillator.

Patent
Kangok Lee1
15 Dec 1992
TL;DR: In this article, a field emission display FED is manufactured by a method for manufacturing the FED comprising the steps of forming successively a conductive coating and first photoresist coating on a transparent insulating substrate; exposing the exposed column to the light and removing it except a part where a microtip is formed; etching the column through a selective isotropic or anisotropic etching process using the second photoresists pattern as the mask to form the sharp end of the microtip.
Abstract: A field emission display FED is manufactured by a method for manufacturing the FED comprising the steps of forming successively a conductive coating and first photoresist coating on a transparent insulating substrate; exposing the first photoresist coating to the light and removing it except a part where a microtip is formed; etching in a predetermined depth the conductive coating using the first photoresist pattern as a mask to form a plurality of columns; depositing an insulating coating on the etched and exposed conductive coating and removing the remaining first photoresist pattern by a lift off method; depositing and patterning a second photoresist coating on the exposed column and the insulating coating to form a second photoresist pattern in order that the thickness of the remaining second photoresist coating becomes smaller than that of the exposed column; etching the column through a selective isotropic or anisotropic etching process using the second photoresist pattern as the mask to form the sharp end of the microtip; and depositing a gate layer on the insulating coating and removing the remaining second photoresist pattern. As a result, the end of the microtip is formed under the surface of the gate so as to be less influenced by an ion bombardment thereby reducing the abrasion of the microtip.

Patent
14 Apr 1992
TL;DR: In this paper, the surface portion of the conductive structure or conductive layer is oxidized to form silicon oxide islands to be used as an etching mask and a dielectric film and a second electrode on the first electrode is formed.
Abstract: Disclosed is a method comprising forming a first electrode by forming a conductive layer on a semiconductor substrate, forming an etching mask on the conductive layer, etching the conductive layer and defining the conductive layer into cell units; and forming a dielectric film and a second electrode or the first electrode. Also disclosed is a method comprising forming a first electrode by forming a conductive structure on a semiconductor substrate, forming an etching mask on the conductive structure and etching the conductive structure; and forming a dielectric film and a second electrode on the first electrode. An insulating layer including pin holes such as a silicon nitride layer is formed on the conductive structure or the conductive layer; which is exposed under an oxidative atmosphere. The surface portion of the conductive structure or conductive layer is oxidized to form silicon oxide islands to be used as an etching mask. Since the method requires no specific process conditions, it is simple and extends the effective area of the cell capacitor, and is also applicable to various capacitor types.

Patent
Ku-Man Park1, Kim Tae-Eung1
03 Nov 1992
TL;DR: In this paper, a method for digital magnetic recording and reproducing of video images while compressively encoding video image data to reduce bit rate includes the steps of forming the compressed data into sync-block units corresponding to minimum units for error-correcting, recording compressed data as sync block units on a plurality of tracks of a digital magnetic tape, and Reproducing a recognizable image corresponding to the video image from the recorded compressed data.
Abstract: A method for digital magnetic recording and reproducing of video images while compressively encoding video image data to reduce a bit rate includes the steps of forming the compressed data into sync-block units corresponding to minimum units for error-correcting, recording the compressed data as sync block units on a plurality of tracks of a digital magnetic tape, and reproducing a recognizable image corresponding to the video image data from the recorded compressed data. According to one aspect of the method, the sync blocks are arranged so as to be recorded on the plurality of tracks using a line sequential scanning method in the track-traversing direction, and the arranged sync blocks are restored to their original locations during reproduction. A digital magnetic recording and reproducing apparatus suitable for implementing the above method is also disclosed.

Patent
Keon-Soo Kim1, Hyung-Kyu Lim1
13 Nov 1992
TL;DR: In this paper, a non-volatile semiconductor memory device comprising a semiconductor substrate, and a group of gates electrically isolated from each other and formed on the semiconductor substrategies is described.
Abstract: Disclosed is a non-volatile semiconductor memory device and the manufacturing method thereof. The non-volatile semiconductor memory device comprising a semiconductor substrate, and a group of gates electrically isolated from each other and formed on the semiconductor substrate, wherein the group of gates comprises a floating gate formed with a first conductive layer, a control gate formed with a second conductive layer laminated on the floating gate and select gates formed with the first conductive layer and the second conductive layer/formed on both the opposite side of the floating gate and the control gate and with an interposing impurity diffusion region formed on the semiconductor substrate, and wherein the select gates formed with the first conductive layer and the second conductive layer forms contacts on a field oxidation layer, thereby being connected with each other. The gate of the select transistor is formed as a first conductive layer by a self-aligned etching process and a butted contact process. Meanwhile, prior to forming a tunnel oxidized film, a buried n - layer is formed on a tunnel region pattern so as to be self-aligned, thereby reducing a distance between the select transistor and the storage transistor to within photolithographic processing limits so as to realize the high-integration of the EEPROM.

Patent
31 Jan 1992
TL;DR: In this paper, the authors present a method for manufacturing a semiconductor device, comprising the steps of forming an insulating interlayer with an opening, forming a first metal layer on the semiconductor intermediate product, heat-treating the first metal layers to fill up the opening with the metal, and then heat treating the second layer to planarize the metal layer, where pure Al or an aluminum alloy having no Si component is used as the metal in forming the metal.
Abstract: A method for manufacturing a semiconductor device, comprising the steps of forming an insulating interlayer on a semiconductor substrate to provide a semiconductor intermediate product, providing the insulating interlayer with an opening, forming a first metal layer on the semiconductor intermediate product, heat-treating the first metal layer to fill up the opening with the metal, forming a second metal layer on the first metal layer, and then heat-treating the second layer to planarize the metal layer. An alternative embodiment of the invention encompasses a method for manufacturing a semiconductor device, comprising the steps of providing a semiconductor wafer with an opening formed thereon, forming a metal layer on the semiconductor wafer, and then heat-treating the metal layer to fill up the opening with the metal, wherein pure Al or an aluminum alloy having no Si component is used as the metal in forming the metal layer.

Patent
Ji-hong Ahn1
22 Jul 1992
TL;DR: In this article, a semiconductor memory device and a method for manufacturing the same is described, which includes a process for manufacturing a capacitor performed by the steps of forming a first conductive layer on the semiconductor substrate, forming the first pattern composed of a 1st first-material layer and a first sidewall spacer composed of 1st second-material layers on the resultant structure.
Abstract: Disclosed are a semiconductor memory device and method for manufacturing the same The method includes a process for manufacturing a capacitor performed by the steps of forming a first conductive layer on a semiconductor substrate, forming a first pattern composed of a 1st first-material layer on the first conductive layer, forming a first sidewall spacer composed of 1st second-material layer on the resultant structure, and etching the material layer under the first sidewall spacer, using the first sidewall spacer as an etch-mask The semiconductor memory device thus manufactured can be highly integrated and is highly reliable

Patent
Hyun-Jin Cho1, Jang Taek-Yong1
30 Jun 1992
TL;DR: A semiconductor memory device and fabricating method thereof including one transistor consisting of a source, a drain and a gate electrode, a bit line in contact with the drain region of the transistor via a first contact hole, a storage electrode in contact to the source region via a second contact hole and a first planarized insulating layer formed under the bit line and a second planarised insulating layers formed under storage electrode, whereby the material layer is planarizing to prevent stringers created due to surface indentations.
Abstract: A semiconductor memory device and fabricating method thereof including one transistor consisting of a source, a drain and a gate electrode, a bit line in contact with the drain region of the transistor via a first contact hole, a storage electrode in contact with the source region of the transistor via a second contact hole, a first planarized insulating layer formed under the bit line and a second planarized insulating layer formed under the storage electrode, whereby the material layer formed under the conductive layers, eg, the bit line and storage electrode, is planarized to prevent stringers created due to surface indentations Further, after a spacer is formed directly on the side walls of contact hole or on the side walls of a pattern for forming the contact hole, the contact hole is formed to prevent the contact between conductive layers, as a result, improving the memory device's reliability and being advantageous in realizing high density

Patent
Cecil H. Kaplinsky1
16 Apr 1992
TL;DR: In this paper, a CMOS flip-flop circuit that includes master and slave inverter latches, a pass transistor for opening and closing access of the master latch input to an input signal D, and a special driver circuit between the master and slaves latches to pull the input of the slave latch either up or down depending on the logic level of the output.
Abstract: A CMOS flip-flop circuit that includes master and slave inverter latches, a pass transistor for opening and closing access of the master latch input to an input signal D, and a special driver circuit between the master and slave latches to pull the input of the slave latch either up or down depending on the logic level of the master latch output. The pass transistor and driver circuit are responsive to a control signal, supplied by complementary clock signals or by multiplexers that select either the clock signals or a fixed logic high signal, to activate a conductive path to the inputs of respective master and slave latches. The driver circuit includes four transistors connected, so that first and second transistors are in series and third and fourth transistors are in series, to form two parallel paths from two logic level sources to the slave latch input. First and third transistors are driven by the master latch output, while second and fourth transistors are driven by the control signal to the drive circuit. The two logic level sources connected to the first and third transistors may be fixed logic high and low voltage levels for conventional flip-flop operation or to multiplexers, each selecting either a logic high or a logic low voltage level, for programmable polarity of the flip-flop output. Placing latches enabled by the pass transistor control signal between the multiplexers and the first and third transistors and increasing the selection of the multiplexers to include complementary slave latch output feedback signals provides programmable D-type or toggle flip-flop operation. The multiplexer's nontoggle selection signal may be fixed or dynamically variable through a configuration multiplexer for dynamic polarity of the flip-flop's output.

Patent
01 Oct 1992
TL;DR: In this article, a method for manufacturing a semiconductor device including an isolation region defined by trenches having different or equal widths respectively on a single semiconductor substrate comprising the steps of: forming insulating films on the substrate and then forming an aperture on a passive region (isolation region); forming spacers of etch rate different from that of the insulating film on sidewalls of the aperture to define ring-shaped trench regions surrounding outline of active regions.
Abstract: There is disclosed in the present invention a method for manufacturing a semiconductor device including an isolation region defined by trenches having different or equal widths respectively on a single semiconductor substrate comprising the steps of: forming insulating films on the semiconductor substrate and then forming an aperture on a passive region (isolation region); forming spacers of etch rate different from that of the insulating films on sidewalls of the aperture to define ring-shaped trench regions surrounding outline of active regions; forming another insulating film of etch rate different from that of the spacers on the substrate where the spacers are defined and removing the spacers by etching to expose the substrate within the etched spacers; and forming trenches on the exposed area of the substrate, forming an insulating film of equal character to that of the insulating films used at the time of the formation of the aperture to refill the trenches and forming the spacers on the sidewalls of the insulating film in the passive region, thereby forming ring-shaped trenches surrounding the outlines of the active regions to be an isolation region.

Patent
09 Sep 1992
TL;DR: In this article, the authors present a digital data storage system which does not require the use of moving, mechanical components, and which utilizes semiconductor memory elements, such as a ROM, a system control microcomputer, a DSP, and a D/A converter.
Abstract: A digital data storage system which does not require the use of moving, mechanical components, and which utilizes semiconductor memory elements. In one embodiment, the digital data storage system includes a ROM, a system control microcomputer, a digital signal processor (DSP), and a D/A converter. In operation, the DSP is responsive to control signals generated by the system control microcomputer for reading out digital data, e.g., digital audio data, stored in the ROM, and decoding the read-out digital data. The D/A converter functions to convert the decoded read-out digital data into an analog output signal, e.g., an analog audio signal, and to supply the analog output signal to an output terminal. The digital data storage system of this embodiment is a playback-only system. In another embodiment, the digital data storage system includes all of the elements of the above-described embodiment, and further includes an A/D converter and an EEPROM, to facilitate the recording of digital data. In operation, during a record mode of operation, the A/D converter functions to convert an input analog signal, e.g., an analog audio signal, into an input digital data signal, and the DSP functions, in response to the control signals, to write the input digital data signal into the EEPROM. The digital data storage device of this embodiment functions as a record/playback system.

Patent
13 Nov 1992
TL;DR: In this article, the surface area of the capacitor electrode is remarkably enhanced such that the integrity of DRAMs is more improved, by using a polysilicon layer having a rough surface after a nonconductive layer is applied to a base substrate.
Abstract: The present invention provides a semiconductor device having a capacitor that is formed through: a first step of forming a polysilicon layer having a rough surface after a nonconductive layer is applied to a base substrate; a second step of etching back away the polysilicon layer to expose the nonconductive layer and thus remaining islandlike polysilicon layers; a third step of etching the nonconductive layer, using the remained polysilicon layers as an etching mask; a fourth step of etching the base substrate of the capacitor, using the nonconductive layer as a mask; a fifth step of forming a pattern of the base substrate of the capacitor after the removal of the remained nonconductive layer; a sixth step of forming an upper substrate of the capacitor after the formation of a dielectric film of the capacitor. According to this invention, the surface area of the capacitor electrode is remarkably enhanced such that the integrity of DRAMs is more improved.

Patent
19 Nov 1992
TL;DR: In this paper, a video RAM with a random access memory, a serial access memory and a block selector for high speed data processing is described, where a serial write transfer operation for transferring data stored in the serial access RAM to the random access RAM is performed by writing the serial write data on all serial accessmemory blocks and then transmitting, theserial write data selectively to the desired blocks of the RAM.
Abstract: A video RAM having a random access memory, a serial access memory, and a block selector for high speed data processing is disclosed. A serial write transfer operation for transferring data stored in the serial access memory to the random access memory is performed by writing the serial write data on all serial access memory blocks and then transmitting, the serial write data selectively to the desired blocks of the random access memory.

Patent
Jaehong Ko1, Sungtae Kim1, Hyunbo Shin1
23 Apr 1992
TL;DR: In this article, a capacitor includes a first conductive layer having a plurality of cylindrical sections, dielectric film formed along the surface of the cylinders, and a second conductive substrate formed thereon.
Abstract: A capacitor includes a first conductive layer having a plurality of cylindrical sections, dielectric film formed along the surface of the cylindrical sections and a second conductive substrate formed thereon. A semiconductor device is formed with the capacitor, has an increased capacitance and the integration of the semiconductor device is improved.

Patent
Sung C. Kang1, Kyung M. Kim1
11 May 1992
TL;DR: A sterilizing/deodorizing apparatus for a refrigerator comprises an air intake section for introducing air thereinto, a sterilizing and deodorizing section including a discharge lamp to remove floating bacteria, odors, and the like contained in the air which passes through the intake section, a discharge section for discharging purified air as mentioned in this paper.
Abstract: A sterilizing/deodorizing apparatus for a refrigerator comprises an air intake section for introducing air thereinto, a sterilizing/deodorizing section including a discharge lamp to remove floating bacteria, odors, and the like contained in the air which passes through the intake section, a discharge section for discharging purified air The apparatus is operated automatically by a temperature sensor or by an odor detector