Samsung

About: Samsung is a company organization based out in Seoul, South Korea. It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 134067 authors who have published 163691 publications receiving 2057505 citations. The organization is also known as: Samsung Group & Samsung chaebol.

Write Current Reduction in Transition Metal Oxide Based Resistance-Change Memory**

Abstract: while still retaining a selective switch (transistor or diode) asthe data storage element. Thus for high-density applications,crossbar structures are ideal, whereas for non-volatility, resis-tance-change materials showthe best promise. In orderto rea-lize the fabrication of universal memory elements, it is im-perative to develop a class of materials and structures thatcombine robust processibility, strong scalability, and rapidprogramming speed with non-volatility and low power con-sumption. In our work, we have focused on defining just thestorage node portion of the devices, which utilize the resis-tance change within the film to store information via two dif-ferent stable resistance states. Here, we have attempted to de-termine the properties of such structures and to study themechanisms behind resistance RAM (RRAM) storage. OurTi-doped (0.1 wt %) NiO samples deposited at room temper-ature show favorable node characteristics such as the lowestwrite current reported thus far for a unipolar switching resis-tance-change-based device (ca. 10 lA). In addition, the pro-gramming speed is comparable to the write time of SRAM(10 ns). By combining this node element with an appropriateselect switch, such as a high-performance diode, a thresholddevice, or a two-terminal non-ohmic device, it becomes possi-ble to fabricate high-density universal memory.Indeed, the fabrication of universal memory as the nextgeneration of non-volatile memory is the logical goal for re-search in this field. In comparison to Flash and dynamicRAM (DRAM), which are the current industry standards,next generation memories must combine the non-volatility ofFlash with the high-speed performance of SRAM.

Memory device and memory programming method

Abstract: Provided are memory devices and memory programming methods. A memory device may include a multi-bit cell array including a plurality of multi-bit cells, a programming unit configured to program a first data page in the plurality of multi-bit cells and to program a second data page in the multi-bit cells with the programmed first data page, a first controller configured to divide the multi-bit cells with the programmed first data page into a first group and a second group, and a second controller configured to set a target threshold voltage interval of each of the multi-bit cells included in the first group based on first read voltage levels and the second data page, and to set a target threshold voltage interval of each of the multi-bit cells included in the second group based on second read threshold voltage levels and the second data page.

Uplink transmission power control method and apparatus for a distributed antenna mobile communication system

Abstract: An uplink power control method and apparatus of a terminal in a mobile communication system are provided. The method includes receiving, by the terminal, a location parameter corresponding to at least one antenna selected among a plurality of antennas distributed in a service area of a base station, each of the plurality of antennas being connected to the base station; and calculating uplink power based on the location parameter.

Apparatus and method for cooperative relay in a wireless communication system based on relay stations

Abstract: An apparatus and method for cooperative relay in a multiple-antenna wireless communication system based on relay stations (RSs) are provided. The apparatus includes a serial/parallel converter for dividing data into N number of streams, a channel estimator for calculating a first transmission rate at which a RS performing the cooperative relay can perform decoding and a second transmission rate at which all relay stations performing the cooperative relay can commonly perform decoding, and determining transmission rates for each of the N-number streams, and an adaptive modulation and coding (AMC) unit for encoding and modulating the N-number streams according to their respective transmission rates.

A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel $\Delta \Sigma$ ADC Architecture

Abstract: This paper presents a 2.1 M pixel, 120 frame/s CMOS image sensor with column-parallel delta-sigma (ΔΣ) ADC architecture. The use of a second-order ΔΣ ADC improves the conversion speed while reducing the random noise (RN) level as well. The ΔΣ ADC employing an inverter-based ΔΣ modulator and a compact decimation filter is accommodated within a fine pixel pitch of 2.25-μm and improves energy efficiency while providing a high frame-rate of 120 frame/s. A prototype image sensor has been fabricated with a 0.13-μm CMOS process. Measurement results show a RN of 2.4 erms- and a dynamic range of 73 dB. The power consumption of the prototype image sensor is only 180 mW. This work achieves the energy efficiency of 1.7 e-·nJ.