Spansion

About: Spansion is a based out in . It is known for research contribution in the topics: Layer (electronics) & Flash memory. The organization has 1456 authors who have published 1383 publications receiving 15154 citations. The organization is also known as: Spansion LLC.

Tamper reactive memory device to secure data from tamper attacks

Abstract: Systems and methods that can facilitate securing data associated with a memory from tampering are presented. A counter tamper component can detect tamper attacks or tamper attempts associated with a memory and/or data stored therein or associated therewith and reacts to such tamper attacks/attempts, as the counter tamper component can provide evidence of, provide a response to, and/or resist tamper attacks/attempts. The counter tamper component can be associated with a memory module that includes a memory device(s) module and is contained in an electronic device and the memory module can change a color state to provide evidence of tampering. A window component is positioned on the casing of the electronic device so that the memory module is visible to the user so the user can perceive that a tamper attack associated with the module has occurred.

Non-volatile resistive switching for advanced memory applications

Abstract: A non-volatile resistive switching mechanism based on trap-related space-charge-limited-conduction (SCLC) is proposed Excellent memory characteristics have been demonstrated using near-stoichiometric cuprous oxide (CuxO) metal-insulator-metal (MIM) structures: low-power operation, fast switching speed, superior temperature characteristics, and long retention This MIM memory cell is fully compatible with standard CMOS process The proposed switching mechanism is a strong contender for high density and low cost memory applications

A Low-Power Nonvolatile Switching Element Based on Copper-Tungsten Oxide Solid Electrolyte

Abstract: We describe the materials aspects and electrical characteristics of W-(Cu/WO3)-Cu switching elements. These materials are compatible with back-end-of-line processing in CMOS integrated circuits where both tungsten and copper already play a significant role. Devices based on Cu/WO3 solid electrolytes formed by photodiffusion of copper into tungsten oxide switch via the electrochemical formation of a conducting filament within the high resistance electrolyte film. They are able to switch reversibly between widely spaced nonvolatile resistance states at low voltage ( 125 degC). This difference in behavior was attributed to the observation that the copper tends to oxidize in the plasma-grown oxide whereas the copper in the deposited oxide exists in an unbound state and is, therefore, more able to participate in the switching process

Nonvolatile semiconductor memory device programming second dynamic reference cell according to threshold value of first dynamic reference cell

Abstract: In a nonvolatile semiconductor memory device, first and second dynamic reference cells are subjected to a same rewriting operation as performed to a memory cell. An average reference current is obtained from the first and second dynamic reference cells, and is compared with a current of data read from the memory cell so as to judge a level of the read data. In this configuration, the second dynamic reference cell is programmed according to a threshold value of the first dynamic reference cell.

Recovery while programming non-volatile memory (NVM)

Abstract: A method of performing recovery in conjunction with programming an array of NVM cells. First, erasing the array cells and loading an SRAM with user data. When programming the cells, flip bits in the SRAM which are successfully programmed (pass PV). If programming is not successful, read the failed data from the array, and if the SRAM bits were not successfully programmed, do not change them. Write the other bits (not programmed or successfully programmed) from the array to the SRAM. Before reading the failed data, the SRAM may be copied to a second SRAM. If the restore did not work, an ED mechanism may be applied, and if the ED bits to not align with the data, move a read reference (RD), copy the second SRAM to the original SRAM, and attempt reading again, until the data is successfully recovered.