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Showing papers by "STMicroelectronics published in 1973"


Patent
25 Oct 1973
TL;DR: An integrated circuit and process for manufacturing the same is disclosed in this paper, which comprises both depletion and enhancement mode field effect transistors, each having silicon gates and self-aligned gate regions.
Abstract: An integrated circuit and process for manufacturing same is disclosed. The integrated circuit comprises both depletion and enhancement mode field effect transistors, each having silicon gates and self-aligned gate regions. The process includes forming a thick oxide layer on the substrate, removing the thick oxide at the transistor sites, forming a thin oxide at the transistor sites, masking selected transistor sites to selectively implant ions at the other sites, depositing a polysilicon layer over the slice and patterning the polysilicon layer to form gate electrodes, removing the thin oxide using the polysilicon gate electrodes as masks, diffusing the source and drain regions, forming an insulating oxide, then applying the source drain and gate contacts and interconnects.

31 citations


Patent
18 May 1973
TL;DR: In this article, a dynamic random access memory utilizing MOSFET transistors formed on a single semi-conductor chip is described, which utilizes 1,024 binary storage cells arrayed in rows and columns.
Abstract: A dynamic random access memory utilizing MOSFET transistors formed on a single semi-conductor chip is described. The random access memory utilizes 1,024 binary storage cells arrayed in rows and columns. Each row of cells has a read line and a write line. Each column of cells has one data line used for both read and write functions. Each cell is comprised of a write transistor and a pair of read transistors. The write transistor couples a capacitive storage node to the data line and is controlled by the write line.

4 citations