Showing papers by "STMicroelectronics published in 1978"

Extremely low current load device for integrated circuit

Abstract: A MOSFET random access memory having an extremely low current load memory cell is disclosed. The memory cell comprises a cross-coupled binary stage in which one or more paths to ground can be selectively switched on or off through true and complement data nodes. Impedance means connect a power supply node to the data nodes for charging the data nodes to predetermined voltage levels. The impedance means comprise an intrinsic-extrinsic junction of a substantially pure, intrinsic semiconductor material and a diffusion of extrinsic conductivity impurities disposed within a region of the intrinsic semiconductor material. The impedance means is formed by an isoplanar silicon gate process as an integral portion of a polycrystalline silicon strip which interconnects the power supply node to a data node. A portion of the polycrystalline silicon strip is extended from the data node to form the gate of the transistor to which it is cross-coupled.

Substrate surface prodn. for isoplanar semiconductor device

Abstract: Prodn. of a substrate surface of an isoplanar semiconductor device involves (a) forming a thin oxide film on a Si semiconductor substrate; (b) forming a Si nitride pattern on the oxide film over the region of the substrate to form an active zone; (c) growing a thick isoplanar field oxide in the regions of the substrate not covered with Si nitride; (d) removing the nitride and the underlying oxide film to expose the substrate surface in the active zone; (e) growing a new oxide film in the active zone to a thickness great enough to remove crystal defects from the substrate surface and deposited Si nitride from the parts of the active zone bounded by the field oxide; and (f) removing the new oxide film.The process is used in the prodn. of FETs and cells for random access memories