scispace - formally typeset
Search or ask a question
Institution

STMicroelectronics

CompanyGeneva, Switzerland
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.


Papers
More filters
Proceedings ArticleDOI
04 Dec 2007
TL;DR: This paper presents the estimation of the non-binary decoder implementation and key metrics including throughput and hardware complexity, and presents the error decoding performance of the low complexity algorithm with proper compensation has been obtained through computer simulations.
Abstract: In this paper, we propose a hardware implementation of the EMS decoding algorithm for non-binary LDPC codes, presented in [10]. To the knowledge of the authors this is the first implementation of a GF(q) LDPC decoder for high order fields (q ges 64). The originality of the proposed architecture is that it takes into account the memory problem of the non-binary LDPC decoders, together with a significant complexity reduction per decoding iteration which becomes independent from the field order. We present the estimation of the non-binary decoder implementation and key metrics including throughput and hardware complexity. The error decoding performance of the low complexity algorithm with proper compensation has been obtained through computer simulations. The frame error rate results are quite good with respect to the important complexity reduction. The results show also that an implementation of a non-binary LDPC decoder is now feasible and the extra complexity of the decoder is balanced by the superior performance of this class of codes. With their foreseen simple architectures and good-error correcting performances, non-binary LDPC codes provide a promising vehicle for real-life efficient coding system implementations.

72 citations

Proceedings Article
01 Sep 1995
TL;DR: This paper presents the design and characterization of a single poly EEPROM cell, optimized for embedded applications, and characterized by a good shrink potential, which shows the possibility of achieving a programming time of less than 1 ms and an endurance of more than 10 million cycles.
Abstract: An increasing number of Integrated Circuits requires the embedding of a limited amount (up to 16-64 kbits) of EEPROM memory For this application, low process complexity, robust structure and good reliability are more important than small cell size In this paper we present the design and characterization of a single poly EEPROM cell, optimized for embedded applications, and characterized by a good shrink potential A cell area of 687?m2 has been obtained in 07?m technology, and electrical characterization has shown the possibility of achieving a programming time of less than 1 ms, while an endurance of more than 10 million cycles has been achieved at 125°C, with a programming time of 2 ms By further shrink of the same basic layout, cell areas of 55?m2 and 44?m2 have been obtained, and the similar programming and endurance performances have been demonstrated

71 citations

Patent
Romain Coffy1
20 Apr 2006
TL;DR: In this paper, an electronic device protected against electromagnetic disturbances comprising of a support structure having a first and second electronic component, wherein the support structure includes a conductive means surrounding each of the first and two electronic components, a first-and second-layer insulating block formed overlying the first-, second-and third-layer electronic components on the structure, and a metal layer overlying both the first-layer and the secondlayer.
Abstract: An electronic device protected against electromagnetic disturbances comprising: a support structure having a first and second electronic component, wherein the support structure includes a conductive means surrounding each of the first and second electronic components; a first and second insulating block formed overlying the first and second electronic components on the support structure; and a metal layer overlying the first and second insulating blocks that are formed over the first and second electronic components, wherein the metal layer is electrically connected to the support structure through the conductive means to protect the first and second electronic components from the electromagnetic disturbances irradiating from each of the first and second electronic components.

71 citations

Proceedings ArticleDOI
15 Jun 2010
TL;DR: In this paper, a gate length of 25nm and competitive drive currents of 1.27 mV·µm were achieved by using a gate-first high-k/metal and raised source/drains (RSD).
Abstract: We present UTBB devices with a gate length (L G ) of 25nm and competitive drive currents. The process flow features conventional gate-first high-k/metal and raised source/drains (RSD). Back bias (V bb ) enables V t modulation of more than 125mV with a V bb of 0.9V and BOX thickness of 12nm. This demonstrates the importance and viability of the UTBB structure for multi-V t and power management applications. We explore the impact of GP, BOX thickness and V bb on local V t variability for the first time. Excellent A Vt of 1.27 mV·µm is achieved. We also present simulations results that suggest UTBB has improved scalability, reduced gate leakage (I g ) and lower external resistance (R ext ), thanks to a thicker inversion gate dielectric (T inv ) and body (T si ) thickness.

71 citations

Proceedings Article
01 Jan 2011
TL;DR: The main emphasis is to make potentially interested researchers aware of the CSIRO-Mk3.6.0 climate model submission and to elucidate the range and features of the datasets that are now available, to illustrate the usefulness of this dataset in this research area.
Abstract: The participation of the CSIRO-Mk3.6.0 Atmosphere Ocean Global Climate Model (AOGCM) in the Coupled Model Intercomparison Project Phase 5 (CMIP5) is a joint initiative between the Queensland Climate Change Centre of Excellence and the Commonwealth Scientific and Industrial Research Organisation (CSIRO). It now has approximately 10 research and support scientists working on this project which first began in 2009. This on-going project consists of the following four main components:• A model design and testing period to ensure that the model had acceptable configuration for participation in CMIP5, in particular, exhibiting a realistic present-day climate and a stable preindustrial climate;• A model integration phase where CMIP5 experiments were performed. These were to include the so-called "core" experiments plus a number of "tier1" and "tier2" experiments, which will constitute a significant submission to CMIP5 and to address local climate modelling needs and applications;• Post-processing of the raw CSIRO-Mk3.6.0 model output into internationally recognised and standardized CMIP5 form; and • Quality control and publication phase of the CSIRO-Mk3.6.0 data to ensure entry into the Earth System Grid (ESG) Federation, allowing it to be disseminated to the CMIP5 international community. In this paper the four phases of this climate modelling project will be discussed in detail. The main emphasis is to make potentially interested researchers aware of the CSIRO-Mk3.6.0 climate model submission and to elucidate the range and features of the datasets that are now available. The CMIP5 datasets are being hosted on the ESG which consists of international data nodes and gateways, including Australia's own node hosted by the National Computing Infrastructure (NCI) National Facility in Canberra. A key outcome of our efforts is the generation of over 150, mostly high priority, uniquely defined parameters from the list of requested model output to understand climate processes and also produce new climate change projection data for impact assessment. Some preliminary results of the CSIRO-Mk3.6.0 model are presented to illustrate the usefulness of this dataset in this research area.

71 citations


Authors

Showing all 17185 results

NameH-indexPapersCitations
Bharat Bhushan116127662506
Albert Polman9744542985
G. Pessina8482830807
Andrea Santangelo8388629019
Paolo Mattavelli7448219926
Daniele Ielmini6836716443
Jean-François Carpentier6245914271
Robert Henderson5844013189
Bruce B. Doris5660412366
Renato Longhi551778644
Aldo Romani5442511513
Paul Muralt5434412694
Enrico Zanoni5370513926
Gaudenzio Meneghesso5170312567
Franco Zappa502749211
Network Information
Related Institutions (5)
Intel
68.8K papers, 1.6M citations

92% related

Motorola
38.2K papers, 968.7K citations

91% related

Samsung
163.6K papers, 2M citations

90% related

NEC
57.6K papers, 835.9K citations

89% related

Toshiba
83.6K papers, 1M citations

89% related

Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202225
2021560
2020798
2019952
2018948
2017781