STMicroelectronics

About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.

Countermeasures against fault attacks on software implemented AES: effectiveness and cost

Abstract: In this paper we present software countermeasures specifically designed to counteract fault injection attacks during the execution of a software implementation of a cryptographic algorithm and analyze the efficiency of these countermeasures We propose two approaches based on the insertion of redundant computations and checks, which in their general form are suitable for any cryptographic algorithm In particular, we focus on selective instruction duplication to detect single errors, instruction triplication to support error correction, and parity checking to detect corruption of a stored value We developed a framework to automatically add the desired countermeasure, and we support the possibility to apply the selected redundancy to either all the instructions of the cryptographic routine or restrict it to the most sensitive ones, such as table lookups and key fetching Considering an ARM processor as a target platform and AES as a target algorithm, we evaluate the overhead of the proposed countermeasures while keeping the robustness of the implementation high enough to thwart most or all of the known fault attacks Experimental results show that in the considered architecture, the solution with the smallest overhead is per-instruction selective doubling and checking, and that the instruction triplication scheme is a viable alternative if very high levels of injected fault resistance are required

Management of erase operations in storage devices based on flash memories

Abstract: A method of freeing physical memory space in an electrically alterable memory that includes a plurality of physical memory blocks includes a plurality of physical memory pages. Each physical memory block may be individually erased as a whole, and which memory is used to emulate a random access logical memory space including a plurality of logical memory sectors by storing updated versions of a logical memory sector data into different physical memory pages. The method includes causing a most recent version of multiple versions of logical memory sector data, stored in physical pages of at least one physical memory block, to be copied into an unused physical memory block, marking the at least one physical memory block, and when the electrically alterable memory is idle, erasing the marked physical memory block.

Dielectric properties of epoxy/silica composites used for microlectronic packaging, and their dependence on post-curing

Abstract: We studied the dielectric properties (dielectric constant and loss factor) of epoxy molding compounds used for electronic packaging, as a function of frequency (100 Hz–100 kHz) and temperature (25–100 °C). Studies were performed for samples with different formulations (various silica and carbon black contents). At room temperature a loss peak is found at 50 kHz, whose intensity is enhanced by carbon black addition. Additional loss is detected below 1 kHz when the temperature is increased up to 100 °C. We also studied the influence of post-mold curing time (0–12 h at 165 °C) on the dielectric properties. The dielectric constant monotonically decreases with post-mold cure to level off to a minimum value for long post-cure durations. The loss factor first increases for short post-curing times, and then decreases as post-cure is continued. The origin of loss is discussed with reference to common relaxation processes observed in epoxy polymers.

Video/audio decompression/compression device including an arbiter and method for accessing a shared memory

Abstract: An electronic system provides direct access between a first device and a decoder/encoder and a memory The electronic system can be included in a computer in which case the memory is a main memory Direct access is accomplished through one or more memory interfaces Direct access is also accomplished in some embodiments by direct coupling of the memory to a bus, and in other embodiments, by direct coupling of the first device and decoder/encoder to a bus The electronic system includes an arbiter for determining access for the first device and/or the decoder/encoder to the memory for each access request The arbiter may be monolithically integrated into a memory interface of the decoder/encoder or the first device The decoder may be a video decoder configured to decode a bit stream formatted to comply with the MPEG-2 standard The memory may store predicted images which are obtained from a single preceding image and may also store intra images Bidirectional images which are directly supplied to a display adapter may be obtained from two preceding intra or predicted images

Efficient multi-V T FDSOI technology with UTBOX for low power circuit design

Abstract: For the first time, Multi-V T UTBOX-FDSOI technology for low power applications is demonstrated. We highlight the effectiveness of back biasing for short devices in order to achieve I ON current improvement by 45% for LVT options at an I OFF current of 23nA/µm and a leakage reduction by 2 decades for the HVT one. In addition, fully functional 0.299um2 bitcells with 290mV SNM at 1.1V and Vb=0V operation were obtained. We also demonstrate on ring oscillators and 0.299µm2 SRAM bitcells the effectiveness (ΔV T versus V b ∼ 208mV/V) of the conventional bulk reverse and forward back biasing approaches to manage the circuit static power and the dynamic performances.