Institution
STMicroelectronics
Company•Geneva, Switzerland•
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Signal & Transistor. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.
Topics: Signal, Transistor, Layer (electronics), Integrated circuit, Voltage
Papers published on a yearly basis
Papers
More filters
•
11 Apr 2006TL;DR: In this paper, a non-volatile memory electronic device is integrated on a semiconductor and is of the Flash EEPROM type with an architecture of the NAND type including at least one memory matrix organized in rows or word lines and columns or bit lines of memory cells and with an associated row decoding circuit portion.
Abstract: A non-volatile memory electronic device is integrated on a semiconductor and is of the Flash EEPROM type with an architecture of the NAND type including at least one memory matrix organized in rows or word lines and columns or bit lines of memory cells and with at least one associated row decoding circuit portion. Advantageously, the matrix includes at least one logic sector with pairs of rows or word lines being short-circuited with each other and referring to a respective biasing terminal, one for each pair, and in that the row decoding circuit portion includes a single select block which controls a single multiplexer for the logic sector for the regulation of the signals applied to the biasing terminals.
62 citations
•
14 Jul 2005TL;DR: In this article, an electrically programmable memory including an array of a plurality of memory cells arranged accordingly to a NAND architecture is presented, where the means for detecting a failure of the memory block are described.
Abstract: An electrically programmable memory including: an array of a plurality of memory cells arranged accordingly to a NAND architecture, said memory cells grouped into a plurality of memory blocks and each memory block including a plurality of memory pages; means for receiving an address corresponding to a respective memory block; selecting means for selecting the addressed memory block; and means for detecting a failure of the addressed memory block, wherein the means for detecting a failure includes: a plurality of registers, each register corresponding to a respective memory block and storing an indication of the failure of the respective memory block; and means for reading the register corresponding to the addressed memory block in response to the receiving of the address, and wherein the programmable memory further includes at least one redundant memory block of memory cells including a plurality of redundant memory pages, the selecting means selecting the at least one redundant memory block in place of the addressed memory block in response to the reading of the indication of the failure.
62 citations
•
29 Nov 1993TL;DR: In this article, the memory matrix is subdivided into cells, where each cell has four memory cells arranged symmetrically about a bit line in two rows and two columns, and each cell is connected to the bit line at a common electrical node, wherein selected cells are connected to a column line.
Abstract: A semiconductor read only memory device includes memory cells arranged in a matrix of rows and columns; word lines crossing the matrix, wherein one word line is connected to each row of memory cells; and bit lines interdigitated with column lines and positioned such that each column of memory cells is between a bit line and a column line. The matrix is subdivided into cells, where each cell has four memory cells arranged symmetrically about a bit line in two rows and two columns. All four of the cells are connected to the bit line at a common electrical node, wherein selected cells are connected to a column line. The memory device also includes a row select driver for selecting memory cells in a single row; a column select driver for selecting a single column line; and circuitry for selecting one of the bit lines adjacent to a column line.
62 citations
••
TL;DR: The proposed technique allows obtaining safe commutations of the switches by simple and effective control circuits acting on the gate side of the power devices by preventing overvoltage peaks on the devices.
Abstract: In the field of power electronics, the use of series-connected insulated gate devices, such as insulated gate bipolar transistors or power MOSFETs, is interesting in order to obtain fast and efficient power switches in medium-range power converters. In this kind of application, the control of the voltage sharing across the series strings of devices is an important aspect to be considered. The proposed technique allows obtaining safe commutations of the switches by simple and effective control circuits acting on the gate side of the power devices. In particular, the gate drive units are arranged in order to ensure good performance during the switching transients, while preventing overvoltage peaks on the devices. Both the design criteria and analysis of the control circuit are developed. Several experimental tests are reported in order to demonstrate the validity and correctness of the proposed approach.
62 citations
••
TL;DR: This fully integrated imaging radar demonstrates the highest sensitivity and radiation efficiency among all imaging systems around 200 GHz and is capable of practical 2-D and 3-D imaging with significantly lower dc power consumption compared to the state-of-the-art FMCW radars.
Abstract: A 170-GHz fully integrated single-chip heterodyne frequency modulated continuous-wave (FMCW) imaging radar using a 130-nm SiGe BiCMOS technology ( $f_{T}/f_{\max } = 220/280$ GHz) is reported. This system demonstrates a wide bandwidth of 27.5 GHz (16.3%) at a center frequency of 168 GHz. A design methodology to maximize the tuning range of the voltage-controlled oscillator (VCO) is presented. A co-design of the VCO, coupler, and antenna is performed to minimize the chip area and the dc power consumption. The transmitter radiates a peak power of −1 dBm with a dc-to-RF efficiency of 1.42%. At the receiver side, a subharmonic mixer is used for signal down-conversion. The system achieves a measured sensitivity of 87 fW with a total dc power consumption of 67 mW. The prototype is capable of forming 2-D and 3-D images with a range resolution of 7 mm. To the best of our knowledge, this fully integrated imaging radar demonstrates the highest sensitivity and radiation efficiency among all imaging systems around 200 GHz. Moreover, the system is capable of practical 2-D and 3-D imaging with significantly lower dc power consumption compared to the state-of-the-art FMCW radars.
62 citations
Authors
Showing all 17185 results
Name | H-index | Papers | Citations |
---|---|---|---|
Bharat Bhushan | 116 | 1276 | 62506 |
Albert Polman | 97 | 445 | 42985 |
G. Pessina | 84 | 828 | 30807 |
Andrea Santangelo | 83 | 886 | 29019 |
Paolo Mattavelli | 74 | 482 | 19926 |
Daniele Ielmini | 68 | 367 | 16443 |
Jean-François Carpentier | 62 | 459 | 14271 |
Robert Henderson | 58 | 440 | 13189 |
Bruce B. Doris | 56 | 604 | 12366 |
Renato Longhi | 55 | 177 | 8644 |
Aldo Romani | 54 | 425 | 11513 |
Paul Muralt | 54 | 344 | 12694 |
Enrico Zanoni | 53 | 705 | 13926 |
Gaudenzio Meneghesso | 51 | 703 | 12567 |
Franco Zappa | 50 | 274 | 9211 |