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Institution

STMicroelectronics

CompanyGeneva, Switzerland
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.


Papers
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Journal ArticleDOI
TL;DR: For the first time, an accurate life prediction model is proposed for board level drop test to estimate the number of drops to failure for a package, and a failure-free state can be determined, and drop test performance of new package design can be quantified, and further enhanced through modeling.

200 citations

Patent
02 Aug 2011
TL;DR: In this article, a solution for managing a storage device based on a flash memory is proposed, which starts with the step for mapping a logical memory space of the storage device (including a plurality of logical blocks) on a physical memory space.
Abstract: A solution for managing a storage device based on a flash memory is proposed. A corresponding method starts with the step for mapping a logical memory space of the storage device (including a plurality of logical blocks) on a physical memory space of the flash memory (including a plurality of physical blocks, which are adapted to be erased individually). The physical blocks include a set of first physical blocks (corresponding to the logical blocks) and a set of second—or spare—physical blocks (for replacing each bad physical block that is unusable). The method continues by detecting each bad physical block. Each bad physical block is then discarded, so to prevent using the bad physical block for mapping the logical memory space.

200 citations

Proceedings ArticleDOI
02 Oct 2006
TL;DR: In this article, a 90nm technology node phase change memory (PCM) process, based on a chalcogenide material storage element with a vertical pnp bipolar junction transistor (BJT) selector device, is presented.
Abstract: A 90nm technology node phase change memory (PCM) process, based on a chalcogenide material storage element with a vertical pnp bipolar junction transistor (BJT) selector device, is presented. The small cell area of 12F2, the good electrical results, and the intrinsic reliability demonstrate the viability of the PCM cell concept. Programming currents as low as 400muA, very good distributional data achieved on multi-megabit arrays for programming (set and reset), endurance, and retention, demonstrate the suitability of PCM for fabrication of a high density array at 90nm

195 citations

Journal ArticleDOI
TL;DR: In this article, a comprehensive study of the mechanisms of Ohmic contact formation on GaN-based materials is presented, discussing the role of single metals composing the stack and the modification induced by the thermal annealing, either on the metal layers or at the interface with GaN.

194 citations

Proceedings ArticleDOI
12 Mar 2012
TL;DR: P2012 is an area- and power-efficient many-core computing fabric based on multiple globally asynchronous, locally synchronous (GALS) clusters supporting aggressive fine-grained power, reliability and variability management.
Abstract: P2012 is an area- and power-efficient many-core computing fabric based on multiple globally asynchronous, locally synchronous (GALS) clusters supporting aggressive fine-grained power, reliability and variability management. Clusters feature up to 16 processors and one control processor with independent instruction streams sharing a multi-banked L1 data memory, a multi-channel DMA engine, and specialized hardware for synchronization and scheduling. P2012 achieves extreme area and energy efficiency by supporting domain-specific acceleration at the processor and cluster level through the addition of dedicated HW IPs. P2012 can run standard OpenCL and OpenMP parallel codes well as proprietary Native Programming Model (NPM) SW components that provide the highest level of control on application-to-resource mapping. In Q3 2011 the P2012 SW Development Kit (SDK) has been made available to a community of RD it includes full OpenCL and NPM development environments. The first P2012 SoC prototype in 28nm CMOS will sample in Q4 2012, featuring four clusters and delivering 80GOPS (with single precision floating point support) in 15.2mm2 with 2W power consumption.

194 citations


Authors

Showing all 17185 results

NameH-indexPapersCitations
Bharat Bhushan116127662506
Albert Polman9744542985
G. Pessina8482830807
Andrea Santangelo8388629019
Paolo Mattavelli7448219926
Daniele Ielmini6836716443
Jean-François Carpentier6245914271
Robert Henderson5844013189
Bruce B. Doris5660412366
Renato Longhi551778644
Aldo Romani5442511513
Paul Muralt5434412694
Enrico Zanoni5370513926
Gaudenzio Meneghesso5170312567
Franco Zappa502749211
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202225
2021560
2020798
2019952
2018948
2017781