STMicroelectronics

About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.

User adaptive BCIs: SSVEP and P300 based interfaces

Abstract: Brain Computer Interfaces (BCI) represent a new communication option for those suffering from neuromuscular impairment that prevents them from using conventional augmented communication methods. This new approach has been developing quickly during the last few years, thanks to the increasing of computational power and the new algorithms for signal processing (Independent Component Analysis, Wavelets decomposition, Support Vector Machine etc.) that can be applied to the studies made on brain waves. Here follows two methodologies of approach based on making the computer adapt to the human brain activity and not vice-versa. The P300 and the SSVEP based BCIs, here presented, have the characteristics of not demanding specific training to the user.

Multi- $V_{T}$ UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

Abstract: This paper analyzes the potential of fully depleted silicon-on-insulator (FDSOI) technology as a multiple threshold voltage VT platform for digital circuits compatible with bulk complementary metal-oxide-semiconductor (CMOS). Various technology options, such as gate materials, buried oxide thickness, back plane doping type, and back biasing, were investigated in order to achieve a technology platform that offers at least three distinct VT options (high-VT, standard- VT, and low-VT ). The multi-VT technology platform highlighted in this paper was developed with standard CMOS circuit design constraints in mind; its compatibility in terms of design and power management techniques, as well as its superior performance with regard to bulk CMOS, are described. Finally, it is shown that a multi-VT technology platform based on two gate materials offers additional advantages as a competitive solution. The proposed approach enables excellent channel electrostatic control and low VT variability of the FDSOI process. The viability of the proposed concept has been studied through technology computer-aided design simulations and demonstrated through experimental measurements on 30-nm gate length devices.

Component-based design approach for multicore SoCs

Abstract: This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitives to build complex architectures from basic components. This bottom up approach allows design-architects to explore efficient custom solutions with best performances. This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. The system specifications are represented as a virtual architecture described in a SystemC-like model and annotated with a set of configuration parameters. Our component-based design environment provides automatic wrapper-generation tools able to synthesize hardware interfaces, device drivers, and operating systems that implement a high-level interconnect API. This approach, experimented over a VDSL system, shows a drastic design time reduction without any significant efficiency loss in the final circuit.

A 25 dBm Digitally Modulated CMOS Power Amplifier for WCDMA/EDGE/OFDM With Adaptive Digital Predistortion and Efficient Power Control

Abstract: A digitally modulated power amplifier (DPA) in 1.2 V 0.13 mum SOI CMOS is presented, to be used as a building block in multi-standard, multi-band polar transmitters. It performs direct amplitude modulation of an input RF carrier by digitally controlling an array of 127 unary-weighted and three binary-weighted elementary gain cells. The DPA is based on a novel two-stage topology, which allows seamless operation from 800 MHz through 2 GHz, with a full-power efficiency larger than 40% and a 25.2 dBm maximum envelope power. Adaptive digital predistortion is exploited for DPA linearization. The circuit is thus able to reconstruct 21.7 dBm WCDMA/EDGE signals at 1.9 GHz with 38% efficiency and a higher than 10 dB margin on all spectral specifications. As a result of the digital modulation technique, a higher than 20.1 % efficiency is guaranteed for WCDMA signals with a peak-to-average power ratio as high as 10.8 dB. Furthermore, a 15.3 dBm, 5 MHz WiMAX OFDM signal is successfully reconstructed with a 22% efficiency and 1.53% rms EVM. A high 10-bit nominal resolution enables a wide-range TX power control strategy to be implemented, which greatly minimizes the quiescent consumption down to 10 mW. A 16.4% CDMA average efficiency is thus obtained across a > 70 dB power control range, while complying with all the spectral specifications.

Run-length encoding

Abstract: A method for run-length encoding two or more data values, the method comprising: loading the data values into storage by forming a first data string, the data string comprising a plurality of data sub-strings and each data sub-string representing at least one of the data values; generating a second data string having a data sub-string corresponding to each data sub-string of the first data string, all the bits of each of the data sub-strings of the second data string having a first predetermined value if all the bits of the corresponding data sub-string of the first data string have a second predetermined value and having a third predetermined value if any of the bits of the corresponding data sub-string of the first data string has other than the second predetermined value; starting from a predetermined end of the second data string, counting the number of consecutive bits of the second data spring having the first predetermined value; and dividing the said number by the number of bits in each data sub-string.