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Institution

STMicroelectronics

CompanyGeneva, Switzerland
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.


Papers
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Patent
11 Jan 1996
TL;DR: A system for protection of goods against theft includes a control unit and protection modules associated with the goods, the control unit including cordless communication means and the protection modules including movement detection circuitry to find out whether the goods are being handled, and cordless communications circuitry to send an alarm message to the controller unit if a movement is detected as discussed by the authors.
Abstract: A system for protection of goods against theft includes a control unit and protection modules associated with the goods, the control unit including cordless communication means and the protection modules including movement detection circuitry to find out whether the goods are being handled, and cordless communications circuitry to send an alarm message to the control unit if a movement is detected.

58 citations

Patent
05 Jun 2003
TL;DR: In this paper, the first, second, and third layers of a binary encoding scheme are represented by colored dots, and the colors of the dots are cyan, yellow, and magenta.
Abstract: A printed media product, such as a trading card, that has a substrate and an encoded data element applied to a surface of the substrate containing information. The encoded data element includes first, second, and third data layers with first, second, and third patterns of encoded, colored dots defined by a binary encoding scheme. The dots of the first, second, and third layers are different colors separately resolvable by a scanner with decoding software. The colors of the dots are cyan, yellow, and magenta, and the layers are printed so that the dots overlap. The binary encoding scheme includes a two dimensional run length limited code. The printed media product includes a graphics element that can be interpreted by a human user, and typically, the information encoded in the encoded data element layers is related to the information in the graphics element.

58 citations

Journal ArticleDOI
TL;DR: A 200 mm 0.35 /spl mu/m silicon-germanium heterojunction bipolar transistor (SiGe HBT) with epitaxially aligned polysilicon emitters is described in this paper.
Abstract: A 200 mm 0.35 /spl mu/m silicon-germanium heterojunction bipolar transistor (SiGe HBT) technology involving epitaxially-aligned polysilicon emitters is described. The devices are shown to combine the high speed performances typical for poly-Si emitter SiGe base devices (f/sub max/ up to 70 GHz) and the low 1/f noise properties of monocrystalline emitter structures (noise figure-of-merit KB as low as 7.2/spl times/10/sup -10/ /spl mu/m/sup 2/). Statistical current gain data are used to demonstrate the manufacturability of this innovative SiGe HBT technology.

58 citations

Journal ArticleDOI
TL;DR: In this paper, the authors investigated ZigBee's ability to meet WBSN requirements, with higher communication efficiency and lower power consumption than a Bluetooth serial port profile (SPP) based solution.

58 citations

Patent
John H. Zhang1
07 Apr 2017
TL;DR: In this paper, the authors proposed a gate-all-around (GAA) device architecture with a cylindrical structure that extends above the surface of a doped well formed in a silicon substrate.
Abstract: A vertical tunneling FET (TFET) provides low-power, high-speed switching performance for transistors having critical dimensions below 7 nm. The vertical TFET uses a gate-all-around (GAA) device architecture having a cylindrical structure that extends above the surface of a doped well formed in a silicon substrate. The cylindrical structure includes a lower drain region, a channel, and an upper source region, which are grown epitaxially from the doped well. The channel is made of intrinsic silicon, while the source and drain regions are doped in-situ. An annular gate surrounds the channel, capacitively controlling current flow through the channel from all sides. The source is electrically accessible via a front side contact, while the drain is accessed via a backside contact that provides low contact resistance and also serves as a heat sink. Reliability of vertical TFET integrated circuits is enhanced by coupling the vertical TFETs to electrostatic discharge (ESD) diodes.

58 citations


Authors

Showing all 17185 results

NameH-indexPapersCitations
Bharat Bhushan116127662506
Albert Polman9744542985
G. Pessina8482830807
Andrea Santangelo8388629019
Paolo Mattavelli7448219926
Daniele Ielmini6836716443
Jean-François Carpentier6245914271
Robert Henderson5844013189
Bruce B. Doris5660412366
Renato Longhi551778644
Aldo Romani5442511513
Paul Muralt5434412694
Enrico Zanoni5370513926
Gaudenzio Meneghesso5170312567
Franco Zappa502749211
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202225
2021560
2020798
2019952
2018948
2017781