STMicroelectronics

About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Signal & Transistor. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.

Thermal stability and moisture uptake of 1-alkyl-3-methylimidazolium bromide

Abstract: The thermal stability of the ionic liquids (ILs) 1-n-butyl-3-methylimidazolium bromide, (BMIM)Br, and 1-n-octyl-3-methylimidazolium bromide, (OMIM)Br, was evaluated through thermogravimetry (TG). Long-term isothermal TG studies revealed that both of these ILs exhibit appreciable decomposition even at temperatures significantly lower than the onset decomposition tempera- ture, previously determined from fast scan TG experi- ments. The long-term TG studies of both the ILs showed linear mass loss as a function of time at each temperature of 10 C interval in the range 533-573 K over a period of 10 h. The kinetics of isothermal decomposition of ILs was analyzed using pseudo-zero-order rate expression. The activation energies for the isothermal decomposition of (BMIM)Br and (OMIM)Br under nitrogen atmosphere are 219.86 and 212.50 kJ mol -1 , respectively. The moisture absorption kinetics of these ILs at 25 C and 30% relative humidity (RH) and at 85 C and 85% RH were also stud- ied. Water uptake of ILs exposed at 25 C/30%RH follows a simple saturation behavior in agreement with Weibull model while that at 85 C/85%RH fortuitously fit into the Henderson-Pabis model.

3D Sequential Integration: Application-driven technological achievements and guidelines

Abstract: 3D Sequential Integration (3DSI) with ultra-small 3D contact pitch (<100nm) offers new 3D partitioning options at fine granularities. This paper reviews potential applications ranging from computing to sensor interface and gives an update on 3DSI device development. Low-temperature processing techniques have made great progress and High Performance (HP) digital stacked FETs for computing application can be achieved with a 500°C Thermal Budget (TB). In addition, ULK/metal lines capable of withstanding this TB can be used between stacked tiers. Ultra-Low TB FETs (<400°C) have potential for low-power applications and allow for the stacking of multiple layers.

DC-to-DC converter operating in a discontinuous mode

Abstract: A converter employs a comparator sensing the current through an output diode, for generating a confirmation signal of an OFF state of the switch until the discharge current of the inductor toward the user circuit and the external filter capacitance has become null, thus ensuring the operation in a discontinuous mode under any condition. A turn-off signal of the switch is provided by another comparator which, instead of the voltage on a sensing resistance connected in series with the switch, may sense the voltage across the switch itself. This latter embodiment is particularly suited in case of an output MOS transistor and the circuit comprises means for masking for a preset period of time the turn-off signal produced by said comparator, in order to allow a predefined turn-on phase of the switch. Enabling of the turn-on of the switch is conventionally provided by a dedicated (third) comparator of the output voltage. The circuit does not require the use of an error amplifier, for the compensation of which special complex integratable circuits or alternatively access to the output node of the error amplifier through a dedicated pin may be needed. Neither a local oscillator for turning off the switch is needed. The circuit is simple and suited for integration in large complex system chips, where there is a limited availability of pins and silicon area. Different embodiments are described.

Integrated device based upon semiconductor technology, in particular chemical microreactor

Abstract: An integrated device based upon semiconductor technology, in particular a chemical microreactor, including a semiconductor body having a high-temperature operating portion and a low-temperature operating portion. The semiconductor body is provided with a thermal-insulation device including a dissipator element arranged between the high-temperature operating portion and the low-temperature operating portion. The dissipator includes a membrane connecting the high-temperature operating portion and the low-temperature operating portion, and a plurality of diaphragms that extend substantially orthogonal to the membrane and are parallel to one another.

A High-PDE, Backside-Illuminated SPAD in 65/40-nm 3D IC CMOS Pixel With Cascoded Passive Quenching and Active Recharge

Abstract: We present a complete pixel based on a single-photon avalanche diode (SPAD) fabricated in a backside-illuminated (BSI) 3D IC technology. The chip stack comprises an image sensing tier produced in a 65-nm image sensor technology and a data processing tier in 40-nm CMOS. Using a simple, CMOS-compatible technique, the pixel is capable of passive quenching and active recharge at voltages well above those imposed by a single transistor whilst ensuring that the reliability limits across the gate-source ( $\text {V} _{\text {GS}}$ ), gate-drain ( $\text {V} _{\text {GD}}$ ) and drain–source ( $\text {V} _{\text {DS}}$ ) are not exceeded for any device. For a given technology, the circuit extends the maximum excess bias that SPADs can be operated at when using transistors as quenching elements, thus improving the SPAD sensitivity, timing performance, and photon detection probability uniformity. Implemented with 2.5-V thick oxide transistors and operated at 4.4-V excess bias, the design achieves a timing jitter of 95-ps full-width at half maximum, maximum photon detection efficiency (PDE) of 21.9% at 660 nm and 0.08% afterpulsing probability with a dead time of 8 ns. This is both the lowest afterpulsing probability at 8-ns dead time and the highest peak PDE for a BSI SPAD in a 3D IC technology to date.