STMicroelectronics

About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.

Investigations on porous silicon as electrode material in electrochemical capacitors

Abstract: In this study, we have demonstrated the possibility of using macroporous silicon electrodes in electrochemical capacitors. Macroporous silicon was used to increase the surface exchange between pore surface and electrolyte. The inherent resistivity of the porous silicon can be reduced through the use of subsequent doping and metallization processes of the macropore surface. A systematic study of the electrolyte concentration and the porous silicon depth influences was also performed. A unit cell capacitance value of 320 µF/cm2 was obtained with doped and metallized p-type macroporous silicon electrodes. (© 2007 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

A High-PDE, Backside-Illuminated SPAD in 65/40-nm 3D IC CMOS Pixel With Cascoded Passive Quenching and Active Recharge

Abstract: We present a complete pixel based on a single-photon avalanche diode (SPAD) fabricated in a backside-illuminated (BSI) 3D IC technology. The chip stack comprises an image sensing tier produced in a 65-nm image sensor technology and a data processing tier in 40-nm CMOS. Using a simple, CMOS-compatible technique, the pixel is capable of passive quenching and active recharge at voltages well above those imposed by a single transistor whilst ensuring that the reliability limits across the gate-source ( $\text {V} _{\text {GS}}$ ), gate-drain ( $\text {V} _{\text {GD}}$ ) and drain–source ( $\text {V} _{\text {DS}}$ ) are not exceeded for any device. For a given technology, the circuit extends the maximum excess bias that SPADs can be operated at when using transistors as quenching elements, thus improving the SPAD sensitivity, timing performance, and photon detection probability uniformity. Implemented with 2.5-V thick oxide transistors and operated at 4.4-V excess bias, the design achieves a timing jitter of 95-ps full-width at half maximum, maximum photon detection efficiency (PDE) of 21.9% at 660 nm and 0.08% afterpulsing probability with a dead time of 8 ns. This is both the lowest afterpulsing probability at 8-ns dead time and the highest peak PDE for a BSI SPAD in a 3D IC technology to date.

A Photolithographic Approach to Polymeric Microneedles Array Fabrication

Abstract: In this work, two procedures for fabrication of polymeric microneedles based on direct photolithography, without any etching or molding process, are reported. Polyethylene glycol (average molecular weight 250 Da), casted into a silicone vessel and exposed to ultraviolet light (365 nm) through a mask, cross-links when added by a commercial photocatalyzer. By changing the position of the microneedles support with respect to the vessel, different shapes and lengths can be achieved. Microneedles from a hundred microns up to two millimeters have been obtained just tuning the radiation dose, by changing the exposure time (5–15 s) and/or the power density (9–18 mW/cm2) during photolithography. Different microneedle shapes, such as cylindrical, conic or lancet-like, for specific applications such as micro-indentation or drug delivery, are demonstrated.

Modeling of the intrinsic retention characteristics of FLOTOX EEPROM cells under elevated temperature conditions

Abstract: A model for the intrinsic retention characteristics of FLOTOX EEPROM cells is presented, which is based on the temperature dependence of the Fowler-Nordheim emission current. This model which has been successfully tested on single-poly-FLOTOX EEPROM cells, enables the device lifetime to be calculated for given memory operating conditions, instead of being extrapolated as is usually done. The sensitivity of the retention characteristics to several technological parameters is also investigated. It is expected that this intrinsic retention model (with minor modifications) will also be applicable to FLASH EEPROM cells. >

Circuit and method for generating a read reference signal for nonvolatile memory cells

Abstract: The current flowing through a cell to be read, forming part of a nonvolatile memory array and presenting a characteristic with a predetermined slope, is amplified N times and compared with a reference current presenting a two portion characteristic: a first portion extending between a predetermined threshold value and a trigger value, and presenting a slope equal to that of the memory cell characteristic, and a second portion extending from the trigger value, and presenting a slope amplified N times with respect to that of the cell characteristic and therefore equal to the amplified slope of the cell.