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Institution

STMicroelectronics

CompanyGeneva, Switzerland
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.


Papers
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Patent
09 Jul 1998
TL;DR: In this paper, the rotor position for synchronizing the drive of a multiphase brushless motor when driven in a "multipolar" mode is carried out by interrupting the driving current in at least one of the windings of the motor coupled with a zero-cross sensing circuit of the BEMF signal.
Abstract: The sensing of the rotor position for synchronizing the drive of a multiphase brushless motor when driven in a "multipolar" mode is carried out by interrupting the driving current in at least one of the windings of the motor coupled with a zero-cross sensing circuit of the BEMF signal (BEMF DETECT CIRCUIT), by means of a first logic signal (ENABLE), enabling a logic gate (AND) for asserting a zero-cross event detected by the circuit, by a second logic signal (MASK) and simultaneously resetting the first (ENABLE) and second (MASK) signals after a certain period of time from the instant of interruption.

55 citations

Patent
13 May 2004
TL;DR: In this article, an edge enhancement system, including a selective edge controller for determining one or more properties of an edge of image data, and a scaling module for scaling edge enhancement signal by the weighting factors to control the degree of edge enhancement.
Abstract: An edge enhancement system, including a selective edge controller for determining one or more properties of an edge of image data, and for generating one or more weighting factors on the basis of properties of the edge; and a scaling module for scaling an edge enhancement signal by the weighting factors to control the degree of edge enhancement. The image data may represent a still or moving (i.e., video) image. A max-min search circuit determines maximum and minimum turning points closest to the center of the data processing window and that are located on opposing sides of the window, to determine values and locations of maximum and minimum pixels of the edge. An edge-directed pre-filtering circuit reduces the amplification of edge fuzziness by smoothing close the edges vertical prior to enhancement. An aliasing protection circuit reduces the visibility of saw-tooth defects on predominantly horizontal diagonal edges.

55 citations

Proceedings ArticleDOI
01 Oct 2018
TL;DR: The state-of-the-art covering both the Si/SiGe HBTs and the CMOS nodes is shown and a focus on the ongoing European research activities through the presentation of the TARANTO project, whose main objective is to help developing nanoscale SiGe BiCMOS platforms.
Abstract: This paper reviews the advantages of SiGe BiCMOS technologies and their applications in the millimeterwave to terahertz domains. The state-of-the-art covering both the Si/SiGe HBTs and the CMOS nodes is shown. Future perspectives and related main challenges are discussed with a focus on the ongoing European research activities through the presentation of the TARANTO project, whose main objective is to help developing 600 GHz $\pmb{f}_{\mathbf{MAX}}$ nanoscale SiGe BiCMOS platforms.

55 citations

Journal ArticleDOI
TL;DR: In this paper, a Multi-Layer Perceptron neural network was used to model the relationship between the engine crankshaft speed and some parameters derived from the in-cylinder pressure cycle.

55 citations

Proceedings ArticleDOI
04 Jun 2007
TL;DR: This paper describes the first fully-automated desynchronization design flow, based only on contemporary synchronous EDA tools and a new point tool for performing the des synchronization transformation, and indicates that desynchronized circuits exhibit increased variability tolerance and better average case performance, for a small area and power overhead.
Abstract: Variability is one of the fundamental problems faced by nano-scale electronic circuits and is expected to become even worse as process technology scales Desynchronization is a design methodology, which converts a synchronous gate- level circuit into a more robust asynchronous one In this paper, we describe the first fully-automated desynchronization design flow, based only on contemporary synchronous EDA tools and a new point tool for performing the desynchronization transformation The flow was used to implement, down to mask layout level, a simple pipelined processor in a 90 nm industrial library We show that the desynchronization methodology can be easily integrated into contemporary industrial EDA flows Results, on the design implemented, indicate that desynchronized circuits exhibit increased variability tolerance and better average case performance, for a small area and power overhead

55 citations


Authors

Showing all 17185 results

NameH-indexPapersCitations
Bharat Bhushan116127662506
Albert Polman9744542985
G. Pessina8482830807
Andrea Santangelo8388629019
Paolo Mattavelli7448219926
Daniele Ielmini6836716443
Jean-François Carpentier6245914271
Robert Henderson5844013189
Bruce B. Doris5660412366
Renato Longhi551778644
Aldo Romani5442511513
Paul Muralt5434412694
Enrico Zanoni5370513926
Gaudenzio Meneghesso5170312567
Franco Zappa502749211
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202225
2021560
2020798
2019952
2018948
2017781