Institution
STMicroelectronics
Company•Geneva, Switzerland•
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.
Topics: Transistor, Signal, Integrated circuit, CMOS, Layer (electronics)
Papers published on a yearly basis
Papers
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TL;DR: In this article, a temperature-compensated bias network is proposed, which allows a moderate power control slope (dB/V) to be achieved by varying the circuit quiescent current according to an exponential law.
Abstract: This paper presents the design and measured performance of a 1.8-GHz power amplifier featuring load mismatch protection and soft-slope power control. Load-mismatch-induced breakdown can be avoided by attenuating the RF power to the final stage during overvoltage conditions. This was accomplished by means of a feedback control system, which detects the peak voltage at the output collector node and clamps its value to a given threshold by varying the circuit gain. The issue of output power control has been addressed as well. To this end, a temperature-compensated bias network is proposed, which allows a moderate power control slope (dB/V) to be achieved by varying the circuit quiescent current according to an exponential law. The nonlinear power amplifier was fabricated using a low-cost silicon bipolar process with a 6.4-V breakdown voltage. It delivers a 33.5-dBm saturated output power with 46% maximum power-added efficiency and 36-dB gain at a nominal 3.5-V supply voltage. The device is able to tolerate a 10:1 load standing-wave ratio up to a 5.1-V supply voltage. Power control slope is lower than 80 dB/V between -15 dBm and the saturated output power level.
53 citations
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13 Feb 1995TL;DR: In this article, a polyphase dc motor with a plurality of "Y" connected driving coils connected together at a center tap is presented, and an additional pair of switches are provided for connection in series across the power supply with a connection node between each switch connected to the center tap.
Abstract: A method and apparatus for operating a polyphase dc motor selectively in dual-coil or uni-coil commutation modes. The motor has a plurality of "Y" connected driving coils connected together at a center tap. Each driving coil has an input node at an end opposite the center tap, and is driven by a switch pair. Each switch pair is arranged for connection in series across a power supply voltage, and has a node between each switch connected to a respective one of the coil input nodes. An additional pair of switches are provided for connection in series across the power supply with a connection node between each switch connected to the center tap. A circuit is provided to operate the switches to cause a driving current to be passed between sequentially selected pairs of the driving coils for an initial start-up time. Also, a circuit to operate the switches after the initial start-up time is provided to cause a driving current to be passed between sequentially selected only single ones of the driving coils and the center tap current input node. The apparatus also has a circuit for detecting a zero crossing of a bemf signal of a floating one of the driving coils and a delay circuit for establishing a delay between a zero crossing and a commutation of driving signals to the coils. A circuit operates the delay circuit to provide a first predetermined delay in dual-coil mode and a second predetermined delay in uni-coil mode.
53 citations
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29 Dec 1997TL;DR: In this paper, a system and method for adding another floating point register set in the floating point execution unit of a microprocessor is described. Butler et al. proposed a method that allows for either of the two register sets (or a combination thereof) to be, at a given point in time, the working set, with the other being a shadow register set.
Abstract: A system and method is provided that adds another floating point register set in the floating point execution unit of a microprocessor. Thus, when the floating point state, or environment is stored as an image into memory, it is also stored as a copy in the additional internal registers. When the state, or environment, is to be restored the necessary information (data and/or instructions) is normally present in the additional registers, thus saving CPU cycles by avoiding reloading the image from memory. The present invention allows for either of the two register sets (or a combination thereof) to be, at a given point in time, the working set, with the other being a shadow register set. All of the memory write cycles are monitored (snooped) to determine if the information in the on-chip image has been altered, since the last store operation. The shadowed register file will allow the state of the floating point register file to be kept "as is" on the occurrence of a task switch.
53 citations
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19 Dec 1997TL;DR: In this article, a single chip integrated circuit device includes a breakpoint range unit having first and second breakpoint registers for holding respectively lower and upper breakpoint addresses between which normal operation of the CPU is to be interrupted for diagnostic purposes.
Abstract: A single chip integrated circuit device includes a breakpoint range unit having first and second breakpoint registers for holding respectively lower and upper breakpoint addresses between which normal operation of the CPU is to be interrupted for diagnostic purposes. The breakpoint range unit further has comparison logic operative to compare the contents of the address register with each of a lower and upper breakpoint address, and to issue a breakpoint signal when the address held in an address register is equal to the lower breakpoint address or between the lower and upper breakup addresses. On chip control logic is connected to receive the breakpoint signal and arranged to interrupt normal operation of the CPU when the breakpoint signal is received. The comparison logic includes inverse state logic configured to set an inverse state indicator to cause generation of the breakpoint signal outside the address range defined by the upper and lower breakpoint address.
52 citations
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TL;DR: In this article, preliminary results concerning the micromachining procedure for fabricating a Si-based electrocatalytic membrane for miniaturised Si based proton exchange membrane fuel cells (PEMFC) are presented.
52 citations
Authors
Showing all 17185 results
Name | H-index | Papers | Citations |
---|---|---|---|
Bharat Bhushan | 116 | 1276 | 62506 |
Albert Polman | 97 | 445 | 42985 |
G. Pessina | 84 | 828 | 30807 |
Andrea Santangelo | 83 | 886 | 29019 |
Paolo Mattavelli | 74 | 482 | 19926 |
Daniele Ielmini | 68 | 367 | 16443 |
Jean-François Carpentier | 62 | 459 | 14271 |
Robert Henderson | 58 | 440 | 13189 |
Bruce B. Doris | 56 | 604 | 12366 |
Renato Longhi | 55 | 177 | 8644 |
Aldo Romani | 54 | 425 | 11513 |
Paul Muralt | 54 | 344 | 12694 |
Enrico Zanoni | 53 | 705 | 13926 |
Gaudenzio Meneghesso | 51 | 703 | 12567 |
Franco Zappa | 50 | 274 | 9211 |