STMicroelectronics

About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Signal & Transistor. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.

Hydrogen and helium bubbles in silicon

Abstract: Hydrogen is a quite common impurity in semiconductor-silicon technology: it is unintentionally but unavoidably added to the silicon after crystal growth during wafer processing, and continues to be present during wet oxidation, film depositions, etching and annealing steps. The effects of hydrogen in single crystal silicon at low concentration have been the subject of many papers, books and conference proceedings. Much less considered is the case of hydrogen at massive concentration. One final effect of heavy hydrogen loading is the formation of cavities and bubbles, with size up to 100 nm. Cavities and bubbles are also observed after helium loading by high-fluence ion implantation. This article reviews the basic mechanisms responsible for the formation and growth of such structures in single-crystalline silicon. In particular, starting from the loading (ion implantation) and having in mind the formation of the cavities, this paper will cover: the effects of substrate temperature, the interaction of vacancies and self-interstitials with the impurity, the mechanisms of gas segregation inside the cavities, the pressure which arises because of the segregation and the subsequent displacement field in the crystal, the stability against heat treatments of the gas in the cavities and of the cavities themselves. The understanding of the physical processes should lead to gain more insight in the processes of cleavage of the Si–Si bond and vacancy agglomeration which can induce not only the formation of cavities and bubbles, but also planar cutting or explosion.

System-on-chip beyond the nanometer wall

Abstract: In this paper, we analyze the emerging trends in the design of complex Systems-on-a-Chip for nanometer-scale semiconductor technologies and their impact on design automation requirements, from the perspective of a broad range SoC supplier. We present our vision of some of the key changes that will emerge in the next five years. This vision is characterized by two major paradigm changes. The first is that SoC design will become divided into four mostly non-overlapping distinct abstraction levels. Very different competences and design automation tools will be needed at each level. The second paradigm change is the emergence of domain-specific S/W programmable SoC platforms consisting of large, heterogeneous sets of embedded processors. These will be complemented by embedded reconfigurable hardware and networks-on-chip. A key enabler for the effective use of these flexible SoC platforms is a high-level parallel programming model supporting automatic specification-to-platform mapping.

Ionizing radiation induced leakage current on ultra-thin gate oxides

Abstract: MOS capacitors with a 4.4 nm thick gate oxide have been exposed to /spl gamma/ radiation from a Co/sup 60/ source. As a result, we have measured a stable leakage current at fields lower than those required for Fowler-Nordheim tunneling. This Radiation Induced Leakage Current (RILC) is similar to the usual Stress Induced Leakage Currents (SILC) observed after electrical stresses of MOS devices. We have verified that these two currents share the same dependence on the oxide field, and the RILC contribution can be normalized to an equivalent injected charge for Constant Current Stresses. We have also considered the dependence of the RILC from the cumulative radiation dose, and from the applied bias during irradiation, suggesting a correlation between RILC and the distribution of trapped holes and neutral levels in the oxide layer.

Deposition by adsorption under an electrical field

Abstract: A method for depositing a material by adsorption onto a substrate, includes a step of exposing the substrate to a precursor molecule in the gaseous phase These precursor molecules present a non-zero dipole moment An electrical field is applied during the substrate exposing step to cause a reactive branch of the precursor molecules to adsorb into the surface of the substrate in a manner such that the precursor molecules have essentially a same orientation Next, the substrate is exposed to reagent molecules in the gaseous phase which react with the adsorbed precursor molecules so that organic branches of the adsorbed precursor molecules other than the reactive organic branch are replaced by elements of the reagent molecules This process results in the formation of a monoatomic layer

Voids in Silicon by He Implantation: From Basic to Applications

Abstract: The mechanism of bubble formation when He is implanted into silicon is described Many experiments are reviewed and several techniques are considered During implantation and subsequent annealing, complex Hen–Vm clusters are formed, trapping vacancies, while Si self-interstitials recombine directly at the surface By increasing temperature He atoms out-diffuse, and the entire process produces a supersaturation of vacancies (void formation) Their evolution is studied during isothermal and isochronal annealing, describing the mechanisms involved; that is, direct coalescence or Ostwald ripening The internal surface is an efficient trap for self-interstitials and for metals The gettering mechanism is governed by a surface adsorption at low impurity concentration while at high value a silicide phase is observed The high getter capability is ensured by the large number of traps introduced (1017–1019 cm−3) Finally, voids introduce mid gap energy levels that act as minority carrier recombination centers, providing a powerful method to control lifetime locally in silicon devices The reviewed results demonstrate that the trap levels are due to the dangling bonds present on the void surface This property can be used in many applications