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Institution

STMicroelectronics

CompanyGeneva, Switzerland
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.


Papers
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Patent
13 Jun 2006
TL;DR: Dynamic performance of high-speed high-resolution digital-to-analog converters (DACs) is limited by distortion at the data switching instants, so a DAC output controlled by an oscillating waveform is proposed to mitigate the effects of switching distortion and clock jitter.
Abstract: A radio frequency digital-to-analog converter with a programmable current output. In exemplary aspects of the invention, improved apparatus and methods for providing (i) current mirror matching, (ii) enhanced current pulse rising edge performance, (ii) reduced base voltage swing, and (iv) compensated high voltage swing, are provided. The foregoing apparatus and methods can be applied to any RF signal application (wireless or otherwise), including for example wireless cellular handsets.

142 citations

Proceedings ArticleDOI
04 Apr 2005
TL;DR: A new attack against a software implementation of the Advanced Encryption Standard, aimed at flushing elements of the SBOX from the cache, thus inducing a cache miss during the encryption phase, which can be used to recover part of the secret key.
Abstract: This paper presents a new attack against a software implementation of the Advanced Encryption Standard. The attack aims at flushing elements of the SBOX from the cache, thus inducing a cache miss during the encryption phase. The power trace is then used to detect when the cache miss occurs; if the miss happens in the first round of the AES then the information can be used to recover part of the secret key. The attack has been simulated using the Wattch simulation framework and a simple software implementation of AES (using a single table for the SBOX). The attack can be easily extended to more sophisticated versions of AES with more than one table. Eventually, we present a simple countermeasure which does not require randomization.

142 citations

Patent
29 Jun 1990
TL;DR: In this paper, a standard logic block, or macrocell, is provided for use on programmable logic devices, which uses RAM to perform logic functions, and further includes circuitry which allows writing of data to the RAM during use.
Abstract: A standard logic block, or macrocell, is provided for use on programmable logic devices. The macrocell uses RAM to perform logic functions, and further includes circuitry which allows writing of data to the RAM during use. Each logic block can be configured at programming time to be either a user RAM, allowing the user to write data to such memory during use, or configured as performing logic functions. The contents of macrocells configured as providing logic functions cannot be changed except by reprogramming the device.

141 citations

Journal ArticleDOI
TL;DR: In this article, the structural properties of Ge thick films grown directly onto Si(0, 0, 1) substrates using a production-compatible reduced pressure-chemical vapor deposition system were investigated.

141 citations

Patent
29 Jun 1993
TL;DR: In this paper, a method of accessing a content addressable memory having a plurality of RAM cells connected in an array of rows and columns, each row having an input word, at least one additional cell for storing a checking bit and a match line for providing a signal to indicate when a match occurs between an input data word and data stored in a row of cells.
Abstract: A method of accessing a content addressable memory having a plurality of RAM cells connected in an array of rows and columns, each row having a plurality of cells for storing a data word, at least one additional cell for storing a checking bit and a match line for providing a signal to indicate when a match occurs between an input data word and data stored in a row of cells, which method comprises storing in at least one row of cells a data word in data cells of the row and a checking bit in said at least one additonal cell of the row, the checking bit having a value dependent on the content of the data word in accordance with an error checking system, and controlling a memory accessing system to effect an associate operation by inputting to the columns of cells an input word with an input checking bit dependent on said input word in accordance with the same error checking system, comparing the input word and input checking bit with stored contents of each row of cells and in any row where a mismatch of the input data word with the stored data word occurs causing at least two cells in that row to change a signal level on a match line for that row, said memory accessing system being arranged to operate with a time delay for each associate operation which is less than that required for a single cell mismatch. The invention also provides a content addressable memory.

140 citations


Authors

Showing all 17185 results

NameH-indexPapersCitations
Bharat Bhushan116127662506
Albert Polman9744542985
G. Pessina8482830807
Andrea Santangelo8388629019
Paolo Mattavelli7448219926
Daniele Ielmini6836716443
Jean-François Carpentier6245914271
Robert Henderson5844013189
Bruce B. Doris5660412366
Renato Longhi551778644
Aldo Romani5442511513
Paul Muralt5434412694
Enrico Zanoni5370513926
Gaudenzio Meneghesso5170312567
Franco Zappa502749211
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202225
2021560
2020798
2019952
2018948
2017781