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Institution

STMicroelectronics

CompanyGeneva, Switzerland
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.


Papers
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Patent
03 Feb 1995
TL;DR: In this paper, a programmable logic device can be used either as a look-up table logic device or as a logic function generator, which enables combinations to be provided such as the combination of a look up table with a fixed gate field programmable gate array.
Abstract: A programmable logic device is disclosed which can be used either as a look-up table logic device or as a logic function generator This enables combinations to be provided such as the combination of a look-up table with a fixed gate field programmable gate array

97 citations

Journal ArticleDOI
TL;DR: A comprehensive tool, written in MATLAB, for modeling noise in CMOS image sensors and showing the effect in images, using accepted theoretical/empirical noise models with parameters from measured process-data distributions is reported.
Abstract: Accurate modeling of image noise is important in understanding the relative contributions of multiple-noise mechanisms in the sensing, readout, and reconstruction phases of image formation. There is a lack of high-level image-sensor system modeling tools that enable engineers to see realistic visual effects of noise and change-specific design or process parameters to quickly see the resulting effects on image quality. This paper reports a comprehensive tool, written in MATLAB, for modeling noise in CMOS image sensors and showing the effect in images. The tool uses accepted theoretical/empirical noise models with parameters from measured process-data distributions. Output images from the tool are used to demonstrate the effectiveness of this approach in determining the effects of various noise sources on image quality

97 citations

Journal ArticleDOI
TL;DR: In this paper, a variable capacitance of 3.1 pF nominal value has been realized in a 0.35-/spl mu/m standard CMOS process, and a factor two capacitance change has been achieved for a 2-V variation of the controlling voltage.
Abstract: CMOS technology scaling opens up the possibility of designing variable capacitors based on a metal oxide semiconductor structure with improved tuning range and quality factor. This is due to an increase in the oxide capacitance and a reduction in the parasitic resistance. A prototype metal-oxide-semiconductor (MOS) variable capacitor of 3.1 pF nominal value has been realized in a 0.35-/spl mu/m standard CMOS process. A factor two capacitance change has been achieved for a 2-V variation of the controlling voltage. The varactor Q ranges from 17 to 35, at 1.8 GHz.

97 citations

Patent
20 Apr 2001
TL;DR: In this paper, a method and apparatus of music distribution from a media player is provided with a “send to friend” icon, when the icon is selected, a clipping of the currently playing music selection is taken from a predetermined location in the music selection and compressed using a fidelity reducing compression technique to produce a sample of the current selection suitable for distribution.
Abstract: A method and apparatus of music distribution from a media player. A media player is provided with a “send to friend” icon. In one embodiment, when the icon is selected, a clipping of the currently playing music selection is taken from a predetermined location in the music selection and compressed using a fidelity reducing compression technique to produce a sample of the current selection suitable for distribution. The compressed clipping is sent to a selected recipient or recipients by email in the background while the music selection continues to play. The recipient(s) can be either a default recipient(s) or a recipient(s) selected from a list as in an address book application.

97 citations

Journal ArticleDOI
TL;DR: In this paper, an overview of the evolution of capacitor technology is presented from the early days of planar PIS capacitors to the MIM (metal/insulator/metal) capacitors used for todays 65 nm technology node.
Abstract: The architecture, materials choice and process technology for stacked-capacitors in embedded-DRAM applications are a crucial concern for each new technology node. An overview of the evolution of capacitor technology is presented from the early days of planar PIS (poly/insulator/silicon) capacitors to the MIM (metal/insulator/metal) capacitors used for todays 65 nm technology node. In comparing Ta2O5, HfO2 and Al2O3 as high-k dielectric for use in 65 nm eDRAM technology, Al2O3 is found to give a good compromise between capacitor performance and manufacturability. The use of atomic layer deposition (ALD) is identified to be an enabling technology for both high-k dielectrics and capacitor electrodes. � 2005 Elsevier Ltd. All rights reserved.

97 citations


Authors

Showing all 17185 results

NameH-indexPapersCitations
Bharat Bhushan116127662506
Albert Polman9744542985
G. Pessina8482830807
Andrea Santangelo8388629019
Paolo Mattavelli7448219926
Daniele Ielmini6836716443
Jean-François Carpentier6245914271
Robert Henderson5844013189
Bruce B. Doris5660412366
Renato Longhi551778644
Aldo Romani5442511513
Paul Muralt5434412694
Enrico Zanoni5370513926
Gaudenzio Meneghesso5170312567
Franco Zappa502749211
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202225
2021560
2020798
2019952
2018948
2017781