STMicroelectronics

About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.

Apparatus for power wireless transfer between two devices and simultaneous data transfer

Abstract: A system for the wireless transfer of power includes a first device connected to a power supply source and provided with a first resonant circuit at a first frequency, a second device comprising at least one battery, provided with a second resonant circuit at said first frequency, arranged at a distance smaller than the wavelength associated with said first frequency and not provided with wires for the electrical connection with said first device. The first device is adapted to transfer a first signal representing the power to be sent to the second device for charging said at least one battery and comprises means adapted to modulate the frequency of said first signal for transferring data from the first device to the second device simultaneously with the power transfer. The second device comprises means adapted to demodulate the received signal, corresponding to the first signal sent from the first device, to obtain the transmitted data.

A study in coverage-driven test generation

Abstract: One possible solution to the verification crisis is to bridge the gap between formal verification and simulation by using hybrid techniques. This paper presents a study of such a functional verification methodology that uses coverage of formal models to specify tests. This was applied to a modern superscalar microprocessor and the resulting tests were compared to tests generated using existing methods. The results showed some 50% improvement in transition coverage with less than a third the number of test instructions, demonstrating that hybrid techniques can significantly improve functional verification.

Method and system for communicating video data in a packet-switched network, related network and computer program product therefor

Abstract: A method for communicating video data on a wireless channel in a packet-switched network includes the steps of operating at a wireless terminal a compression in packets on the video data during a video coding operation, detecting wireless channel conditions and adapting control parameters of the video coding operation to the detected wireless channel conditions. The compression operation is a robust header compression operation and the step of adapting control parameters of said video coding operation is performed in dependence of information about the wireless channel conditions detected on a feedback channel made available in a decompression step associated with the compression operation.

75 nm damascene metal gate and high-k integration for advanced CMOS devices

Abstract: An advanced CMOS process has been proposed which include key features: 75 nm gate length damascene metal gate, high-k dielectrics with 1.35 nm EOT. Detailed characterisation (TEM, C-V, split C-V, charge pumping, LF noise, low and high temperature transport) demonstrate the high quality of the dielectric and interface. Low Ioff and low gate current make the technology attractive for low standby power applications.

Apparatus for switching data in high-speed networks and method of operation

Abstract: A packet switch for switching cells comprising fixed-size data packets. The packet switch comprises: 1) N input ports for receiving and storing cells in input queues; 2) N output ports for receiving and storing cells from the N input ports in output queues; 3) a switch fabric for transferring the cells from the N input ports to the N output ports, the switch fabric comprising an internally buffered crossbar having N×N internal buffers, wherein each internal buffer is associated with a crosspoint of one of the N input ports and one of the N output ports; and 4) a scheduling controller for selecting a first one of a plurality of queued head-of-line (HOL) cells from the input queues to be transmitted to a first one of the N×N internal buffers according to a fair queuing algorithm in which each of the queued HOL cells is allocated a weight of R ij and wherein the scheduling controller selects a first one of a plurality of HOL cells buffered in a second one of the N×N internal buffers to be transmitted to a first one of the output queues according to a fair queuing algorithm in which each of the internally buffered HOL cells is allocated a weight of R ij .