STMicroelectronics

About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.

A SoC Design Methodology Involving a UML 2.0 Profile for SystemC

Abstract: In this paper, we present a SoC design methodology joining the capabilities of UML and SystemC to operate at system-level. We present a UML 2.0 profile of the SystemC language, exploiting the MDA capabilities of defining modeling languages, platform independent and reducible to platform dependent languages. The UML profile captures both the structural and the behavioral features of the SystemC language, and allows high level modeling of system-on-a-chip with straightforward translation to SystemC code.

Method of refreshing an electrically erasable and programmable non-volatile memory

Abstract: A method (1110 a ;1110 b) of refreshing an electrically erasable and programmable non-volatile memory (100) having a plurality of memory cells (Mhk) is proposed. The method includes the steps of: verifying (1106-1114; 1152-1162) whether a memory cell has drifted from a correct condition (i.e., a predetermined voltage and/or voltage range), and individually restoring (1116-1130) the correct condition of the memory cell if the result of the verification is positive.

Reaction-diffusion CNN algorithms to generate and control artificial locomotion

Abstract: In this paper a physiological-behavioral approach to neural processing is used to realize artificial locomotion in mechatronic devices. The task has been realized by using a particular model of reaction-diffusion cellular neural networks (RD-CNN's) generating autowave fronts as well as Turing patterns. Moreover a programmable hardware cellular neural network structure is presented in order to model, generate, and control in real time some biorobots. The programmable hardware implementation gives the possibility of generating locomotion in real time and also to control the transition among several types of locomotion, with particular attention to hexapodes. The approach proposed allows not only the design of walking robots, but also the ability to build structures able to efficiently solve typical problems in industrial automation, such as online routing of objects moved on conveyor belts.

A 53-to-68GHz 18dBm power amplifier with an 8-way combiner in standard 65nm CMOS

Abstract: CMOS circuits operating up to 60GHz have been demonstrated to satisfy the market demand for high data rates and frequency bandwidths [1–6]. However, 60GHz products need an improvement in power performance as well as transistor reliability for large signal operation. Moreover, Class-A or Class-AB power amplifiers (PA) are mandatory to overcome the difficulty of the limited maximum available gain (MAG) at mm-Wave frequencies [1–6] and the high linearity required by the OFDM modulation used in the IEEE 802.15.3c wireless HD standard. That means a maximum drain-source voltage swing of twice the DC voltage, which introduces specific design or supply voltage in order to respect reliability constraints [1,7]. This paper describes a PA with 8 power-combined ways and cascode topology in a 7-metal-layer 65nm CMOS process which covers the full band for 60GHz wireless applications. The presented circuit operates at a standard supply of 1.2V or 1.8V, and achieves a saturated output power of 16.6dBm and 18.1dBm respectively. The measured output power is high for CMOS while insuring reliability for time-dependent dielectric breakdown (TDDB) and hot-carrier-injection (HCI) degradation.

Method for programming multi-level non-volatile memories by controlling the gate voltage

Abstract: When programming, for each programming pulse, a threshold voltage whose value is increased with respect to the previous programming pulse is applied to the gate terminal of each cell to be programmed. After an initial step, the increase of threshold voltage of the cell being programmed becomes equal to the applied gate voltage increase. In order to reduce the global programming time, keeping a small variability interval of threshold voltages associated with each level, to pass from a threshold level to a following one, each cell to be programmed is supplied with a plurality of consecutive pulses without verify, until it is immediately below the voltage level to be programmed, and then a verify step is performed, followed by subsequent programming and verify steps until the cell to be programmed reaches the desired threshold value.