Institution
STMicroelectronics
Company•Geneva, Switzerland•
About: STMicroelectronics is a company organization based out in Geneva, Switzerland. It is known for research contribution in the topics: Transistor & Signal. The organization has 17172 authors who have published 29543 publications receiving 300766 citations. The organization is also known as: SGS-Thomson & STM.
Topics: Transistor, Signal, Integrated circuit, CMOS, Layer (electronics)
Papers published on a yearly basis
Papers
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07 Dec 1999TL;DR: In this paper, a method of manufacturing an edge structure for a high voltage semiconductor device, including a first step of forming a first semiconductor layer of a first conductivity type, a second step of formulating a first mask over the top surface of the first semiconducting layer, a third step of removing portions of the mask in order to form at least one opening in it, a fourth step of introducing dopant of a second conductivities type in the first and second semiconductors through the opening, a fifth step of completely removing the first mask and of forming
Abstract: Method of manufacturing an edge structure for a high voltage semiconductor device, including a first step of forming a first semiconductor layer of a first conductivity type, a second step of forming a first mask over the top surface of the first semiconductor layer, a third step of removing portions of the first mask in order to form at least one opening in it, a fourth step of introducing dopant of a second conductivity type in the first semiconductor layer through the at least one opening, a fifth step of completely removing the first mask and of forming a second semiconductor layer of the first conductivity type over the first semiconductor layer, a sixth step of diffusing the dopant implanted in the first semiconductor layer in order to form a doped region of the second conductivity type in the first and second semiconductor layers. The second step up to the sixth step are repeated at least one time in order to form a final edge structure including a number of superimposed semiconductor layers of the first conductivity type and at least two columns of doped regions of the second conductivity type, the columns being inserted in the number of superimposed semiconductor layers and formed by superimposition of the doped regions subsequently implanted through the mask openings, the column near the high voltage semiconductor device being deeper than the column farther from the high voltage semiconductor device.
78 citations
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TL;DR: In this paper, all-solid-state Li/LiPONB/Si cells were prepared using physical vapor deposition (PVD) techniques, and the cycle life and the coulombic efficiency were found to be excellent in these solid-state cells with almost no loss during 1500 cycles.
Abstract: All solid-state thin-film lithium microbatteries are a promising component able to fulfill most of the specific requirements to power autonomous microsystems. Nevertheless, metallic lithium, which is commonly used as the negative electrode in microbatteries, has a very low melting temperature (Tm = 181 °C) that appears to be incompatible with the solder-reflow operation (maximum temperature Tmax ≈ 260 °C) usually used to connect electronic components. Silicon is a promising candidate to replace lithium in solder-reflowable lithium-ion cells due to its high volumetric capacity (834 μAh cm−2 μm−1 for Li15Si4) and its ability to reversibly insert lithium at a low potential. Nevertheless, it suffers from a large volumetric expansion during lithium insertion (280%), which is partly responsible for a rapid capacity fading when cycled in liquid electrolyte. In this study, all-solid-state Li/LiPONB/Si cells are prepared using physical vapor deposition (PVD) techniques. The cycle life and the coulombic efficiency are found to be excellent in these solid-state cells with almost no loss during 1500 cycles. Despite the large volume expansion due to lithium insertion confirmed by scanning electron microscopy, no evidence of cracks is found in the film or at the electrode/electrolyte interface, even after 1500 cycles.
78 citations
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05 Dec 2002
TL;DR: In this paper, the first and second thin portions are obtained using deposition instead of lithography: the first thin portion is deposed on a wall of an opening in a first dielectric layer; the second thin portion are obtained by deposing a sacrificial region on vertical wall of a first delimitation layer, removing the sacrificial regions to form a sublithographic opening that is used to etch a mold opening in the mold layer and filling the mold opening.
Abstract: A contact structure, including a first conducting region having a first thin portion with a first sublithographic dimension in a first direction; a second conducting region having a second thin portion with a second sublithographic dimension in a second direction transverse to said first direction; the first and second thin portions being in direct electrical contact and defining a contact area having a sublithographic extension. The thin portions are obtained using deposition instead of lithography: the first thin portion is deposed on a wall of an opening in a first dielectric layer; the second thin portion is obtained by deposing a sacrificial region on vertical wall of a first delimitation layer, deposing a second delimitation layer on the free side of the sacrificial region, removing the sacrificial region to form a sublithographic opening that is used to etch a mold opening in a mold layer and filling the mold opening.
78 citations
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29 Aug 2005TL;DR: A CODEC fully compliant to DVB-S2 broadcast standards is implemented in both 0.13 /spl mu/m 8M and 90nm 7M low-leakage CMOS technologies.
Abstract: A CODEC fully compliant to DVB-S2 broadcast standards is implemented in both 013 /spl mu/m 8M and 90nm 7M low-leakage CMOS technologies The system includes encoders and decoders for both LDPC codes and serially concatenated BCH codes This CODEC outperforms the DVB-S2 error performance requirements by up to 01dB The 013 /spl mu/m design occupies 496mm/sup 2/ and operates at 200MHz, while the 90nm design occupies 158mm/sup 2/ and operates at 300MHz
78 citations
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08 Feb 2001TL;DR: In this paper, an integrated device for microfluid thermoregulation consisting of a semiconductor material body having a surface, a plurality of buried channels extending in the semiconductor materials body at a distance from the surface of the material body, inlet and outlet ports extending from the surfaces of the semiconducted material body as far as the ends of the buried channels and being in fluid connection with the holes, and heating elements on the heating elements is presented.
Abstract: The integrated device for microfluid thermoregulation comprises a semiconductor material body having a surface; a plurality of buried channels extending in the semiconductor material body at a distance from the surface of the semiconductor material body; inlet and outlet ports extending from the surface of the semiconductor material body as far as the ends of the buried channels and being in fluid connection with the buried channels; and heating elements on the semiconductor material body. Temperature sensors are arranged between the heating elements above the surface of the semiconductor material body.
78 citations
Authors
Showing all 17185 results
Name | H-index | Papers | Citations |
---|---|---|---|
Bharat Bhushan | 116 | 1276 | 62506 |
Albert Polman | 97 | 445 | 42985 |
G. Pessina | 84 | 828 | 30807 |
Andrea Santangelo | 83 | 886 | 29019 |
Paolo Mattavelli | 74 | 482 | 19926 |
Daniele Ielmini | 68 | 367 | 16443 |
Jean-François Carpentier | 62 | 459 | 14271 |
Robert Henderson | 58 | 440 | 13189 |
Bruce B. Doris | 56 | 604 | 12366 |
Renato Longhi | 55 | 177 | 8644 |
Aldo Romani | 54 | 425 | 11513 |
Paul Muralt | 54 | 344 | 12694 |
Enrico Zanoni | 53 | 705 | 13926 |
Gaudenzio Meneghesso | 51 | 703 | 12567 |
Franco Zappa | 50 | 274 | 9211 |