Showing papers in "Analog Integrated Circuits and Signal Processing in 2019"

A new chaotic system with hidden attractor and its engineering applications: analog circuit realization and image encryption

Abstract: In this article a simple chaotic flow with hidden attractor is proposed. Various dynamics of this new system such as periodic and chaotic oscillations can be achieved by setting bifurcation paramet...

Functionality of circuit via modern fractional differentiations

Abstract: The significance of the modern fractional derivatives containing the singular kernel with locality and the non-singular kernel with non-locality have recently diverted the researchers because of the numerical or experimental analyses on the behavior between a system conservative and dissipative and the lack of fractionalized analytic methods. This study investigates the effects of modern fractional differentiation on the RLC electrical circuit via exact analytical approach. The modeling of governing differential equation of RLC electrical circuit has been fractionalized through three types of fractional derivatives namely Caputo, Caputo-Fabrizio and Atangana-Baleanu fractional derivatives based on the range as $$0 \le \alpha \le 1,\,\,0 \le \beta \le 1,\,\,0 \le \gamma \le 1$$ respectively. The RLC electrical circuit is observed for exponential, periodic and unit step sources via three classified modern fractional derivatives. The exact analytical solutions have been investigated by invoking mathematical Laplace transforms and presented in terms of convolutions product and special function namely Fox-H function. The Comparative mathematical analysis of RLC electrical circuit is based on Caputo, Caputo-Fabrizio and Atangana-Baleanu fractional derivatives which exhibit the presence of heterogeneities in the electrical components causing irreversible dissipative effects. Finally, the several similarities and differences for the periodic and exponential sources have been rectified on the basis of the Caputo, Caputo-Fabrizio and Atangana-Baleanu fractional derivatives for the current.

Design and implementation of a neighborhood search biogeography-based optimization trainer for classifying sonar dataset using multi-layer perceptron neural network

Abstract: Multi-Layer Perceptron Neural Network (MLP NN) is one of the most applicable tools in solving complicated problems as well as classifying between target and non-target in sonar applications. In this paper, we use Biogeography-based Optimization (BBO) to train the MLP NN. Due to improving the exploration ability and enhancing the diversity of the population, we propose mutation operators into BBO and call it Neighborhood Search Trainer (NST). In addition, these operators prepare more balance between exploration and exploitation ability of BBO and induce it to record best results for solving high-dimensional problems. To assess the performance of the proposed classifier, this network will be evaluated with three datasets with various sizes and complexities. The results are compared with some of the most popular meta-heuristic algorithms for verification. The simulation results show that the new classifier performs better than the other benchmark algorithms and also than original BBO in terms of avoidance trapping in local optima, classification accuracy, and convergence speed. This paper also implements the designed classifier on the FPGA substrate for testing the real-time application of the proposed method.

Miniaturized microstrip dual-band bandpass filter with wide upper stop-band bandwidth

Abstract: A novel microstrip dual-band bandpass filter (BPF) with bended microstrip lines, rectangular resonators and stepped impedance resonator (SIR) is designed, analyzed and fabricated. This circuit provides two pass-bands with the center frequencies of 3.6 and 5.7 GHz. Moreover, the LC equivalent circuits of the basic and main resonators are meticulously computed so as to present an analytical description. The surface current distributions of the proposed filter are shown to verify the performance of the filter and provide physical insight. The measured data of the proposed filter indicate that the insertion losses are better than 0.53 and 0.67 dB and the return losses are 25 and 24.7 dB in the first and second bands, respectively. One of the most outstanding features of the proposed filter is that the upper band can be tuned between 5.7 and 8.4 GHz without any increment in the circuit size. The compact size, wide upper stop-band bandwidth, low insertion loss, sharp transition bands, and high attenuation level in the stop-bands are the other marked positive points of the designed filter. Finally, a suitable agreement between the simulated and measured S-parameters can be observed.

An electrocardiogram signal compression techniques: a comprehensive review

Abstract: In spite of development in digital storage and communication technology, the demand for data compression is ever increasing. The ECG data requires about 40–50 MB per channel space for 24-h recording. Limitations of storage size, higher bandwidth and the extra transmission time to these signals over different communication channels force to study an efficient compression algorithm. The primary objective is to retain the most useful clinical information while compressing the ECG signals to an acceptable size. The literature proposes many algorithms to implement ECG compression. It is the observation that, among all, the wavelet-based algorithms provide better compression performance. This paper is a review of most promising algorithms of ECG compression with emphasis to wavelet-based ECG signal compression.

A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications

Abstract: With the increased requirement of on-chip data computations in internet of things based applications, the embedded on-chip SRAM memory has been under its renovation stage to overcome the classical problems like stability and poor energy efficiency. In this work, a data-dependent-power-supply mechanism for a new 11T SRAM cell is proposed with ultra-low leakage and improved read/write stability against the process–voltage–temperature variations. The proposed cell consumes static power in the fraction of picowatt range and has considerable enhancement in the value of write static noise margin (WSNM). In addition, the use of associated read decoupling approach, with the column-based read buffer, further improves the read stability of the proposed cell and make it comparable with the hold stability value. The percentage reduction in the leakage power of proposed 11T cell is $$99.97\%$$ , $$99.93\%$$ and $$99.97\%$$ , while the WSNM 1 is $$6.98\times$$ , $$3.12\times$$ and $$1.46\times$$ , and WSNM 0 is $$5.55\times$$ , $$1.25\times$$ and $$1.16\times$$ larger when operating at 0.4 V and compared to the conventional 6T and threshold voltage techniques based VTH_9T and data aware write assist (DAWA) 12T SRAM cell structures respectively. $$I_{read}{/}I_{leak}$$ ratio for the proposed cell has improved by $$6.55\times$$ , $$6.22\times$$ and $$5.11\times$$ when compared with the 6T, VTH_9T and DAWA12T SRAM to increase the memory density. Further, the post-layout Monte Carlo simulation results (2000 samples) confirm the robustness of the proposed cell against the process variations.

Reversals of period doubling, coexisting multiple attractors, and offset boosting in a novel memristive diode bridge-based hyperjerk circuit

Abstract: In this paper, a new memristive diode bridge-based RC hyperjerk circuit is proposed. This new memristive hyperjerk oscillator (MHO) is obtained from the autonomous 4-D hyperjerk circuit (Leutcho et al. in Chaos Solitons Fractals 107:67–87, 2018) by replacing the nonlinear component (formed by two antiparallel diodes) with a first order memristive diode bridge. The circuit is described by a fifth-order continuous time autonomous (‘elegant’) hyperjerk system with smooth nonlinearities. The dynamics of the system is investigated in terms of equilibrium points and stability, phase portraits, bifurcation diagrams and two-parameter Lyapunov exponents diagrams. The numerical analysis of the model reveals interesting behaviors such as period-doubling, chaos, offset boosting, symmetry recovering crisis, antimonotonicity (i.e. concurrent creation and destruction of periodic orbits) and several coexisting bifurcations as well. One of the most attractive features of the new MHO considered in this work is the presence of several coexisting attractors (e.g. coexistence of two, three, four, five, six, seven, or nine attractors) for some suitable sets of system parameters, depending on the choice of initial conditions. Accordingly, the distribution of initial conditions related to each coexisting attractor is computed to highlight different basins of attraction. Laboratory experimental measurements are carried out to verify the theoretical analysis.

QRS detection of ECG signal using hybrid derivative and MaMeMi filter by effectively eliminating the baseline wander

Abstract: Presently in medical science, diagnostic process demands longer electrocardiogram (ECG) signal recordings, which have traditionally been processed on high-speed multicore personal computers. However, for local ECG signal collection and processing, a highly efficient, low-power battery-driven portable devices are essential for efficient and convenient clinical use. For this, an accurate and improved QRS detector is required which can effectively eliminate the baseline wander. In this paper, a novel technique to detect the QRS complex of ECG signal with hybrid filter composed of derivative and maximum mean minimum (MaMeMi) filter has been proposed. The performance of this technique is compared with the existing technique that consists of MaMeMi filter only for the QRS detection. Various parameters such as sensitivity, specificity, accuracy, detection error rate and elapsed time are used for analyzing the results on the MIT-BIH Arrhythmia database. It is observed that overall performance of the proposed technique is better than the existing technique for these parameters.

A novel high CMRR trans-impedance instrumentation amplifier for biomedical applications

Abstract: A compact high gain current mode instrumentation amplifier (IA) has been proposed for biomedical imaging applications. Conventional IAs rely on several matching resistors which occupies a lot of silicon area, the input and output common mode voltages are exactly same and the maximum applied signal amplitude is limited by internal node voltage swings. The present proposal eliminates the need for matching resistors by processing signals in the current mode. Hence input amplitudes are no longer limited by the voltage headroom and input and output common-mode voltages can be independent. An amplifier with a differential gain greater than 52 dB and a common mode rejection ratio greater than 120 dB has been implemented in 65 nm CMOS Technology and Post layout simulations were presented. The total circuit occupies 4500 μm2 silicon area and circuit consumes ~ 260 μA from 1.8 V power supply.

A modified Wilkinson power divider with ultra harmonic suppression using open stubs and lowpass filters

Abstract: In this paper, a modified 1 GHz Wilkinson power divider with ultra harmonics suppression is proposed. In the presented divider, three open stubs are used at three ports of divider and two compact low-pass filters are used as quarter-wavelength transmission lines paths. The proposed divider shows excellent specifications and suppresses significant number of unwanted harmonics (2nd–30th) with high attenuation, which features the ultra wide stopband bandwidth. To the best knowledge of the authors, the proposed divider shows the widest harmonics rejections band, compared to recent power dividers. The achieved size of the fabricated divider is only 34.6 mm × 31.2 mm (0.14 λg × 0.13 λg).

A minimal three-term chaotic flow with coexisting routes to chaos, multiple solutions, and its analog circuit realization

Abstract: We introduce a unique chaotic flow with three terms expressed by $$ \dddot x + abx = d \sinh \left( {\dot{x} + c\ddot{x}} \right) $$. This minimal Jerk model is presented as a novel 3-D chaotic system consisting uniquely of two linear terms and single hyperbolic sine nonlinearity. The presence of coexisting routes to chaos in the numerical studies justifies the appearance of multiple solutions in some ranges of parameters. For instance, up to six different coexisting solutions (a pair of period-5 limit cycles and two pairs of chaotic attractors) have been tracked. Furthermore, the generalized form of the introduced Jerk system is synthesized with a parametric nonlinearity of the form $$ \phi_{k} \left( X \right) = 0.5\left( {exp\left( {k\left( {\dot{x} + c\ddot{x}} \right)} \right) - exp\left( { - \left( {\dot{x} + c\ddot{x}} \right)} \right)} \right) $$. Based on this generalized form, and judiciously adjusting the parameter $$ k $$, an in-depth description of the dynamics of the system at the symmetry boundaries is carried out. Hysteresis and parallel bifurcation behaviors reflect the presence of multiple asymmetric solutions (e.g. the coexistence of four asymmetric attractors) in the new model. It should be mention that the presence of six coexisting attractors reported in this work is rarely shown in third-order systems and therefore represents an enriching contribution to the study of dynamic systems in general. Finally, some PSpice simulations and laboratory tests of the proposed circuit are included.

An autonomous chaotic and hyperchaotic oscillator using OTRA

Abstract: This research paper reports a novel design for third order chaotic and hyperchaotic oscillator with cubic nonlinearity using single operational trans-resistance amplifier (OTRA) and few passive elements. The key nonlinear dynamical characteristics in terms of sensitivity, divergence, equilibrium point and Lyapunov exponent are recorded in this literature. The operational activity of the proposed oscillator based on OTRA is integrated using 0.25 µm TSMC CMOS parameter. For the generation of hyperchaotic oscillator, an external capacitor is added to the third order chaotic oscillator. To justify the theoretical nonlinear dynamics of proposed chaotic oscillator, PSPICE simulation by using CMOS based OTRA and experimental investigation using IC AD844 based OTRA are well implemented.

Low power self-controllable voltage level and low swing logic based 11T SRAM cell for high speed CMOS circuits

Abstract: This article explains about the design of a new low power 11T SRAM cell. In this proposed method, two voltage sources are used, one is connected to the bit line and the other is connected to the bit bar line respectively in order to eliminate the swing voltage at the output nodes of the bit and bit bar lines. When the SRAM cell is in working mode the dynamic power dissipation is reduced by minimizing the swing voltage. Self-controllable voltage level is a technique in which PMOS transistor acts as a switch and NMOS transistors act as a resistors coupled in series reduces leakage current when the transistors change its state from sleep to active and vice versa. Reduce in leakage current causes the diminution in static power dissipation. To avoid the data retention difficulty, maximum voltage is supplied to the circuit during the active mode and reduced voltage is supplied during the stand-by mode. By using Synopsys EDA tool, all simulation results of power dissipation, delay, transistor utilization, power delay product and energy-delay product of the proposed 11T SRAM cell and other existing models of SRAM cell has been carried out in 30 nm CMOS technology.

A new secure communication scheme using fractional order delayed chaotic system: design and electronics circuit simulation

Abstract: In this paper, a new approach to secure in perturbed receiver based on the Chen fractional order delayed chaotic system is developed and the electronics circuit is simulated with Multisim. The main idea of this approach is the injection of the transmitted message in the dynamics of the Chen fractional order delayed chaotic system in the transmitter. To recover the message from the perturbed receiver, we use the H-infinity to establish the synchronization between the transmitter and the receiver and to recover the transmitted signal. Little paper in the literature presents the electronic circuit of the secure communication using fractional order delayed chaotic system due to the difficulty of realization, for it, the electronic circuit is detailed using Multisim software to demonstrate the feasibility of the proposed approach.

Low-power high-speed CMOS double tail dynamic comparator using self-biased amplification stage and novel latch stage

Abstract: This paper presents a low voltage double-tail dynamic comparator (DTDC) for fast and power-efficient data conversion. The amplification stage of the proposed DTDC is designed using self-biasing technique, which helps to reduce external biasing requirement to bias bulk/gate of the transistors. The self-biasing technique controls threshold voltage (Vth) of the transistors either for fast switching (low-Vth) or for low power dissipation (high-Vth). The latch stage of the proposed DTDC is designed with novel dynamic CMOS inverters to improve the regeneration speed. The mathematical equations for delay and offset voltage are derived for the proposed DTDC and improvements are mentioned. The proposed DTDC is designed in CADENCE and simulated with SPECTRE using 45 nm CMOS process technology at the low power supply of 0.8 V to verify the outcomes. The simulation results reveal that the delay and power dissipation of the proposed DTDC are 166.29 pS and 2.3 µW respectively. The analysis of 1-sigma offset error is performed using Monte-Carlo simulation. Here, the mismatch and process variation are considered and the samples are generated randomly till 200 samples (runs). Additionally, the peak input voltage error due to kickback noise is 0.219 mV for a differential input voltage of 5 mV.

Signal speech reconstruction and noise removal using convolutional denoising audioencoders with neural deep learning

Abstract: Datasets exist in real life in many formats (audio, music, image,...). In our case, we have them from various sources mixed together. Our mixtures represent noisy audio data that need to be extracted (features), compressed and analysed in order to be presented in a standard way. The resulted data will be used for the Blind Source Separation task. In this paper, we deal with two types of autoencoders: convolutional and denoising. The novelty of our work is to reconstruct the audio signal in the output of the neural network after extracting the meaningful features that present the pure and the powerful information. Simulation results show a great performance, yielding of 87% for the reconstructed signals that will be included in the automated system used for real word applications.

Improved reversed nested miller frequency compensation technique based on current comparator for three-stage amplifiers

Abstract: This paper attempts to propose a newly modified method to improve the frequency compensation of three-stage operational trans-conductance amplifiers. In the topology of the new frequency compensation, a current comparator is placed on the feedback path, while the common node of Miller compensation capacitors, the feedforward path, is removed by eliminating the right-half plane zero. This tremendously improves the phase margin, stability, and gain band width product. Compared with other available frequency compensation methods, the newly proposed method manages to improve the figure of merits and lower power consumption while significantly decreasing the dimensions of capacitors in the compensation network. The superiority of the new method over other conventional methods for reversed nested Miller compensation has been examined by a three stage amplifier that has been designed and simulated through a 180 nm standard library CMOS. The results indicate that the new amplifier has achieved a power consumption of 285 µW, gain band width product of 14 MHz, and phase margin of 86° with 100 pF capacitance load at the supply voltage of 1.8 V.

Single VDTA based resistorless quadrature oscillator

Abstract: A new circuit for a simple resistorless quadrature oscillator is proposed in this work. The circuit consists of a single voltage dependant transconductance amplifier block and two grounded capacitors which ease IC fabrication. The workability of the circuit has been verified using 180 nm CMOS based TSMC Technology. Moreover, an experiment is performed using a prototype assembled using a commercially available operational transconductance amplifier IC LM3080.

A novel approach for fault detection of analog circuit by using improved EEMD

Abstract: Fault detection and circuit testing consider as an important stage in production process. Fault detection is generally the last part of production process and after that the system is ready to use. Nowadays, controlling circuits and systems are widely used in control, communications, medical instruments and etc. the complexity of circuits are increased by growth of technology. Therefore, research and investigation on circuit fault detection is a challenging and non-ignorable issue. Many method has been presented in order to solve this problem. In this work methods based on signal processing and artificial intelligence will be used. Many of this methods such as wavelet transform, artificial neural networks, support vector machines, genetic algorithm and etc. were used in fault detection field. In this paper, a new method for the empirical mode decomposition of signals into independent IMF is presented, which results in extraction of discriminative features and better fault detection accuracy. The proposed method has been investigated and compared using two analog benchmark circuit. The results show a better performance of the proposed method.

Design of a novel wideband microstrip diplexer using artificial neural network

Abstract: In this paper, we use an artificial neural network (ANN) to design a compact microstrip diplexer with wide fractional bandwidths (FBW) for wideband applications. For this purpose, a multilayer perceptron neural network model trained with the back-propagation algorithm is used. First, a novel resonator consists of coupled lines loaded by similar patch cells is proposed. Then, using the proposed ANN model, two mathematical equations for S11 and S21 are obtained to achieve the best configuration of the proposed bandpass filters and tune their resonant frequencies. Finally, using the obtained bandpass filters, a high-performance microstrip diplexer is created. The first channel of the diplexer is from 1.47 GHz up to 1.74 GHz with a wide FBW of 16.8%. The second channel is expanded from 2 to 2.23 GHz with a fractional bandwidth of 11%. In comparison with the previous designs, our diplexer has the most compact size. Moreover, the insertion losses at both channels are improved so that they are 0.1 dB and 0.16 dB at the lower and upper channels, respectively. Both channels are flat with a maximum group delay of 2.6 ns, which makes it suitable for high data rate communication links. To validate the designing method and simulation results, the presented diplexer is fabricated and measured.

The effects of symmetry breaking on the dynamics of a simple autonomous jerk circuit

Abstract: We investigate the dynamics of a simple jerk circuit where the symmetry is broken by forcing a dc voltage. The analysis shows that with a zero forcing dc voltage, the system displays a perfect symmetry and develops rich dynamics including period doubling, merging crisis, hysteresis, and coexisting multiple (up to six) symmetric attractors. In the presence of a non-zero forcing dc voltage, several unusual and striking nonlinear phenomena occur such as coexisting bifurcation branches, hysteresis, asymmetric double scroll strange attractors, and multiple coexisting asymmetric attractors for some appropriate sets of system parameters. In the latter case, different combinations of attractors are depicted consisting for instance of two, three, four, or five disconnected periodic and chaotic attractors depending solely on the choice of initial conditions. The investigations are carried out by using standard nonlinear analysis tools such as Lyapunov exponent plots, bifurcation diagrams, basins of attraction, and phase space trajectory plots. The theoretical results are checked experimentally and a very good agreement is found between theory and experiment.

An efficient end-to-end deep learning architecture for activity classification

Abstract: Deep learning is widely considered to be the most important method in computer vision fields, which has a lot of applications such as image recognition, robot navigation systems and self-driving cars. Recent developments in neural networks have led to an efficient end-to-end architecture to human activity representation and classification. In the light of these recent events in deep learning, there is now much considerable concern about developing less expensive computation and memory-wise methods. This paper presents an optimized end-to-end approach to describe and classify human action videos. In the beginning, RGB activity videos are sampled to frame sequences. Then convolutional features are extracted from these frames based on the pre-trained Inception-v3 model. Finally, video actions classification is done by training a long short-term with feature vectors. Our proposed architecture aims to perform low computational cost and improved accuracy performances. Our efficient end-to-end approach outperforms previously published results by an accuracy rate of 98.4% and 98.5% on the UTD-MHAD HS and UTD-MHAD SS public dataset experiments, respectively.

Design of Wang shape neutralization line antenna to reduce the mutual coupling in MIMO antennas

Abstract: The making of a Wang shape neutralization line is proposed in this article. A micro strip fed dual-band polarized antenna having two slits cut on left and right side of the patch is inserted to achieve neutralization between the two patches. The proposed structure has a dimension of 60 mm × 40 mm patches, optimization procedure of 0.09 λ0 is chosen to reduce the mutual coupling and to maintain the spacing between the two radiators. For impedance matching a microstrip feed line to a wang shape neutralization line antenna is excited by a 50 Ω to generate wider operating dual-bands. By congruously embedding small rectangular slots in the patch, the antenna unveils dual-band linear polarization. The dual-band proposed antenna mechanism, surface current distribution, parametric study; step by step antenna design is discussed here. This antenna is suited for WiMAX, 2.6 GHz and C-band, 6.1 GHz applications.

A survey of circuit-level soft error mitigation methodologies

Abstract: Soft errors created due to propagation of single event transients are a significant reliability challenge in modern VLSI. With advances in CMOS technology scaling, circuits become increasingly more sensitive to transient pulses caused by energetic particles. This work reviews some popular circuit level SET mitigation techniques developed for combinational logic and compares them with respect to area, power and delay overheads.

An imperceptible, robust, and high payload capacity audio watermarking scheme based on the DCT transformation and Schur decomposition

Abstract: This paper proposes a novel audio watermarking scheme based on the discrete cosine transform (DCT) and Schur decomposition. The proposed scheme uses the DCT transformation to increase robustness and the Schur decomposition to achieve perceptual transparency. The proposed scheme first applies the DCT transformation to the original audio signal and then applies the Schur decomposition to the mid-frequency band of the DCT coefficients that generate two matrices (U and S). The watermark bits are embedded into the diagonal elements of the triangular matrix S. The Schur decomposition increases the perceptual transparency and the DCT transformation increases robustness of the proposed audio watermarking scheme by effectively resisting several types of audio signal attacks. The imperceptibility of the proposed watermarking scheme is measured subjectively using subjective difference grades (SDG) and objectively using signal-to-noise ratio (SNR) and objective difference grades (ODG) metrics. Its robustness is evaluated against several types of attacks in terms of NC and BER for different types of audio. The resulting of payload capacity, SNR, NC, and BER are as high as 516.26 bps, 77.95, 0.05326, and 0.9727, respectively. Experimental results confirm the proposed scheme is efficient, imperceptible, and robust with a high payload capacity and no effecting audio signal.

A LNA-merged RF front-end with digitally assisted technique for gain flatness and input-match compensation

Abstract: In this paper, a wideband LNA-merged RF receiver front-end (RFE) with digital assist (DA) for conversion gain flatness and input-match compensation is presented. It employs a novel common gate $$g_m$$ -stage with multiple feedback, double-balanced Gilbert-type switches and active loads to form stacking topology. The conversion gain boost factor and input-match compensation factor can be controlled by DA. Theory and simulation results show that DA broaden the RF bandwidth of the proposed RFE and improve the conversion gain flatness. A prototype of the presented RFE is designed and fabricated in the SMIC 40-nm CMOS process, the active area is just $$0.03\,{\hbox {mm}}^2$$ . From measurement results, the proposed RFE achieves conversion gain of 7.5 dB, 10.0 dB and 12.5 dB from 0.5 to 3.5 GHz with 0.3 dB inband ripple. The best IIP3 is 1.5 dBm. The minimum SSB NF is 11.3 dB. The average DC power is only 3.2 mW from a 1.1 V supply.

An adaptive-resolution signal-specific ADC for sensor-interface applications

Abstract: In this paper, a signal-specific analog-to-digital converter (ADC) with a new structure is proposed, in which the resolution of the ADC is adaptively adjusted by the activity of the input neural signal. The main advantages of the proposed technique for converting sparse and burst-like signals include (1) output data-rate reduction, and (2) power savings in ADC and its succeeding blocks. These benefits are obtained owing to the truncation of bits along in-active part of the signal. The extra blocks for realizing the proposed adaptive-variable resolution technique are fully-digital, which add minimum complexity and design overhead to the ADC. The proposed ADC has a suitable data compression capability at the expense of a tolerable degradation in quality of the reconstructed signal. The simulation results in a 180 nm CMOS technology show power savings of up to 39.5% and a compression ratio of 3.9?, as compared to the conventional structure.

Application of fractal dimension for EEG based diagnosis of encephalopathy

Abstract: In this study, we have investigated whether fractal dimension is a useful non linear feature for distinguishing electroencephalogram (EEG) of cases with encephalopathy from that of normal healthy EEGs. Both Higuchi’s fractal dimension and Katz’s fractal dimension were computed and were statistically analyzed between the normal and disease groups. Both parameters showed significant difference between the normal and encephalopathy groups, though Higuchi’s fractal dimension showed better discriminating ability. Support Vector Machine (SVM) classifier was also applied for the automated diagnosis of encephalopathy based on EEG. It has been found that SVM classifier performed better when Higuchi’s fractal dimension was utilized as feature set than using both Higuchi’s and Katz’s FD together.

Application of tunable-Q wavelet transform based nonlinear features in epileptic seizure detection

Abstract: Automated epileptic seizure detection is essential for advancing epilepsy diagnosis and assisting medical professionals. Automated seizure detection using Electroencephalogram signals has gained significant interest in recent past and appeared to be an expedient approach in both disease diagnosis and treatment. In this paper, a new methodology of automated epileptic seizure detection using Tunable Q-wavelet Transform (TQWT) based nonlinear feature extraction is presented. The Electroencephalogram dataset studied in present work includes trials from non-seizure, pre-seizure and seizure EEG activity. Proposed methodology is carried out in three methodological steps. In first step, Electroencephalogram activity is decomposed into optimum number of time–frequency sub-bands using TQWT. In second step, three nonlinear features viz. approximate entropy, Higuchi’s fractal dimension and Katz’s fractal dimension are estimated from decomposed sub-bands and four feature vectors are prepared. Classification of estimated feature vector is performed using two soft computing techniques viz. support vector machine and random forest tree classifier in the third step. Experimental results illustrate efficacy of estimated features in epilepsy detection task. Classification results demonstrate that proposed methodology of nonlinear feature estimation preserves efficiency and simplicity and is appropriate for epileptic seizure detection.

A wideband design analysis of LNA utilizing complimentary common gate stage with mutually coupled common source stage

Abstract: This paper presents a wideband low noise amplifier (LNA) which consist cascade of two stages. First stage, a complimentary common gate (CCG) stage is utilized to consume low power and low chip area while second stage is the mutually coupled common source (CS) stage used to generate high gain at high frequency. The concept of current reuse technique is used in CCG stage to save the dc power. While for the objective of low chip area, mutually coupled inductors are used, mathematically equivalent to a transformer. CCG stage provides high gain at low frequency. A frequency dependent load is generated by mutually coupled CS stage to transfer this gain at high frequency and then this load is transferred to the CCG stage using load transformation technique. This help a lot in achieving wide band input matching hence low noise figure (NF). Proposed LNA is verified mathematically and simulated in 90-nm CMOS process. The measured 3-dB bandwidth is 4.7–14.7 GHz with maximum voltage gain of 17.2 dB, minimum NF of 1.8 dB and S11 < − 10.3 dB. Maximum available power gain (GA) is 11.9 dB and maximum operating power gain is 11.4 dB at frequency of 13.2 GHz.