Showing papers in "IEEE Circuits & Devices in 2005"

CMOS image sensors

Abstract: In this article, we provide a basic introduction to CMOS image-sensor technology, design and performance limits and present recent developments and future directions in this area. We also discuss image-sensor operation and describe the most popular CMOS image-sensor architectures. We note the main non-idealities that limit CMOS image sensor performance, and specify several key performance measures. One of the most important advantages of CMOS image sensors over CCDs is the ability to integrate sensing with analog and digital processing down to the pixel level. Finally, we focus on recent developments and future research directions that are enabled by pixel-level processing, the applications of which promise to further improve CMOS image sensor performance and broaden their applicability beyond current markets.

The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance

Abstract: The rapid cadence of metal-oxide semiconductor field-effect transistor (MOSFET) scaling, as seen in the new 2003 International Technology Roadmap for Semiconductors ITRS), is accelerating introduction of new technologies to extend complementary MOS (CMOS) down to, and perhaps beyond, the 22-nm node This acceleration simultaneously requires the industry to intensify research on two highly challenging thrusts: one is scaling CMOS into an increasingly difficult manufacturing domain well below the 90-nm node for high performance (HP), low operating power (LOP), and low standby power (LSTP) applications, and the other is an exciting opportunity to invent fundamentally new approaches to information and signal processing to sustain functional scaling beyond the domain of CMOS This article is focused on scaling CMOS to its fundamental limits, determined by manufacturing, physics, and costs using new materials and nonclassical structures This paper provides a brief introduction to each of the new nonclassical CMOS structures This is followed by a presentation of one scenario for introduction of new structural changes to the MOSFET to scale CMOS to the end of the ITRS A brief review of electrostatic scaling of a MOSFET necessary to manage short channel effects (SCEs) at the most advanced technology nodes is also provided

Mobility-enhancement technologies

Abstract: Applying stress to induce appropriate strain in the channel region of metal-oxide-semiconductor field effect transistors (MOSFETs) increases both electron and hole mobilities in the strained channel as stated in R People (1986), J J Welser et al (1994), C K Maiti et al (1998) and D J Paul (2004) Furthermore, interest is driven by the possibility of creating electronic devices as well as integrating existing devices in different materials systems, leading to the production of integrated circuits with increased functionality and lower cost In this article, we review various mobility enhancement techniques, such as substrate-enhancement, including stain, Ge/SiGe channels, orientations, process-induced strain, and package-strain (external mechanical strain)

Emerging research logic devices

Abstract: Presents an an assessment of new field-effect transistor, resonant tunnel device, single-electron transistor and quantum cellular automata technologies. The goal of this article is to provide technical assessments of new logic technologies. We attempt to "cast a broad net" to gather in one place alternative concepts for logic that would, if successful, substantially extend the International Technology Roadmap for Semiconductors (ITRS) beyond CMOS. The discussions provide some detail regarding device operation principles, advantages, challenges, maturity, and current and projected performance. The scaling of CMOS device and process technology, as it is known today, is projected to continue (7-nm physical channel length) by 2019. The grand challenge, then, is to invent and develop one or more new technologies that will extend the scaling of information-processing technologies through multiple generations beyond 2019. Such new technologies must meet certain fundamental requirements and possess certain compelling attributes to justify the very substantial investments that are necessary to build a new infrastructure.

Mobility enhancement

Abstract: This article is targeted as an introduction to the physics of strained Si and the current state of the art in uniaxial strained Si MOSFET. The first part of the article explains how strain alters the valence and conduction band of Si as well as scattering rates. This is followed by a review of state-of-the-art strained techniques being implemented in 90- and 65-nm process technologies. Finally, we conclude with a discussion of the future scalability of strained Si MOSFETs in the ballistic regime and nanoscale CMOS.

A perspective from the 2003 ITRS: MOSFET scaling trends, challenges, and potential solutions

Abstract: The IC industry has been rapidly and consistently scaling the design rules, increasing the chip and wafer size, and cleverly improving the design of devices and circuits for over 35 years. As a result, the industry has enjoyed exponential increases in chip speed and functional density versus time combined with exponential decreases in power dissipation and cost per function versus time, as projected by Moore's Law by G.E. Moore (1995). As metal-oxide semiconductor field-effect transistors (MOSFETs) are scaled to deep submicron dimensions, the integrated circuit (IC) industry is running into increasing difficulties in continuing to scale at the accustomed rate, owing to the small dimensions and certain key device, material, and process limits that are being approached.

Memory technology for post CMOS era

Abstract: One of the tasks of the International Technology Roadmap for Semiconductors (ITRS) Emerging Research Devices (ERD) Technology Working Group (TWG) is to seek out memory technologies presented in the research literature and weigh whether they have the potential to serve in 22-nm and smaller IC generations. The motive for this effort is to develop data that can help guide research investment decisions. In 2004, the ERD TWG summarized some quantitative attributes of four alternative memory approaches, and developed a potential/risk score for each. While this effort falls far short of identifying a specific technology, it is at least a beginning. This article describes the nature of the challenge and reports initial study results.

Emerging research memory and logic technologies

Abstract: The purpose of this article is to introduce a set of technology relevance or evaluation criteria and, based on these criteria, to offer a critical assessment of those technology entries for memory and logic being considered for post CMOS-scaling information processing. Additionally, charge-based nanoelectronic devices are discussed in this article separately from those approaches proposing use of a new means for data representation or "state variable." This separate discussion addresses an important question related to new charge-based information-processing approaches concerning the fundamental limits of an elemental switch (size, energy, speed, etc.).

The power of functional scaling: beyond the power consumption challenge and the scaling roadmap

Abstract: The relentless progress of silicon technology in the last few decades has been astounding, owing to device scaling. The characteristic lengths associated with successive generations of the technology have decreased, producing higher performance devices and circuits. At various times, people have predicted the end of scaling because of apparent barriers, but these barriers have fallen thanks to the ingenuity of the scientists and engineers involved in the technology. This has occurred through developments and changes in device design, the introduction of new materials, improved processing technologies and tools - both engineering and simulation - and other innovative approaches. The resulting increases in the densities of devices and their functionality in circuits now make the issue of power dissipation, both static and dynamic, a serious constraint to future scaling advances. In this article, a new very large scale integration (VLSI) structure is proposed and demonstrated to address these issues, using the 3D integration of high performance Ge-on-insulator (GOI) field effect transistors above conventional interconnects and Si devices.

Artificial neural-network model-based observers

Abstract: Describes a pseudorandom testing scheme for fault diagnosis of analog integrated circuits. The goal is to implement a BIST technique with both a built-in pattern generator and a response analyzer for fault diagnosis. We have chosen a diagnostic framework for the analog ICs using a pseudorandom noise generator as the test-pattern generator and a model-based observer to detect and diagnose faults. The observer is implemented through a multilayer feedforward ANN trained with a back-error propagation (BEP) algorithm. Both the test-pattern generator and the model-based observer proposed in this article can be implemented either on- or offline depending on the need of the application and silicon area overhead.

Embedded compact flash

Abstract: A new data storage system designed for a data acquisition system is presented. The article describes the architecture of a large non-volatile memory data storage system (DSS) mainly developed for compact flash (CF) memory. A DSS handles the available storage space of the medium as a circular buffer rather than as an emulated disk in order to provide an efficient and easy to use software interface. A circular buffer is simply another name for a first-in-first-out (FIFO) buffer. The name circular buffer helps to visualize the wraparound condition. CF memories provide a persistent storage medium using solid-state memory technology at a lower cost and lower power consumption than other solid-state technologies.

Switch fabrics

Abstract: We examined a spectrum of (unbuffered) switching architectures and explored various design alternatives, where each is marked by its own merits and drawbacks. A number of trade-offs between the various switching architectures in terms of their characteristics (such as performance, implementation complexity, scalability, and cost) emerge. Hence, the wide variety of available switching fabrics means that no single architecture emerges as the only winning proposition. The ultimate decision is upon the switch architect, based on the overall system design requirements and specifications.

Developing device models

Abstract: Describes rapid implementation of semiconductor device models in SPICE using an MCAST compact model compiler. Device-model development is a vital component of circuit design and is traditionally a very challenging task. To overcome this challenge, it would be beneficial for model developers to use high-level behavioral language and model compilers. Implementations of MOS level-3 models and BSIMSOI models have demonstrated that this behavioral modeling approach is more efficient and practical than traditional C/FORTRAN methodologies and could save future model developers a significant amount of time and cost in implementation and maintenance. With the further enhancement and wider acceptance of this new approach, it is expected to promote more and better device models in the near future.

The Woman's Guide to Navigating The Ph.D. in Engineering and Science [Book Review]

Abstract: IEEE CIRCUITS & DEVICES MAGAZINE ■ MARCH/APRIL 2005 THE WOMAN’S GUIDE TO NAVIGATING THE PH.D. IN ENGINEERING AND SCIENCE By Barbara B. Lazarus, Lisa M. Ritter, Susan A. Ambrose, IEEE Press Publication, 2001. The rigidity of the existing maledominant academic ethos constitutes formidable barriers to the entry and retention of women in all levels of academic science and engineering. The goal of The Woman’s Guide to Navigating the Ph.D. in Engineering and Science, by Barbara Lazarus, Lisa Ritter, and Susan Ambrose (of the Carnegie Mellon scientific community), is to aid women in overcoming the stereotypes and hidden barriers that they might encounter in graduate school, so that they will emerge fit and ready to succeed in careers in the academic, corporate, or public sector. This text unravels some of the mysteries surrounding graduate school programs in science and engineering, as well as providing strategies for succeeding. The book illuminates many important topics, including choosing an advisor, identifying research-funding sources, survival skills in graduate school, writing and successfully defending the doctoral dissertation, and planning and preparing for the first professional job after graduate school. The guide also effectively focuses on the emotional, social, and family challenges women may encounter and offers practical suggestions and advice for surviving, stabilizing, and thriving in the graduate school. Interspersed throughout the volume are personal stories and advice from current female graduate students based on their experiences in graduate school and from successful women engineers and scientists from across the United States. In summary, abundant with crisp and straightforward messages, I believe that this handy book systematically establishes a far-reaching “map” of the graduate school experience that will be invaluable not only to women candidates, but to all graduate students and mentors in engineering and science disciplines. Lazarus and associates are to be sincerely applauded for providing a critical, direct, and powerful literature contribution. Although only 105 pages in length, this book effectively exemplifies a popular Tamil (a South Indian Language) saying that the taste and spiciness of mustard seeds will not diminish, even if they are small, and provides a valuable support resource for women in the traditionally male-dominated fields of science and engineering. Guruprasad Madhavan AFx Inc, CA & SUNY Stony Brook, NY

Simple, low-cost, subsystem fabrication

Abstract: We have successfully developed a simple and low-cost 1.9-GHz, 25-W power amplifier by using only one prematched 50-mm PHEMT with external matching circuits on a FR-4 PCB. As the output stage integrated with other driver stages and dc control circuits, a completed four-stage power-amplifier subsystem is also demonstrated. When operating at 38.5-dBm output power with /spl pi//4-DQPSK signal, the proposed power amplifier subsystem shows low distortion, with better than 75-dBc ACPR (adjacent-channel leakage power ratio) at 600 kHz and 79-dBc ACPR at 900 kHz offset from the center frequency, and is suitable for PHS 500-mW base-station applications.

VLSI Designer's interface

Abstract: This presentation discusses the availability of a standard-cell library targeting the TSMC-025 /spl mu/m, 25 V CMOS process; IBM's development of a new "Double-Gate" transistor fabricated in an SOI process and Intel's "TetraHertz Transistor," which it claims is the world's smallest transistor with a gate length of only 15 nm; Modu-Lab, a Web site dedicated to illustrating microfabrication techniques for the basic process steps of deposit, pattern, etch, and repeat; OpenCores' free open-source 33/66 MHz 32-bit PCI Bridge Soft Core, a complete synthesizable RTL (Verilog) code that provides bridging between the PCI and a WISHBONE (system-on-chip) bus; Foveon's development of a full-color image sensor chip that uses three layers of photodetectors embedded in silicon; Aldec and Synplicity design entry and simulation tools for universities and students; a new set of system-on-chip test benchmark circuits; and takes a look at nanotechnology initiatives

Digital Logic Testing and Simulation [Book Review]

Abstract: ment. This idea is shown through the realization of a biquadratic filter for a bandpass sigma-delta modulator. In addition, a family of half-delay switched-opamp integrator and modulator sigma-delta modulators with a strong reduction on power consumption are reported and commented. The book is the first that discuss of this topic and can be found interesting both for specialists in the topic and for postgraduate students who are already familiar with CMOS analog circuits. Gaetano Palumbo

Echo Signal Processing [Book Review]

Abstract: 8755-3996/05/$20.00 ©2005 IEEE COMPOUND SEMICONDUCTOR INTEGRATED CIRCUITS By Tho T. Vu, World Scientific, 2003. This book is a collection of published papers. Some papers focus on difference and advantages of different compound semiconductor while others focus on the device strength on circuit design. As the intent of the compound semiconductor, the book covers high-speed applications, e.g., optical amplifier area. It is pleasing to see how different processes technologies are compared. The comparison ranges from device level-gm, vth, capacitance to circuit performance. In my opinion, the circuit performance comparison doesn’t seem quite fair since different design technique is applied for different technology. For example, traditional CMOS technology circuit design technique is different than those of GaAs. Few papers explain the characteristic of each compound semiconductor well. Basically, all the compound semiconductors are mentioned one way or the other in the book. Charts are plotted to see what happens to the device characteristics when the concentration of one element increases. The papers don’t cover much mathematical formulation. Instead, many simulation/experimental plots are shown. For those interested, the content of this book can be obtained from published papers. The book is a special issue of the International Journal of High Speed Electronics and Systems. COMMON WAVEFORM ANALYSIS—A NEW AND PRACTICAL GENERALIZATION OF FOURIER ANALYSIS By Y. Wei, Qishan Zhang, Yuchuan Wei, and Q. Zhang, Kluwer Academic Publishers, 2000. On many occasions, both academics and students look for mathematical background on subjects such as transforms, matrices, number theory, etc., and many books in print attempt to cater to these needs. Some books successfully present some subjects with sufficient details, while some present a bit of everything and fail in presenting the details of a given specific area. In the book Common Waveform Analysis—A New and Practical Generalization of Fourier Analysis, Wei and Zhang have selected and presented the analysis of square, triangular, and trapezoidal waves with sufficient details and the related mathematical theories behind the subjects. For a specific and a widely used topic such as Fourier series and with sufficient attention to the case of three common repetitive waveforms, the work is impressive in a mathematical sense. The presentation of number theory and frequency analysis based on general periodic functions enhances the value of the presentation for the academic or the student who is more inclined towards the analytical parts of the topic. One useful element for the busy senior academic is Chapter 5, which summarizes most other parts of the book and provides a snapshot approach to essentials of Fourier analysis. Square, triangular, and trapezoidal waveform analysis can be useful in many practical engineering and scientific environments, and this 160-page work is a good reference source for such a specific area. However, in a more modern sense of Fourier transform and associated analytical areas, the work does not provide any breadth or the depth, quite justifiably in such a specialized work. Personally I would love to see more references/bibliography in a work of this kind for more details and also for affiliated areas in a modern engineering sense. Nihal Kularatna,

Electronic and Optoelectronic Properties of Semiconductor Structures [Book Review]

Abstract: IEEE CIRCUITS & DEVICES MAGAZINE ■ JANUARY/FEBRUARY 2005 ELECTRONIC AND OPTOELECTRONIC PROPERTIES OF SEMICONDUCTOR STRUCTURES By Jasprit Singh, Cambridge University Press, 2003. Electronic and Optoelectronic Properties of Semiconductor Structures covers structural properties, band structure, transport, optical, and magnetic properties of semiconductor structures that fuel today’s optoelectronic technologies. Along with these key physical theories, Dr. Jasprit Singh comprehensively reviews more advanced subjects such as quantum confinement effects, mesoscopy, self-assembly, and spintronics. Introductory material is presented with a discussion of current research topics and equips the reader with a background to appreciate the dynamic semiconductor optoelectronics research field. This volume is for those in the physical sciences who want to learn about technological applications of semiconductor theory and those in the electronic engineering community interested in the physics reinforcing the technology. Semiconductor theory is impressively organized into context, and the structure of presentation has been carefully thought out to stalk from Bloch theory and periodic potentials to treating impurities, dopants, and external stimuli as perturbations to the basic theory. Numerical problems and worked examples illustrate points made in the text. An appendix outlining the principal experimental techniques available to investigate the electronic structure of semiconductors is included as is a listing of many of the most crucial electrical properties of a range of semiconductors. Every chapter concludes with a brief discussion of the technological issues raised by the material presented, serving to encourage further study, and in the case of spintronics, for example, paints a picture of a sector still under development. Based on the arrangement of concepts and the background training required to pursue this study, the book could easily be used as a text for senior undergraduate students with a background in quantum mechanics and solid-state physics or graduate students specializing in physics or electronics engineering. The quality of editing is somwhat lacking, as grammatical (and some typographical) discrepancies and font inconsistencies in the text give it the appearance of having been rushed. Nevertheless, Prof. Singh has produced another excellent volume that will be a valuable source for both new entrants and the established in the field of optoelectronic semiconductor structures. Guruprasad Madhavan AFx Inc, California & SUNY Stony Brook, New York

Introduction to PSPICE Using Orcad for Circuits and Electronics, 3rd Edition [Book Review]

Abstract: IEEE CIRCUITS & DEVICES MAGAZINE ■ SEPTEMBER/OCTOBER 2005 INTRODUCTION TO PSPICE USING ORCAD FOR CIRCUITS AND ELECTRONICS, 3RD EDITION By Muhammad H. Rashid, Pearson Prentice-Hall, 2004. The use of circuit simulation programs is widespread, not only in industrial environments and advanced academic courses on electrical or electronic computer-assisted design (ECAD) techniques, but also in introductorylevel academic (or continuing education) courses to supplement classical “paper and pencil” work. Therefore, there is an obvious need for both student version (freeware, possibly) simulation programs and books explaining the basic concepts involved in their practical use for the analysis of the electrical and/or electronic circuits under study. As a consequence, a number of books have been published in past decades with that aim (usually with a student version simulation program attached), most of which related to the well known simulator UCB-SPICE and/or its most widespread PC-platform implementation: PSpice (originally developed by MicroSim, then incorporated by OrCAD, and now owned by Cadence). Among such books, there is also the one here reviewed, written by Prof. M.H. Rashid and edited by Pearson Education for Prentice-Hall. Indeed, it is the third (revised) edition of a previously (1995) published book titled SPICE for Circuits and Electronics Using PSpice, and its stated goal is to provide the ECADnovice reader (undergraduate student or electronics enthusiast) with all the basic information needed to make a start-up with the use of the OrCAD-Cadence simulation suite, which incorporates the PSpice simulation engine and whose 9.2 student version (Lite) is included in the CD-ROM provided with the book. As such, it proposes itself as an introductory textbook on circuit simulation, “to supplement standard textbooks on basic circuits or electronics” in courses where (P)SPICE is a preor a co-requisite. The book is comprised of a preface, an author’s biography, 11 chapters, seven appendices, a general bibliography, and an analytical Index, for a total of 474 pages. All chapters, except the introduction, start with a concise list of abilities that it is assumed will be acquired after reading that chapter, and they end with a list of references and a set of problems (without solution) provided to the reader to further extend and/or practically exercise the knowledge gained so far, respectively. The typographical quality of this (softbound) book is quite satisfactory. Text fonts are very well selected, only minor typos have been found (most of which are identifiable and correctable by unskilled readers), and nearly all figures are of high quality (with the only noticeable exception of Fig. 4.17.b, which should be replaced as soon as possible). Overall, this book is informative and clearly written, and it can be safely stated that going through it would provide any novice in the field with the basic skills needed to start using the PSpiceOrCAD “Design Center” suite for circuit simulation purposes. Furthermore, the professional experience of Prof. Rashid is apparent in the choice of examples, and their “tutorial” nature constitutes an added bonus for the student reader. As such, the book can actually be suggested as a first reading on circuit simulation to undergraduate students (or practitioners) that need a fast and smooth start-up with circuit simulation, when intended as a complementary tool for other electrical or electronic engineering courses. On the other hand, since only minimal information on (P)SPICE embedded numerical algorithms is included in the book, it does not lend itself to be adopted— alone, at least—in graduate and/or ECAD-specific courses, where a full understanding of the capabilities and limitations of “SPICE-like” circuit simulation tools is one of the main goals. Before concluding the review, there is, however, a practical problem that must be brought to the attention of any potential buyer of the book. The problem concerns the specific software distributed with the book. In fact, throughout the book, reference is made to the graphical user interface provided by them “PSpice Schematic” (version 9.1) program which is not on the annexed CD-ROM, and, unfortunately, and contrarily to what stated in the book, it is no longer downloadable from the Cadence Web site. Since the downloading (after registration) of the current version 10.0 of “PSpice Schematic” from the Cadence Web site would not solve the problem (it does work only in conjunction with the full production version 10.0 of OrCAD-PSpice A/D and not with the downloadable student version 10.0), only two workarounds are possible to the general reader. The first is to look-for, download, and install the 9.1 version of the PSpice-OrCAD “Design Center” suite (in place of the 9.2 “OrCAD Lite” version on the annexed CD-ROM), which is still available in a number of (university) file servers on the Net and which does contain both “PSpice Schematic” and “OrCAD Capture” user interfaces. The second possibility is to “translate” the information spread out in the book on the use of “PSpice Schematic” into an “OrCAD Capture” equivalent one, exploiting at best the information available in Appendix B. Clearly, none of the two solutions is optimal from the book’s reader/buyer point of view, who might expect—from a book with such a title— to learn not only basic ECAD concepts and (P)SPICE syntax rules, but also specific and up-to-date information on the current version of the OrCAD suite. Enrico F. Calandra Electrical Engineering Dept. Palermo University, Italy

Inkjet revolution

Abstract: The use of inkjet technology for the application of thin-film-transistor liquid-crystal display manufacturing.

ULSI Semiconductor Technology Atlas [Book Review]

Abstract: IEEE CIRCUITS & DEVICES MAGAZINE ■ SEPTEMBER/OCTOBER 2005 assumptions they made in hand calculation that made their simulation results different. Including simulation would make the book more complicated, but in order to really understand the fundamentals, students need to go through projects and simulations. This book should have stayed focused on the analog part and left the digital part to another textbook. Instead of adding the digital part, the authors should have added some real applications using analog circuits like PLL, transceivers, etc. Instead, this book covers many materials that students may not find in real applications. It would good for students to see the particular blocks of circuitry that can be used in commercial products. Despite a wealth of many pedagogical materials, this book is still one of the best to understand the fundamentals of analog circuitry. The wide deployment of this book in colleges and universities speaks for itself.

Simple suppression [suppressing amplitude modulation]

Abstract: In radio-frequency (RF) systems based on angle-modulated signaling, e.g., phase-shift keying (PSK) or analog frequency modulation (FM), amplitude variations due to the non-ideality of filter elements, channel noise, and signal fading can result in degradation of the system noise performance and produce nonlinear distortions. In order to reduce noise effects and increase the interference immunity, it is essential to remove the amplitude variations prior to detection. Traditionally, a ratio detector has been used in FM receivers for eliminating amplitude modulation (AM). This paper reports a method for suppressing amplitude modulation using simple circuit.