Showing papers in "IEEE Electron Device Letters in 2013"

Junctionless Tunnel Field Effect Transistor

Abstract: In this letter, a double-gate junctionless tunnel field effect transistor (JL-TFET) is proposed and investigated. The JL-TFET is a Si-channel heavily n-type-doped junctionless field effect transistor (JLFET), which uses two isolated gates (Control-Gate, P-Gate) with two different metal work-functions to behave like a tunnel field effect transistor (TFET). In this structure, the advantages of JLFET and TFET are combined together. The simulation results of JL-TFET with high- $k$ dielectric material (TiO2) of 20-nm gate length shows excellent characteristics with high $I_{{\rm ON}}/I_{{\rm OFF}}$ ratio $(\sim 6\times 10^{8})$ , a point subthreshold slope (SS) of ${\sim}{\rm 38}~{\rm mV}$ /decade, and an average SS of ${\sim}{\rm 70}~{\rm mV}$ /decade at room temperature, which indicates that JL-TFET is a promising candidate for a switching performance.

$\hbox{Ga}_{2} \hbox{O}_{3}$ Schottky Barrier Diodes Fabricated by Using Single-Crystal $\beta$ – $\hbox{Ga}_{2} \hbox{O}_{3}$ (010) Substrates

Abstract: We fabricated gallium oxide (Ga2O3) Schottky barrier diodes using β-Ga2O3 single-crystal substrates produced by the floating-zone method. The crystal quality of the substrates was excellent; the X-ray diffraction rocking curve peak had a full width at half-maximum of 32 arcsec, and the etch pit density was less than 1×104 cm-2. The devices exhibited good characteristics, such as an ideality factor close to unity and a reasonably high reverse breakdown voltage of about 150 V. The Schottky barrier height of the Pt/β-Ga2O3 interface was estimated to be 1.3-1.5 eV.

Molecular Doping of Multilayer ${\rm MoS}_{2}$ Field-Effect Transistors: Reduction in Sheet and Contact Resistances

Abstract: For the first time, polyethyleneimine (PEI) doping on multilayer MoS2 field-effect transistors is investigated. A 2.6 times reduction in sheet resistance and 1.2 times reduction in contact resistance have been achieved. The enhanced electrical characteristics are also reflected in a 70% improvement in ON-current and 50% improvement in extrinsic field-effect mobility. The threshold voltage confirms a negative shift upon the molecular doping. All studies demonstrate the feasibility of PEI molecular doping in MoS2 transistors and its potential applications in layer-structured semiconducting 2-D crystals.

p-GaN Gate HEMTs With Tungsten Gate Metal for High Threshold Voltage and Low Gate Current

Abstract: The impact of gate metals on the threshold voltage (VTH) and the gate current of p-GaN gate high-electron-mobility transistors (HEMTs) is investigated by fabricating p-GaN gate HEMTs with different work function gate metals-Ni and W. p-GaN gate HEMTs incorporate a p-GaN layer under the gate electrode as the gate stack on top of the AlGaN/GaN layer. In comparison to the Ni-gate p-GaN HEMTs, the W-gate p-GaN HEMTs showed a higher VTH of 3.0 V and a lower gate current of 0.02 mA/mm at a gate bias of 10 V. Based on TCAD device simulations, we revealed that these high VTH and low gate current are attributed to the low gate metal work function and the high Schottky barrier between the p-GaN and the W gate metal.

600-V Normally Off ${\rm SiN}_{x}$ /AlGaN/GaN MIS-HEMT With Large Gate Swing and Low Current Collapse

Abstract: In this letter, 600-V normally-OFF SiNx/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) is reported. Normally-OFF operation and low OFF-state gate leakage are obtained by using fluorine plasma ion implantation in conjunction with the adoption of a 17-nm SiNx thin film grown by plasma-enhanced chemical vapor deposition as the gate insulator. The normally-OFF MIS-HEMT exhibits a threshold voltage of +3.6 V, a drive current of 430 mA/mm at a gate bias of 14 V, a specific ON-resistance of 2.1 mΩ·cm2 and an OFF-state breakdown voltage of 604 V at a drain leakage current of 1 μA/mm with VGS=0 V, and the substrate grounded. Effective current collapse suppression is obtained by AlN/SiNx passivation as proved by high-speed pulsed I-V and low-speed high-voltage switching measurement results.

Voltage-Triggered Ultrafast Phase Transition in Vanadium Dioxide Switches

Abstract: Electrically driven metal-insulator transition (MIT) in vanadium dioxide (VO2) is of interest in emerging memory devices, neural computation, and high-speed electronics. We report on the fabrication of out-of-plane VO2 metal-insulator-metal structures and reproducible high-speed switching measurements in these two-terminal devices. We have observed a clear correlation between the electrically driven on/off current ratio and the thermally induced resistance change during MIT. It is also found that sharp MIT could be triggered by the external voltage pulses within 2 ns at room temperature and the achieved on/ off ratio is greater than two orders of magnitude with good endurance.

Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors

Abstract: Inverters based on uniaxially tensile strained Si (sSi) nanowire (NW) tunneling field-effect transistors (TFETs) are fabricated. Tilted dopant implantation using the gate as a shadow mask allows self-aligned formation of p-i-n TFETs. The steep junctions formed by dopant segregation at low temperatures improve the band-to-band tunneling, resulting in higher on-currents of n- and p-TFETs of > 10 μA/μm at VDS=0.5 V. The subthreshold slope for n-channel TFETs reaches a minimum value of 30 mV/dec, and is <; 60 mV/dec over one order of magnitude of drain current. The first sSi NW complementary TFET inverters show sharp transitions and fairly high static gain even at very lowVDD=0.2 V. The first transient response analysis of the inverters shows clear output voltage overshoots and a fall time of 2 ns at VDD=1.0 V.

High-Performance Normally-Off ${\rm Al}_{2}{\rm O}_{3}/{\rm GaN}$ MOSFET Using a Wet Etching-Based Gate Recess Technique

Abstract: This letter reports a normally-OFF Al2O3/GaN gate-recessed MOSFET using a low-damage digital recess technique featuring multiple cycles of plasma oxidation and wet oxide removal process. The wet etching process eliminates the damage induced by plasma bombardment induced in conventional inductively coupled plasma dry etching process so that good surface morphology and high interface quality could be achieved. The fully recessed Al2O3/GaN MOSFET delivers true enhancement-mode operation with a threshold voltage of +1.7 V. The maximum output current density is 528 mA/mm at a positive gate bias of 8 V. A peak field-effect mobility of 251 cm2/V·s is obtained, indicating high-quality Al2O3/GaN interface.

High-Sensitivity and Fast-Response Graphene/Crystalline Silicon Schottky Junction-Based Near-IR Photodetectors

Abstract: Schottky junction near-infrared photodetectors were constructed by combing monolayer graphene (MLG) film and bulk silicon. Notably, the device could operate at zero external voltage bias because of the strong photovoltaic behavior of the MLG/Si Schottky junction, giving rise to high responsivity and detectivity of 29 mAW-1 and 3.9×1011 cmHz1/2W-1, respectively, at room temperature. Time response measurement revealed a high response speed of 100 μs, which allowed the device following a fast varied light with frequency up to 2100 Hz. In addition, the device showed great potential for low light detection with intensity at 10 K.

High-Quality Interface in ${\rm Al}_{2}{\rm O}_{3}/{\rm GaN}/{\rm GaN}/{\rm AlGaN}/{\rm GaN}$ MIS Structures With In Situ Pre-Gate Plasma Nitridation

Abstract: We report an in situ low-damage pre-gate treatment technology in an atomic layer deposition (ALD) system prior to the ALD- Al2O3 deposition, to realize high-quality Al2O3/III-nitride (III-N) interface. The technology effectively removes the poor quality native oxide on the III-N surface while forming an ultrathin monocrystal-like nitridation interlayer (NIL) between Al2O3 and III-N surface. With the pre-gate treatment technology, high-performance Al2O3(NIL)/GaN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors are demonstrated, exhibiting well-behaved electrical characteristics including suppressed gate leakage current, a small subthreshold slope of ~64 mV/dec, and a small hysteresis of ~0.09 V.

Highly Scalable Horizontal Channel 3-D NAND Memory Excellent in Compatibility With Conventional Fabrication Technology

Abstract: We developed a stacked horizontal channel type floating gate (HC-FG) NAND memory; a 3-D stacked NAND array composed of conventional FG cells. With this cell structure, a wide program/erase (P/E) window is obtained, accompanied by superior read disturb immunity, P/E endurance, and data retention. In addition, we propose a low-cost layer select transistor (LST) that is easily integrated with the HC-FG cell. Because the 3-D memory composed of the HC-FG cell and the LST has good compatibility with conventional fabrication technology, further bit cost scaling is expected.

Study of Random Dopant Fluctuation Induced Variability in the Raised-Ge-Source TFET

Abstract: The impact of random dopant fluctuations (RDF) on the performance of an optimized TFET design comprising a raised germanium (Ge) source region is investigated via 3-D TCAD simulation. The RDF within the source region results in degraded subthreshold swing and lower turn-on voltage for the raised-Ge-source TFET design. In addition, drain-induced barrier tunneling is mitigated with the raised source design. An optimized raised-Ge-source TFET is projected to provide for lower energy operation at frequencies up to 500 MHz when compared with an ideal MOSFET.

A Model for the Set Statistics of RRAM Inspired in the Percolation Model of Oxide Breakdown

Abstract: The set voltage distribution of Pt/HfO2/Pt resistive switching memory is shown to fit well a Weibull model with Weibull slope and scale factor increasing logarithmically with the resistance measured at the set point. Gaining inspiration from the percolation model of oxide breakdown, a physics-based model for the Vset statistics is proposed. The results of the model are completely consistent with the experimental results and demonstrate the need of a strong reset to get large Weibull slope that provides some relief to the strong requirements imposed by the set speed-read disturb dilemma.

Au-Free AlGaN/GaN Power Diode on 8-in Si Substrate With Gated Edge Termination

Abstract: High-performance AlGaN/GaN diodes are realized on 8-in Si wafers with Au-free CMOS-compatible technology. The diodes are cointegrated on the same substrate together with the AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors and with only one extra lithographic step. The diode anode and the transistor gate are processed together and the same metallization is used for both, avoiding extra metal deposition dedicated to the Schottky junction. A gated edge termination allows obtaining low reverse leakage current (within 1 μA/mm at -600 V), which is several orders of magnitude lower than the one of conventional Schottky diodes processed on the same wafer. Recess is implemented at the anode, resulting in low diode turn-on voltage values.

High-Current GaSb/InAs(Sb) Nanowire Tunnel Field-Effect Transistors

Abstract: We present electrical characterization of GaSb/InAs(Sb) nanowire tunnel field-effect transistors. The broken band alignment of the GaSb/InAs(Sb) heterostructure is exploited to allow for interband tunneling without a barrier, leading to high on-current levels. We report a maximum drive current of 310 μA/μm at VDS = 0.5 V. Devices with scaled gate oxides display transconductances up to gm = 250 mS/mm at VDS = 300 mV, which are normalized to the nanowire circumference at the axial heterojunction.

Low Turn-On Voltage AlGaN/GaN-on-Si Rectifier With Gated Ohmic Anode

Abstract: A novel AlGaN/GaN-on-Si rectifier with a gated ohmic anode has been proposed to reduce the turn-on voltage without breakdown-voltage degradation. The combination of an ohmic anode and a recessed Schottky gate is responsible for the low turn-on voltage and thus increases the forward current. In comparison with conventional Schottky diodes, the forward current at 1.5 V was increased by 2 to 3 times, whereas no breakdown-voltage degradation was observed. The proposed rectifier with an anode-to-cathode distance of 18 μm exhibited a turn-on voltage of 0.37 V, a forward current density of 92 mA/mm at 1.5 V, and a breakdown voltage of 1440 V.

Bulk Accumulation a-IGZO TFT for High Current and Turn-On Voltage Uniformity

Abstract: We present here an amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) in which the accumulation layer is not only confined to the a-IGZO/gate-insulator interface, but extends the entire depth of the a-IGZO This bulk accumulation TFT is achieved by the use of top- and bottom-gate, that are electrically tied together, resulting in drain current that is over seven times higher than that of a single-gate device, for an a-IGZO thickness of 10 nm Thus, high drive current is achieved for a relatively small channel width due to bulk accumulation Furthermore, being independent of carrier scattering at the interface and owing to the bulk accumulation/depletion, the subthreshold swing is always small and turn-on voltage around zero volts with device-to-device uniformity that is much better than that of single-gate TFTs

Mechanism of PEALD-Grown AlN Passivation for AlGaN/GaN HEMTs: Compensation of Interface Traps by Polarization Charges

Abstract: The physical mechanism of passivation of AlGaN/GaN HEMTs by AlN thin film prepared with plasma-enhanced atomic layer deposition (PEALD) is investigated by characterizing Ni- Al2O3/AlN-GaN/AlGaN/GaN metal-insulator-semiconductor (MIS) diodes. The dielectric stack Al2O3/AlN (13/2 nm) exhibits similar capability in suppressing the current collapse in AlGaN/GaN HEMTs as the 4-nm PEALD-AlN thin film used in our previous work but delivers much lower vertical leakage to facilitate the capacitance-voltage characterizations. Exceptionally large negative bias (<; -8 V) is required to deplete the 2-D electron gas in the MIS diode's C-V measurement. By virtue of quasi-static C-V characterization, it is revealed that positive fixed charges of ~ 3.2 × 1013 e/cm2 are introduced by the PEALD-AlN. The positive fixed charges are suggested to be polarization charges in the monocrystal-like PEALD-AlN. They can effectively compensate the high-density slow-response acceptor-like interface traps, resulting in effective suppression of current collapse.

A Four-Terminal, Inline, Chalcogenide Phase-Change RF Switch Using an Independent Resistive Heater for Thermal Actuation

Abstract: An inline chalcogenide phase-change radio-frequency (RF) switch using germanium telluride and driven by an integrated, electrically isolated thin-film heater for thermal actuation has been fabricated. A voltage pulse applied to the heater terminals was used to transition the phase-change material between the crystalline and amorphous states. An ON-state resistance of 4.5 Ω (0.08 Ω-mm) with an OFF-state capacitance and resistance of 35 fF and 0.5 MΩ, respectively, were measured resulting in an RF switch cutoff frequency (Fco) of 1.0 THz and an OFF/ON resistance ratio of 105. The output third-order intercept point measured , with zero power consumption during steady-state operation, making it a nonvolatile RF switch. To the best of our knowledge, this is the first reported implementation of an RF phase change switch in a four-terminal, inline configuration.

A Flexible IGZO Thin-Film Transistor With Stacked ${\rm TiO}_{2}$ -Based Dielectrics Fabricated at Room Temperature

Abstract: This letter demonstrates the feasibility of full room temperature InGaZnO thin-film transistor (TFT) using trilayer gate dielectric on flexible substrate Through integrating high-κ SiO2/TiO2/SiO2 (STS) gate-stack as well as InGaZnO channel thickness modulation, the resulting flexible indium-gallium-zinc oxide (IGZO)/STS TFTs show low threshold voltage of 05 V, small subthreshold swing of 0129 V/decade, high field effect mobility of 76 cm2/Vs , and good ION/IOFF ratio of 67×105, which have the potential for the application of high-resolution flexible display

AlGaN/GaN HEMTs on Silicon Substrate With 206-GHz $F_{ \rm MAX}$

Abstract: This letter reports on AlGaN/GaN high-electron-mobility transistors (HEMTs) on high-resistive silicon substrate with a record maximum oscillation cutoff frequency FMAX. Double-T-shaped gates are associated with an optimized technology to enable high-efficiency 2-D electron gas control while mitigating the parasitic resistances. Good results ogate-length HEMTf FMAX = 206 GHz and FT = 100 GHz are obtained for a 90-nm gate-length HEMT with 0.25-μm source-to-gate spacing. The associated peak extrinsic transconductance value is as high as 440 mS·mm-1. To the authors' knowledge, the obtained FMAX and Gmext are the highest reported values for GaN HEMTs technology on silicon substrate. The accuracy of the cutoff frequency values is checked by small-signal modeling based on extracted S-parameters.

A Stretchable RF Antenna With Silver Nanowires

Abstract: A stretchable, flexible antenna fabricated with silver nanowires (AgNW) and polydimethylsiloxane (PDMS) is presented. Highly conductive AgNWs coupled with mechanically flexibility and durable PDMS are shown to produce promising results for RF sensing. The RF antenna is designed as a 1.5-GHz microstrip patch antenna using the transmission-line model. The resonance frequency of the antenna shifts in response to the applied force/strain, making the configuration suitable for wireless sensing applications.

Dielectric-Modulated Impact-Ionization MOS Transistor as a Label-Free Biosensor

Abstract: In this letter, we propose a dielectric-modulated impact-ionization MOS (DIMOS) transistor-based sensor for application in label-free detection of biomolecules. Numerous reports exist on the experimental demonstration of nanogap-embedded field effect transistor-based biosensors, but an impact-ionization MOS (I-MOS)-based biosensor has not been reported previously. The concept of a dielectric-modulated I-MOS-based biosensor is presented in this letter based on technology computer-aided design simulation study. The results show a high sensitivity to the presence of biomolecules even at small channel lengths. In addition, a low variability of the sensitivity to the charges on the biomolecule is observed. The high sensitivity, dominance of dielectric-modulation effects, and operation at even small channel lengths make the DIMOS biosensor a promising alternative for CMOS-based sensor applications.

High-Voltage (600-V) Low-Leakage Low-Current-Collapse AlGaN/GaN HEMTs with AlN/SiN x Passivation

Abstract: An effective passivation technique that yields low off-state leakage and low current collapse simultaneously in high-voltage (600-V) AlGaN/GaN high-electron-mobility transistors (HEMTs) is reported in this letter. The passivation structure consists of an AlN/SiNx stack with 4-nm AlN deposited by plasma-enhanced atomic layer deposition and 50-nm SiNx deposited by PECVD. The AlN/ SiNx-passivated HEMTs with a gate-drain distance of 15 μm exhibit a high maximum drain current of 900 mA/mm, a low off-state current of 0.7 μA/mm at VDS = 600 V, and a steep subthreshold slope of 63 mV/dec. Compared with the static on-resistance of 1.3 mΩ·cm2, the dynamic on-resistance after high off-state drain bias stress at 650 V only increases to 2.1 mΩ·cm2. A high breakdown voltage of 632 V is achieved at a drain leakage current of 1 μA/mm .

Enhanced Inversion Mobility on 4H-SiC $(\hbox{11}\overline{\hbox{2}} \hbox{0})$ Using Phosphorus and Nitrogen Interface Passivation

Abstract: Low interface trap density and high channel mobility on nonpolar faces of 4H-SiC, such as the (11[2]0) a-face, are of fundamental importance in the understanding of SiC MOS devices. It is also critical for high-voltage trench power MOSFET development. We report new results on the passivation of the SiO2/a-face 4H-SiC interface using phosphorus, yielding field effect mobility of ~125 cm2/V · s. We also revisit the conventional NO passivation, for which a mobility of ~85 cm2/V · s was achieved on the a-face. These results not only establish new levels of mobility in SiC MOSFETS but also lead to further insights into factors currently limiting SiC inversion layer mobility.

Cycle-to-Cycle Intrinsic RESET Statistics in ${\rm HfO}_{2}$ -Based Unipolar RRAM Devices

Abstract: The statistics of the RESET voltage $(V_{\rm RESET})$ and the RESET current $(I_{\rm RESET})$ of ${\rm Pt}/{\rm HfO}_{2}/{\rm Pt}$ resistive random access memory (RRAM) devices operated under unipolar mode are analyzed. The experimental results show that both the distributions of $I_{\rm RESET}$ and $V_{\rm RESET}$ are strongly influenced by the distribution of initial resistance in the ON state $(R_{\rm ON})$ , which is related to the size of the conductive filament (CF) before RESET. By screening the statistical data into different resistance ranges, both the distributions of $I_{\rm RESET}$ and $V_{\rm RESET}$ are shown to be compatible with a Weibull model. Contrary to previous reports for NiO-based RRAM, the Weibull slopes of the $I_{\rm RESET}$ and $V_{\rm RESET}$ are demonstrated to be independent of $R_{\rm ON}$ . This is an indication that the RESET point, defined in this letter as the point of maximum current, corresponds to the initial phase of CF dissolution. On the other hand, given that the scale factor of the $V_{\rm RESET}$ distribution $(V_{\rm RESET63\%})$ is roughly independent of $R_{\rm ON}$ , the scale factor of the $I_{\rm RESET}$ $(I_{\rm RESET63\%})$ is inversely proportional to $R_{\rm ON}$ . This is analogous to what was found in NiO-based RRAM and it is consistent with the thermal dissolution model of RESET. Our results highlight the intrinsic link between the SET and RESET statistics and the need for controlling the variation of ON-state resistance to reduce the variability of the RESET voltage and current.

Impact of Channel Hot Electrons on Current Collapse in AlGaN/GaN HEMTs

Abstract: This letter studies the current collapse phenomenon during switching in p-GaN gate AlGaN/GaN high-electron-mobility transistors. It is found that channel hot electrons play a major role in increasing the current collapse and that adding a field plate significantly reduces the effect. By stressing the device with OFF-state pulses of 100 μs× 10 μs with a VGS rise/fall time of 10 ns at Vdc 400 V, compared to the ON-resistance before stress, the ON-resistance was 78 times larger after stress without field plates. With a field plate, it was only 1.8 times larger.

Gate-recessed integrated E/D GaN HEMT technology with f T /f max >300 GHz

Abstract: We report 1000-transistor-level monolithic circuit integration of sub-30-nm gate-recessed E/D GaN high-electron-mobility transistors with fT and fmax above 300 GHz. Simultaneous fT/fmax of 348/340 and 302/301 GHz for E- and D-mode devices, respectively, was measured, representing a 58% increase in fT compared with our previous report, due to improved management of RC parasitic delay. Three-terminal E- and D-mode breakdown voltage of 10.7 and 11.8 V, respectively, is limited by gate-drain breakdown.

Electrical and Thermal Properties of Carbon-Nanotube Composite for Flexible Electric Heating-Unit Applications

Abstract: Highly conducting carbon nanotubes (CNTs)/polydimethylsiloxane (PDMS) composite with a low concentration (5.7 vol.%) has been shown to be applicable in a highly controllable electric heating element. Due to a high shear-processing technique for mixing CNTs into an uncured PDMS matrix, the CNT/PDMS composites have a fairly uniform dispersion and no agglomeration of CNTs. The percolation threshold of the prepared CNT/PDMS composite is achieved ${\sim}{\rm 0.03}~{\rm vol.\%}$ , which is one of the lowest values previously reported in the literature. The fabricated CNT/PDMS composites can be quickly heated from room temperature to 200 $^{\circ}{\rm C}$ within 30 s by applying a DC voltage of 12 V. In addition, the CNT/PDMS composite show good thermal stability and repeatability during a long-term heating test. Our proposed CNT/PDMS composites could be used as a basis for light-weight and flexible heating-unit applications.

Compensating Pixel Circuit Driving AMOLED Display With a-IGZO TFTs

Abstract: This letter presents a novel active-matrix organic light-emitting diode (AMOLED) pixel circuit that uses amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a bottom-gate structure to compensate for the threshold voltage shift of the TFT. An a-IGZO TFT driven AMOLED display (70 × 70 pixels) on a glass substrate is fabricated and its reliability is evaluated under electrical stress.