IEEE Journal on Emerging and Selected Topics in Circuits and Systems 

About: IEEE Journal on Emerging and Selected Topics in Circuits and Systems is an academic journal published by Institute of Electrical and Electronics Engineers. The journal publishes majorly in the area(s): Computer science & Engineering. It has an ISSN identifier of 2156-3357. Over the lifetime, 765 publications have been published receiving 20699 citations. The journal is also known as: Emerging and selected topics in circuits and systems & JETCAS.

Design of a WSN Platform for Long-Term Environmental Monitoring for IoT Applications

Abstract: The Internet of Things (IoT) provides a virtual view, via the Internet Protocol, to a huge variety of real life objects, ranging from a car, to a teacup, to a building, to trees in a forest. Its appeal is the ubiquitous generalized access to the status and location of any “thing” we may be interested in. Wireless sensor networks (WSN) are well suited for long-term environmental data acquisition for IoT representation. This paper presents the functional design and implementation of a complete WSN platform that can be used for a range of long-term environmental monitoring IoT applications. The application requirements for low cost, high number of sensors, fast deployment, long lifetime, low maintenance, and high quality of service are considered in the specification and design of the platform and of all its components. Low-effort platform reuse is also considered starting from the specifications and at all design levels for a wide array of related monitoring applications.

Eyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile Devices

Abstract: A recent trend in deep neural network (DNN) development is to extend the reach of deep learning applications to platforms that are more resource and energy-constrained, e.g., mobile devices. These endeavors aim to reduce the DNN model size and improve the hardware processing efficiency and have resulted in DNNs that are much more compact in their structures and/or have high data sparsity . These compact or sparse models are different from the traditional large ones in that there is much more variation in their layer shapes and sizes and often require specialized hardware to exploit sparsity for performance improvement. Therefore, many DNN accelerators designed for large DNNs do not perform well on these models. In this paper, we present Eyeriss v2, a DNN accelerator architecture designed for running compact and sparse DNNs. To deal with the widely varying layer shapes and sizes, it introduces a highly flexible on-chip network, called hierarchical mesh, that can adapt to the different amounts of data reuse and bandwidth requirements of different data types, which improves the utilization of the computation resources. Furthermore, Eyeriss v2 can process sparse data directly in the compressed domain for both weights and activations and therefore is able to improve both processing speed and energy efficiency with sparse models. Overall, with sparse MobileNet, Eyeriss v2 in a 65-nm CMOS process achieves a throughput of 1470.6 inferences/s and 2560.3 inferences/J at a batch size of 1, which is $12.6\times $ faster and $2.5\times $ more energy-efficient than the original Eyeriss running MobileNet.

Emerging MPEG Standards for Point Cloud Compression

Abstract: Due to the increased popularity of augmented and virtual reality experiences, the interest in capturing the real world in multiple dimensions and in presenting it to users in an immersible fashion has never been higher. Distributing such representations enables users to freely navigate in multi-sensory 3D media experiences. Unfortunately, such representations require a large amount of data, not feasible for transmission on today’s networks. Efficient compression technologies well adopted in the content chain are in high demand and are key components to democratize augmented and virtual reality applications. Moving Picture Experts Group, as one of the main standardization groups dealing with multimedia, identified the trend and started recently the process of building an open standard for compactly representing 3D point clouds, which are the 3D equivalent of the very well-known 2D pixels. This paper introduces the main developments and technical aspects of this ongoing standardization effort.

Design Optimization and Implementation for RF Energy Harvesting Circuits

Abstract: A new design for an energy harvesting device is proposed in this paper, which enables scavenging energy from radiofrequency (RF) electromagnetic waves. Compared to common alternative energy sources like solar and wind, RF harvesting has the least energy density. The existing state-of-the-art solutions are effective only over narrow frequency ranges, are limited in efficiency response, and require higher levels of input power. This paper has a twofold contribution. First, we propose a dual-stage energy harvesting circuit composed of a seven-stage and ten-stage design, the former being more receptive in the low input power regions, while the latter is more suitable for higher power range. Each stage here is a modified voltage multiplier, arranged in series and our design provides guidelines on component choice and precise selection of the crossover operational point for these two stages between the high (20 dBm) and low power (-20 dBm) extremities. Second, we fabricate our design on a printed circuit board to demonstrate how such a circuit can run a commercial Mica2 sensor mote, with accompanying simulations on both ideal and non-ideal conditions for identifying the upper bound on achievable efficiency. With a simple yet optimal dual-stage design, experiments and characterization plots reveal approximately 100% improvement over other existing designs in the power range of -20 to 7 dBm.

Recent Progress in Phase-Change Memory Technology

Abstract: We survey progress in the PCM field over the past five years, ranging from large-scale PCM demonstrations to materials improvements for high–temperature retention and faster switching. Both materials and new cell designs that support lower-power switching are discussed, as well as higher reliability for long cycling endurance. Two paths towards higher density are discussed: through 3D integration by the combination of PCM and 3D-capable access devices, and through multiple bits per cell, by understanding and managing resistance drift caused by structural relaxation of the amorphous phase. We also briefly survey work in the nascent field of brain-inspired neuromorphic systems that use PCM to implement non-Von Neumann computing.