Showing papers in "IEEE Transactions on Circuits and Systems in 1977"

Idealized operation of the class E tuned power amplifier

Abstract: The class E tuned power amplifier consists of a load network and a single transistor that is operated as a switch at the carrier frequency of the output signal. The most simple type of load network consists of a capacitor shunting the transistor and a series-tuned output circuit, which may have a residual reactance. Circuit operation is determined by the transistor when it is on, and by the transient response of the load network when the transistor is off. The basic equations governing amplifier operation are derived using Fourier series techniques and a high- Q assumption. These equations are then used to determine component values for optimum operation at an efficiency of 100 percent. Other combinations of component values and duty cycles which result in 100-percent efficiency are also determined. The harmonic structure of the collector voltage waveform is analyzed and related amplifier configurations are discussed. While this analysis is directed toward the design of high-efficiency power amplifiers, it also provides insight into the operation of modern solid-state VHF-UHF tuned power amplifiers.

Generalized sampling expansion

Abstract: It is shown that a band-limited function f(t) is uniquely determined in terms of the samples g_k(nT) of the responses g_k(t) of m linear systems with input f(t) , sampled at 1/m the Nyquist rate. Various known extensions of the sampling theorem follow as special cases of the resulting generalized sampling expansion of f(t) .

The use of residue number systems in the design of finite impulse response digital filters

Abstract: A technique is presented for implementing a finite impulse response (FIR) digital filter in a residue number system (RNS). For many years residue number coding has been recognized as a system which provides a capability for the implementation of high speed multiplication and addition. The advantages of residue coding for the design of high speed FIR filters result from the fact that an FIR requires only the high speed residue operations, i.e., addition and multiplication, while not requiring the slower RNS operations of division or sign detection. A new hardware implementation of the Chinese Remainder Theorem is proposed for an efficient translation of residue coded outputs into natural numbers. A numerical example illustrates the principles of residue encoding, residue arithmetic, and residue decoding for FIR filters. An RNS implementation of a 64th-order dual bandpass filter is compared with several alternative filter structures to illustrate tradeoffs between speed and hardware complexity.

A new approach to gain-bandwidth problems

Abstract: A new idea for treating the broad-band matching of an arbitrary load to a resistive generator leads to a simple technique for the design of a lossless 2-port equalizer. The method is a numerical one, and only utilizes real frequency (e.g., experimental) load impedance data. No model or analytic impedance function for the load is necessary. Nor is the equalizer topology or analytic form of the system transfer function assumed. The arithmetic is well conditioned and the intricacies of gainbandwidth theory are bypassed. An example comparing the method with analytic gain-bandwidth theory is given. Two examples proceeding directly from experimental data are presented. One is the broad banding of a microwave avalanche diode reflection amplifier. The other is the gainbandwidth equalization of a microwave FET amplifier for gain taper and impedance mismatch.

Some stability properties of two-dimensional linear shift-invariant digital filters

Abstract: This paper presents a detailed discussion of stability of twodimensional linear digital filters, and the subtle differences between the one-dimensional and two-dimensional cases. In particular, it is shown that the fact that the impulse response trails off to zero, or more stringently is square summable does not guarantee BIBO (bounded-input-bounded-output) stability. Necessary conditions for the impulse response to be bounded and sufficient conditions for it to be square summable and to approach zero geometrically along any fixed column (or row) are stated.

The simplicial approximation approach to design centering

Abstract: The basis of a method for designing circuits in the face of parameter uncertainties is described. This method is computationally cheaper than those methods which employ Monte Carlo analysis and nonlinear programming techniques, gives more useful information, and more directly addresses the central problem of design centering. The method, called simplicial approximation, locates and approximates the boundary of the feasible region of an n -dimensional design space with a polyhedron of bounding ( n - 1 )-simplices. The design centering problem is solved by determining the location of the center of the maximal hyperellipsoid inscribed within this polyhedron. The axis lengths of this ellipsoid can be used to solve the tolerance assignment problem. In addition, this approximation can be used to estimate the yield by performing an inexpensive Monte Carlo analysis in the parameter space without any need for the usual multitude of circuit simulations.

An efficient heuristic cluster algorithm for tearing large-scale networks

Abstract: An efficient heuristic algorithm for solving a cluster problem associated with the tearing of an undirected graph is presented via the concept of a contour tableau. The required computation time is shown to be bounded by \theta (nb) , where n and b are the number of nodes and branches of the input graph, respectively. Experimental results show that our algorithm is highly efficient and yields near optimal solutions.

Analysis of periodically switched linear circuits

Abstract: A new approach, to the exact analysis of linear circuits containing periodically operated switches is presented. After reformulation of the state equations conventional Fourier analysis is used to determine the response to arbitrary deterministic or stochastic inputs. The analysis is applicable also to improper circuits and circuits causing discontinuities in the state variables at the switching instants. The switches may operate in an arbitrary fashion with a common switching period. Explicit closed form solutions for both the (Fourier coefficients of the) periodically time-varying transfer function \hat{H}(f, t) and the impulse response h(t,\tau) are derived. These results are most suitable for computer aided design. Applications to switched filters and modulators are given.

Topological generation and analysis of voltage multiplier circuits

Abstract: Voltage multipliers are used for transformerless conversion of an ac input voltage \upsilon_i(t)= E \sin \omega t into a dc output voltage V_{out} = nE , where n \geq 2 . This paper investigates the topological properties of voltage multiplier circuits and presents a unified approach for generating new voltage-multiplier circuit structures. In particular, an algorithm is presented for generating n -fold voltage multipliers with n capacitors and n diodes. A theorem is presented for finding the dc capacitor voltages by inspection when no load current is drawn. For the case with load, explicit formulas for the output de voltage and the output resistance are given. Using the algorithm developed in this paper, three new voltage quadrupler circuits are generated and shown to have an output resistance only one-half of the conventional ladder quadrupler circuit.

Minimum norm recursive digital filters that are free of overflow limit cycles

Abstract: In recursive digital filters, the norm of the system matrix is an important design parameter with respect to overflow behavior. Filter realizations that minimize this norm are shown to be free of autonomous overflow limit cycles. Overflow-stable filters of any order, without any constraints on pole locations within the unit circle, can be realized by parallel-cascade structures of minimum norm systems. Minimum norm realizations require the minimum number of delay elements but, in general, more than the minimum number of multiplications and additions.

Tests of stability of multidimensional filters

Abstract: Novel stability criteria are established, for multidimensional digital and analog filters with rational transfer functions. The criteria generalize and simplify the stability test for two-dimensional digital filters developed by Huang [4], and significantly simplify the corresponding tests of stability of arbitrary multidimensional filters established by Anderson and Jury [6].

Solving nonlinear resistive networks using piecewise-linear analysis and simplicial subdivision

Abstract: In recent years numerous results of piecewise-linear analysis of nonlinear resistive networks have been derived. The applicability of the method relies on the fact that every nonlinear device is modeled by a piecewise-linear continuous function. In order to extend the applicability of piecewise-linear analysis to treat more general nonlinear networks, three steps need to be carried out: i) the subdivision of the domain of the multi-dimensional nonlinear network function; ii) the interpolation of a piecewise-linear continuous function on the subdivided domain; and iii) the application of piecewise-linear analysis. It turns out that the above three steps can be accomplished effectively by using simplicial subdivision. In addition, the difficulties encountered in the conventional piecewise-linear analysis are simplified. The memory space needed for the analysis is also greatly reduced. The complete analysis has been implemented in a program on CDC 6400.

A 2-D FIR filter structure derived from the Chebyshev recursion

Abstract: A new structure is proposed for the implementation of 2-D FIR digital filters designed by transformations of 1-D filters. This structure requires a minimum number of multiplications and uses directly as coefficients the impulse response samples of the 1-D prototype filter. The roundoff noise of the new structure is analyzed in detail and is shown to be superior to that of previous implementations for all examples studied.

Digital filter structures described by distributed arithmetic

Abstract: This paper presents a new formulation of digital filters that combines the description of signal-processing and arithmetic operations. This is done by noting that multiplication is a form of convolution and therefore normal one-dimensional scalar convolution is in fact two-dimensional binary convolution. This is generalized to multidimensions and can be applied with table-look-up and transform techniques. The result is a unified description that describes a digital filter structure down to the bit level.

Circuit theoretic analysis and synthesis of marked graphs

Abstract: Marked graphs are a graph model for representing and studying parallel computations and concurrent processes. This paper provides circuit theoretic concepts and methods for the analysis and synthesis of marked graphs. Among the results obtained, the reachability theorem developed in this paper is a generalization of known results in the sense that it does not require two hypotheses: the liveness of an initial marking and the strongly connectedness of marked graphs. A synthesis problem of marked graphs from prescribed markings is proposed, and is shown to be that of realizing cutset matrices as directed graphs.

Compartmental system analysis: Realization of a class of linear systems with physical constraints

Abstract: This paper considers the compartmental system analysis from the system theoretic point of view. The specific problem treated here is that of realization of rational transfer function in the form \dot{x} (t) = Ax(t)+ bu(t), y(t)= c' x(t) . This problem, however, differs from the usual one in that physical consideration of the compartmental system naturally leads to a set of constraints on the realization. Specifically the matrix A is required to satisfy a preassigned sign pattern as well as a diagonal-dominant condition. Realizability conditions and the characterization of minimal realization are discussed in detail. Counter examples are constructed to show that the minimal dimension does not coincide with the McMillan degree of the transfer function. Necessary and sufficient conditions for realizability are obtained when i) the degree of the transfer function is equal to or less than three or ii) the graphical structure of the compartment system is of noncyclic tree type.

Symbolic analysis of analog and digital circuits

Abstract: An efficient computer method for symbolic analysis of linear analog and digital circuits is described. The tableau formulation is used in the derivations but the mixed nodal tableau method is used in actual computations of analog circuits. One triangular factorization of the system matrix, followed by m + 1 forward and back substitutions, is sufficient to generate all partial derivatives of the numerator and denominator of the immitance function in terms of m variable elements. In the case of frequency dependent elements, the fast Fourier transform algorithm is used to obtain the polynomial coefficients. The computational cost is discussed and compared with that of other well-known symbolic analysis algorithms. Difficult programming sections are given. Little software is needed beyond that if a program for frequency analysis is available.

Explicit formulas for the synthesis of optimum broad-band impedance-matching networks II

Abstract: The paper shows that the most practical RLC load can be optimally matched to a resistive generator over a finite frequency band to achieve the Butterworth or Chebyshev transducer power-gain characteristic of arbitrary order, justifying and extending the procedure given in the literature. Explicit formulas for the optimum design of these matching networks are presented, thus avoiding the necessity of using the design curves and solving the nonlinear equations for selecting the optimum design parameters. The significance of these formulas is that they reduce the design problem to simple arithmetic. Illustrative examples are provided to demonstrate the usage of the formulas.

On another approach to the Schur-Cohn criterion

Abstract: Some well-known properties of polynomials orthogonal on the unit circle are used to provide a simple proof of the Schur-Cohn stability criterion. Some complements are also briefly noted.

L_2 -stability of interconnected systems using a reformulation of the passivity theorem

Abstract: In this paper, we give a reformulation of the well-known passivity theorem for single-loop systems, which removes the asymmetry between the conditions on the forward and feedback subsystems. This reformulation leads to stability as well as instability criteria for interconnected systems, and these are shown to contain known results as special cases.

Design of two-dimensional recursive filters by interpolation

Abstract: A technique for rotating the frequency responses of separable filters is developed. In this technique transfer functions having rational powers of z are introduced and realized by input/output signal array interpolations. Several applications of this technique to designing two-dimensional recursive filters are presented. Two- and multidimensional manipulations are performed by a series of one-dimensional manipulations.

On parasitic oscillations in digital filters under looped conditions

Abstract: If a filter is used in multiplex telephone equipment, it actually operates in a loop due to the presence of two-wire/four-wire terminating equipment. Due to this, the power fed back into the filter input can, under adverse conditions, nearly equal the power leaving the output. This can be a cause for parasitic oscillations in case of digital filters. If properly designed, however, wave digital filters and nonrecursive digital filters remain stable.

On the stability of the phase-lead integrator

Abstract: The oscillations frequently encountered in the application of the noninverting phase-lead integrators are shown to be due to the second (parasitic) op-amp pole. A method is given for stabilizing this integrator circuit while keeping the integrator Q -factor unchanged.

Suboptimum solution of the back-board ordering with channel capacity constraint

Abstract: The problem dealt with in this paper is the optimum ordering of boards on a linear backplane, which minimizes the maximum number of interboard connections in a large system. First, an approximation algorithm is proposed, which produces a feasible solution whose cost, i.e. the maximum number of interboard connections, is not more than ( 1 + \epsilon ) times the cost of an optimum solution. The algorithm is essentially a branchand-bound method based on Dijkstra algorithm or the uniform cost method, saving computation time and memory space. Second, a quick and straight-forward algorithm is proposed which finds some locally optimum solution very fast and provides a useful information preceding the approximation algorithm. Several experimental results are shown to evaluate the efficiency of the algorithms.

The interactive-graphic man-computer dialogue in computer-aided circuit design

Abstract: The crucial role played by the man-computer dialogue in computer-aided circuit design, and particularly within an interactive graphic medium, is demonstrated by reference to a working circuit design facility implemented on a minicomputer. The detailed nature of this facility and the techniques illustrated are related to the circuit design process and the behavioral characteristics of the human designer. Special attention is given to the command dialogue, and to the introduction of flexibility allowing a user to modify the facility to suit his own needs.

Geodetic connectivity of graphs

Abstract: A graph G is said to be n -geodetically connected if and only if G is connected and the removal of at least n points is required to increase the distance between any pair of points. "Geodetic" analogs of results such as Menger's theorem and Dirac's "fan" theorem are shown to hold. Some other characterizations of n -geodetically connected graphs are obtained, one of which shows geodetic connectivity to be a local property in contrast to the usual connectivity.

Transfer function synthesis using generalized doubly terminated two-pair networks

Abstract: In Part I of this paper, a procedure for the synthesis of doubly terminated two-pair networks is developed. This procedure, coupled with certain properties of mirror and anti-mirror image polynomials, permits the design of digital filters with extremely low sensitivity of the steady-state magnitude of the transfer function to multiplier coefficient errors. In Part II, the ladder structure is examined as one possible internal structure for the two-pair specified in Part I. The synthesis procedure of Part I, combined with a special case of the ladder decomposition of Part II, leads to a previously proposed structure, the lossless digital integrator ladder, for which no direct design method was formerly available.

Limit cycles in a two-dimensional first-order digital filter

Abstract: Limit cycles in a two-dimensional first-order digital filter are analyzed. Sufficient conditions for the nonexistence and sufficient and necessary conditions for the existence of limit cycles in the filter are derived. The limit cycles are of the two-dimensional degenerate type. Periods and an upper bound on the magnitudes of the limit cycles are also presented.

Optimum design of active filters using the generalized immittance converter

Abstract: Design equations are derived for the generalized immittance converter (GIC) when embedded in an arbitrary network. The derivation is based on minimizing the dependence of the GIC transfer function on the op amps' characteristics. Equations for the optimum design of the GIC when simulating inductance and frequency-dependent negative-resistance (FDNR) elements follow as special cases. The optimized GIC's are applied in the design of bandpass filters using Gorski-Popiel's ladder embedding technique. The design procedure is presented in detail and its application is illustrated through the design of a telephone-channel bandpass filter of the twelfth order.

Topological criteria for establishing the uniqueness of solutions to the dc equations of transistor networks

Abstract: A theory is formulated which shows how transistor networks can, for the purpose of analysis, be broken apart into smaller subnetworks, which can then be analyzed individually. It is shown how one can then deduce that the original circuit possesses a unique solution to its dc equations, as a consequence of the uniqueness of the solutions to the dc equations of the subnetworks. It is shown, moreover, that the amount of effort required for the analysis of the original circuit is thereby reduced, in many cases by enormous proportions. Furthermore, it is shown how the theory can be used to identify circuits whose topological structure is such as to require that the circuit's dc equations possess a unique solution. For such circuits, therefore, the required analysis becomes nothing more than a trivial inspection of the circuit's topology; that is, no computation is required.