Showing papers in "IEEE Transactions on Circuits and Systems in 1979"
TL;DR: In this article, an upper bound on expected average interconnection length, based on partitioning results, is given for linear and square arrays of gates, which gives significantly lower interconnection lengths than the bound based upon random placement.
Abstract: The length of the interconnections for a placement of logic gates is an important variable in the estimation of wiring space requirements, delay values, and power dissipation. A formula for an upper bound on expected average interconnection length, based on partitioning results, is given for linear and square arrays of gates. This upper bound gives significantly lower interconnection length than the bound based upon random placement. Actual placements give average interconnection lengths of about half the upper bound given by theory.
416 citations
TL;DR: The testability of a digital circuit is directly related to the difficulty of controlling and observing the logical values of internal nodes from circuit inputs and outputs, respectively as mentioned in this paper, and the testability is also related to how well the internal nodes can be controlled and observed.
Abstract: The testability of a digital circuit is directly related to the difficulty of controlling and observing the logical values of internal nodes from circuit inputs and outputs, respectively. This paper presents a method for analyzing digital circuits in terms of six functions which characterize combinational and sequential controllability and observability.
359 citations
TL;DR: In this article, the authors present a new mathematical formulation of the concept of force directed placement, and describe an efficient computational procedure for solving the resulting system of equations, which is broken down into two phases, Phase I being the relative location phase and Phase II being the slot assignment or component overlap resolution phase.
Abstract: This paper deals with the problem of placing components on a carrier, such as a printed circuit board (PCB). We present a new mathematical formulation of the concept of force directed placement, and describe an efficient computational procedure for solving the resulting system of equations. The placement procedure is broken down into two phases, Phase I being the "relative location phase," and Phase II being the "slot assignment or component overlap resolution phase." In Phase I of the procedure, we solve a set of simultaneous equations, based upon the interconnection topology of the system of components, in an endeavor to determine the optimum relative location of every component with respect to every other component. The equations are set up such that there are attractive forces between components sharing a common signal, and repulsive forces between components having no signals in common. The results of Phase I are often unacceptable from a physical standpoint because there is a great deal of overlap among the components. Phase II eliminates component overlap by either of two methods, depending upon the physical properties of the carrier. If the carrier is subdivided into slots, then the components are assigned to these slots using a criteria which minimiZes the total distance that all components need be moved. We perform this assignment by using the linear assignment algorithm. If the carrier is such that components are allowed to reside anywhere, then a different technique to resolve component overlap is used. A parametric analysis of the procedure is given based upon 12 different PCB's. These results show comparisons of this method to the work of others, and provide some insight into the method's absolute merits.
289 citations
TL;DR: In this article, a graphical interpretation of the Hopf bifurcation theorem for nonlinear multiple-loop feedback systems is presented, which is reminiscent of the generalized Nyquist criterion for linear systems.
Abstract: One of the most powerful methods for studying periodic solutions In autonomous nonlinear systems is the theory which has developed from a proof by Hopf. He showed that oscillations near an equilibrium point can be understood by looking at the eigenvalues of the linearized equations for perturbations from equilibrium, and at certain crucial derivatives of the equations. A good deal of work has been done recently on this theory and the present paper summarizes recent results, presents some new ones, and shows how they can be used to study almost sinusoidal oscillations in nonlinear circuits and systems. The new results are a proof of the basic part of the Hopf theorem using only elementary methods, and a graphical interpretation of the theorem for nonlinear multiple-loop feedback systems. The graphical criterion checks the Hopf conditions for the existence of stable or unstable periodic oscillations. Since it is reminiscent of the generalized Nyquist criterion for linear systems, our graphical procedure can be interpreted as the frequencydomain version of the Hopf bifurcation theorem.
269 citations
TL;DR: In this paper, a constructive algorithm for determining the stability of a convex set of matrices is presented, which can be used to determine whether the set is maximally stable or not.
Abstract: A set A of n \times n complex matrices is stable if for every neighborhood of the origin U \subset C^{n} , there exists another neighborhood of the origin V , such that for each M \in A' (the set of finite products of matrices in A), MV\subset U . Matrix and Liapunov stability are related. Theorem: A set of matrices A is stable if and only if there exists a norm, |\cdot | , such that for all M \in A , and all z \in C^{n} , |Mz| . The norm is a Liapunov function for the set A . It need not be smooth; using smooth norms to prove stability can be inadequate. A novel central result is a constructive algorithm which can determine the stability of A based on the following. Theorem: A,={M0,Mj,. .,Mmi) is a set of m distinct complex matrices. Let Wo be a bounded neighborhood of the origin. Define for k > 0 , Wk =convexhbull ~ Mk'Wk - I where k'=(k- 1) mod m . Then A isstableifand only if V-U Q,_ is bounded. W* is the norm of the first theorem. The constructive algorithm represents a convex set by its extreme points and uses linear programming to construct the successive W_k . Sufficient conditions for the finiteness of constructing W_k from W_{k-1} , and for stopping the algorithm when either the set is proved stable or unstable are presented. A is generalized to be any convex set of matrices. A dynamical system of differential equations is stable if a corresponding set of matrices --associated with the logarithmic norms of the matrices of the linearized equations--is stable. The concept of the stability of a set of matrices is related to the existence of a matrix norm. Such a norm is an induced matrix norm if and only if the set of matrices is maximally stable (ie., it cannot be enlarged and remain stable).
225 citations
TL;DR: In this paper, it is shown that for n = 1 and 2, certain decomposition techniques which have proven to be basic for n − 1 and n − 2 are not applicable for n -geqslant 3.
Abstract: This paper makes three observations with regard to several issues of a fundamental nature that apparently must arise in any general theory of linear n-dimensional systems. It is shown, by means of three specific interrelated counterexamples, that certain decomposition techniques which have proven to be basic for n = 1 and 2 are no longer applicable for n \geqslant 3 . In fact, for n \geqslant 3 , at least three equally meaningful but inequivalent notions of polynomial coprimeness emerge, namely, zerocoprimeness (ZC), minor-coprimeness (MC), and factor-coprimeness (FC). Theorems I and 3 clarify the differences (and similarities) between these concepts, and Theorem 2 gives the ZC and MC properties a useful system formulation. (Unfortunately, FC, which in our opinion is destined to play a major role, has thus far eluded the same kind of characterization.) Theorem 4 reveals that the structure of 2-variable elementary polynomial matrices is completely captured by the ZC concept. However, there is reason to believe that ZC is insufficient for n \geqslant 3 but a counterexample is not at hand. The matter is therefore unresolved.
210 citations
TL;DR: In this article, a minimax quasi-Newton method based on an algorithm of Powell for nonlinear constrained optimization is presented for the zero tolerance, fixed tolerance, and variable tolerance problems of optimal circuit design.
Abstract: A new algorithm for the zero tolerance, fixed tolerance, and variable tolerance problems of optimal circuit design is presented. It is a minimax quasi-Newton method based on an algorithm of Powell for nonlinear constrained optimization. The new algorithm employs a new exact penalty function and a new efficient semidefinite quadratic program to determine the quasi-Newton step. In addition we use for the tolerance problems a method called function splitting to regularize the minimax problem. The algorithm is very efficient and examples are given which exhibit its super-linear convergence on regular and nonregular problems from the literature and on a practical worst-case circuit design problem.
191 citations
TL;DR: In this article, the authors present a selective review of planar guided-wave acoustooptics, including some of the most recent results, focusing on those aspects which relate to wide-band multichannel optical communications and real-time signal processing.
Abstract: This paper presents a selective review of planar guided-wave acoustooptics, including some of the most recent results. The emphasis is on those aspects which relate to wide-band multichannel optical communications and real-time signal processing. First to be discussed are the analytical and numerical techniques required for the treatment of a Bragg modulator which uses a single aperture SAW transducer. The frequency responses generated for Y -cut LiNbO_3 waveguides using a digital computer serve as the basic data for the design of such a basic modulator. Next the key device parameters relevant to modulation and signal processing are discussed. The design parameters and procedures for wide-band Bragg modulators and deflectors are then established. Finally, some potential applications of such wide-band modulators and deflectors in optical communications and RF signal processing together with the best measured performance figures are described.
162 citations
TL;DR: In this paper, sufficient conditions are derived for a second-order statespace digital filter with L 2 scaling to be optimal with respect to output roundoff noise; and from these, a simple synthesis procedure is developed.
Abstract: Sufficient conditions are derived for a second-order statespace digital filter with L_2 scaling to be optimal with respect to output roundoff noise; and from these, a simple synthesis procedure is developed. Parallel-form designs produced by this method are equivalent to the block-optimal designs of Mullis and Roberts. The corresponding cascadeform designs are not equivalent, but they are shown, by example, to be quite close in performance. It is also shown that the coefficient sensitivities of this structure are closely related to its noise performance. Hence, the optimal design has low-coefficient sensitivity properties, and any other low-sensitivity design is a good candidate for near-optimal noise performance. The uniform-grid structure of Rader and Gold is an interesting and useful case in point.
158 citations
TL;DR: In this article, the authors examined actual field failure statistics and identified which of these field failures could realistically have been predetermined and modeled by the dc approach, and made an estimate of the percent of actual field failures that can be detected and isolated by the DC approach.
Abstract: Efficient solution of dc node voltages for nonlinear analog electronic circuits has been demonstrated by computer-aided circuit analysis programs such as SYSCAP II [1] (System of Circuit Analysis programs) for the nominal case and for inserted faults. In addition dc node voltage postprocessing techniques [2] have been developed to determine required input stimuli and the minimum number of test points that will achieve detection of predetermined faults to a prescribed level, and isolation to a prescribed number of devices [3]. Thewe techniques offer a systematic approach for pretest generation of analog fault dictionaries. The effectiveness of this approach depends upon inclusion of a sufficiently high percentage of potential field failures in the fault dictionary, and upon implementation of the inherent testability design features of the dc approach, i.e, to have specified adequate test stimuli and to have indicated the appropriate nodes/test points for accessibility. In this paper we examine actual field failure statistics and identify which of these field failures could realistically have been predetermined and modeled by the dc approach. Finally an estimate is made of the percent of actual field failures that can be detected and isolated by the dc approach.
152 citations
TL;DR: In this paper, a multilevel Newton algorithm based on macromodels is presented, which has local quadratic convergence provided that suitable conditions on the continuity and nonsingularity of the Jacobian of the network equations are satisfied.
Abstract: Analysis techniques which take advantage of the structural properties of large-scale electrical networks are discussed. Exact macromodels of a subnetwork are defined and a sufficient condition on the subnetwork equations for the existence of a macromodel is given. A multilevel Newton algorithm based on macromodels is presented. The algorithm is shown to have local quadratic convergence provided that suitable conditions on the continuity and nonsingularity of the Jacobian of the network equations are satisfied. The concept of latency for the analysis of large-scale networks in the time domain is discussed. The relationship between latency and numerical integration methods is investigated.
TL;DR: Finite-realizability of these behaviors by state-affine systems is shown to be equivalent both to the existence of high-order input/output equations and to realizability by more general types of systems.
Abstract: A state-space realization theory is presented for a wide class of discrete time input/output behaviors. Although in many ways restricted, this class does include as particular cases those treated in the literature (linear, multilinear, internally bilinear, homogeneous), as well as certain nonanalytic nonlinearities. The theory is conceptually simple, and matrixtheoretic algorithms are straightforward. Finite-realizability of these behaviors by state-affine systems is shown to be equivalent both to the existence of high-order input/output equations and to realizability by more general types of systems.
TL;DR: In this paper, the fault diagnosis problem for a linear system whose transfer function matrix is measured at a discrete set of frequencies is formalized and a measure of solvability for the resultant equations and a testability measure for the unit under test is developed.
Abstract: The fault diagnosis problem for a linear system whose transfer function matrix is measured at a discrete set of frequencies is formalized. A measure of solvability for the resultant equations and a measure of testability for the unit under test is developed. These, in turn, are used as the basis of algorithms for choosing test points and test frequencies.
TL;DR: In this article, a new technique for determining the terminal reliability of probabilistic networks is derived and discussed, which uses set-theoretic concepts to partition the space of all graph realizations in a way which permits extremely fast evaluation of the source-to-terminal probability.
Abstract: A new technique for determining the terminal reliability of probabilistic networks is derived and discussed. The technique uses set-theoretic concepts to partition the space of all graph realizations in a way which permits extremely fast evaluation of the source-to-terminal probability. If not allowed to run to completion, the algorithm yields rapidly converging upper and lower bounds on that probability. Comparison with algorithms in the recent literature shows a decrease of one or two orders of magnitude in required CPU time.
TL;DR: The principles of operation and current status of single-mode optical directional coupler switches, modulators, and filters using \Delta \beta reversal techniques are reviewed in this paper, where the same authors also present a review of the current state of the optical coupler switch design.
Abstract: The principles of operation and current status of single-mode optical directional coupler switches, modulators, and filters using \Delta \beta reversal techniques are reviewed.
TL;DR: In this paper, a review and an assessment of techniques for automatic test generation for analog systems is presented, respectively, proceeding from approaches based on deterministic and probabilistic estimation, taxonomical and topological analyses.
Abstract: The purpose of this paper is both a review and an assessment of techniques presently available for automatic test generation for analog systems. After recalling the general problems of automatic testing (definitions, faults in analog systems, different types of tests, main operations, and diagnosis procedures), characterization and description modes of analog systems, and the main software ingredients of automatic test equipment, a categorization of known techniques along several criteria can be proposed. Then, several techniques, respectively, proceeding from approaches based on deterministic and probabilistic estimation, taxonomical and topological analyses can be detailed. Techniques specific to linear systems (several of them belonging to the above three categories) are dealt with in a separate section. The main features of the techniques that are described are summed up in five synoptic tables. As a conclusion, several research areas that need further investigation in view of a possible industrial implementation of automatic analog test generation techniques are identified. Two appendixes deal briefly with fault tolerance and fault simulation in analog systems. An extensive bibliography ( \sim 500 entries) is provided.
TL;DR: A fast and simple iterative method for the determination of a single real root of a real continuous function based upon linearizing the original function and the regula falsi is applied to this modified function which leads to a very simple algorithm.
Abstract: A fast and simple iterative method is proposed for the determination of a single real root of a real continuous function. The idea is based upon linearizing the original function whereafter the regula falsi is applied to this modified function which leads to a very simple algorithm. The rate of convergence is shown to be quadratic or better.
TL;DR: A general formulation procedure and an exact analysis in the frequency domain for switched capacitor circuits with arbitrary inputs including cisoidal, sample-and-hold, and noise, are presented.
Abstract: In this paper a general formulation procedure and an exact analysis in the frequency domain for switched capacitor circuits with arbitrary inputs including cisoidal, sample-and-hold, and noise, are presented. No topological and duty cycle constraints have been imposed on the circuits. Transfer functions are derived explicitly in terms of circuit matrices. Various special cases of practical interest are discussed in detail. Due to the simple form of the solutions much insight has been gained in understanding the working of switched capacitor circuits. The results are numerically attractive and can be readily programmed for computer-aided design of large size circuits. A simple two-capacitor circuit has been used throughout the text for illustration under various conditions.
TL;DR: New techniques for the efficient simulation of large-scale integrated MOS circults are described and the use of SOR-Newton methods permits all three forms of analysis to be performed simultaneously, while event-control is used to enhance execution speed.
Abstract: New techniques for the efficient simulation of large-scale integrated MOS circults are described. These techniques have been implemented in the computer program SPLICE which combines circuit, timing, and logic analyzes in a single package. The use of SOR-Newton methods permits all three forms of analysis to be performed simultaneously, while event-control is used to enhance execution speed. The performance of SPLICE for the simulation of large NMOs circuits is also described.
TL;DR: In this article, it is shown that SC networks are time-variant sampled-data networks, which can be viewed as tandem connected four-ports in the z-domain.
Abstract: Switched-capacitor (SC) networks comprise capacitors interconnected by an array of periodically operated switches. Such networks are particularly attractive in light of the high circuit density possible with MOS integrated circuit technology and hybrid integrated circuits using thin-film and silicon technology. The paper describes the analysis of SC networks by using nodal charge equations. It is shown that SC networks are time-variant sampled-data networks, which can be viewed as tandem connected four-ports in the z -domain. One pair of ports is viewed as a signal path corresponding to the even time slots, the other pair of ports as a path corresponding to the odd time slots of the periodically operated switches. In a subsequent publication the authors will show how four-port equivalent circuits in the z-domain of six basic building blocks can be used for the description of any SC network. This method allows the direct use of traditional network analysis tools like the transmission matrix for deriving transfer functions. The method ultimately leads to a two-port analysis of SC networks in which conventional two-port theory can be applied.
TL;DR: A graph-theoretic approach to the design of one-dimensional logic gate arrays using MOS or I^{2}L units and it is shown that the number of tracks required for between-gate wiring is equal to the clique number (chromatic number) of H, and hence the optimum placement problem is converted to that of minimumClique number augmentation.
Abstract: This paper gives a graph-theoretic approach to the design of one-dimensional logic gate arrays using MOS or I^{2}L units. The incidence relation between gates and nets is represented by a graph H=(V,E) , and a possible layout of gates and nets is characterized by an interval graph \hat{H} = (V, E \cup F) , where F is called an augmentation. It is shown that the number of tracks required for between-gate wiring is equal to the clique number (chromatic number) of H , and hence the optimum placement problem is converted to that of minimum clique number augmentation. This turns out to be an NP -complete problem. Instead a polynomial-time algorithm for finding a minimal augmentation is presented, where an augmentation is minimal if no proper subset of it is an augmentation. An algorithm for gate sequencing with respect to a given augmentation is also presented.
TL;DR: In this article, the necessary and sufficient condition for optimum single-row routing is obtained, and a graph theory interpretation of the condition is also given to illustrate how optimum routings are derived.
Abstract: The problem of single-row routing represents the backbone of the problem of general routing of multilayer printed circuit boards. In this paper, the necessary and sufficient condition for optimum single-row routing is obtained. By optimum routing we mean minimumm street congestion. A novel formulation is introduced. Examples are given to illustrate how optimum routings are derived. A graph theory interpretation of the condition is also given.
TL;DR: In this paper, the exact analysis of networks containing capacitors, independent and dependent voltage sources, and switches is presented for both transient response and frequency response, and solutions for both continuous and piecewiseconstant arbitrary inputs are handled, and the switching pattern can be periodic (with any number of subintervals per period) or nonperiodic.
Abstract: An efficient method is presented for the exact analysis of networks containing capacitors, independent and dependent voltage sources, and switches. Both continuous and piecewise-constant arbitrary inputs are handled, and solutions are presented for both transient response and frequency response. The switching pattern can be periodic (with any number of subintervals per period) or nonperiodic. The formulation proposed can be efficiently implemented on the computer and provides for user convenience; only one network topology and the switching schedule must be specified (as opposed to specifying as many topologies as there are switch position combinations). The method is especially well suited for the analysis of the recently introduced switched capacitor filters and charge redistribution circuits.
TL;DR: In this article, it was shown that the amplitudes of all self-sustained limit cycles can be made arbitrarily small by increasing the numbers of bits associated with the representation of the data samples.
Abstract: It is known that second-order digital filters realized in direct form using saturation arithmetic have the property that the amplitudes of all self-sustained limit cycles can be made arbitrarily small by increasing the numbers of bits associated with the representation of the data samples. In this paper we observe that a recent extension to certain higher order cases of an idealized version of that result (quantization is ignored in the Idealized model) is a direct corollary of a theorem in the theory of feedback systems, and that the extension (and related more general propositions) can be proved without the earlier theorem by using simple operator-theoretic methods. The main result given in the paper is an extension of the result for nonidealized second-order sections to a class of filters of arbitrary order.
TL;DR: In this paper, an analysis of the relationship between dynamic range and roundoff noise for a class of minimum-norm realizations called "normal" is presented, where the eigenvectors of the system matrix form an orthogonal basis for the system state space.
Abstract: Minimum-norm realizations of fixed-point digital filters provide guaranteed immunity from autonomous overflow limit cycles. This paper presents an analysis of the relationship between dynamic range and roundoff noise for a class of minimum-norm realizations called "normal." For normal realizations, the eigenvectors of the system matrix form an orthogonal basis for the system state space. An explicit expression for minimum roundoff noise, under an 12 dynamic range constraint, is derived, and means for achieving this minimum are given. The simple expression for minimum roundoff noise permits easy determination, by trial and error, of optimal subfilter structures. Explicit expressions for the state-space parameters of optimal secondorder normal filters are given.
TL;DR: In this paper, the SmithMacmillan form of a rational m \times n matrix R(p) from Laurent expansions in its poles and zeros is derived based on the relation between the eigen-information of a transfer function and the information contained in partial fraction or Laurent expansions.
Abstract: A novel method is presented to determine the SmithMacmillan form of a rational m \times n matrix R(p) from Laurent expansions in its poles and zeros. Based on that method, a numerically stable algorithm is deduced, which uses only a minimal number of terms of the Laurent expansion, hence providing a shortcut with respect to cumbersome and unstable procedures based on elementary transformations with unimodular matrices. The method can be viewed as a generalization of Kublanovkaya's algorithm for the complete solution of the eigenstructre problem for \lambda I - A . From a system's point of view it provides a handy and numerically stable way to determine the degree of a zero of a transfer function and unifies a number of results from multivariable realization and invertibility theory. The paper presents a systematic treatment of the relation between the eigen-information of a transfer function and the information contained in partial fraction or Laurent expansions. Although a number of results are known, they are presented in a systematic way which considerably simplifies the total picture and introduces in a natural way a number of novel techniques.
TL;DR: In this paper, a theory for the study of analog circuit fault diagnosis is developed, where sufficient conditions are presented such that the value of each of the network elements is uniquely determinable from the network's behavior as seen from its external terminals.
Abstract: A theory for the study of the analog circuit fault diagnosis problem is developed. Sufficient conditions are presented such that the value of each of the network elements is uniquely determinable from the network's behavior as seen from its external terminals. It is shown how one can determine-considering only the circuit's topology-whether or not it is possible to compute the element values of a resistive network from the test-terminal measurements, before going through the process of actually attempting to solve for element values. The implications of the results are discussed when applied to networks containing solid-state devices such as diodes and transistors. Finally, an algorithm for the actual computation of the element values is proposed and its global convergence is proved. Furthermore, several examples are included to illustrate the applications of the theory developed in this paper.
TL;DR: The subalgorlthm, an extension of Polak's method of feasible directions to nondifferentlable problems, is shown to converge under suitable assumptions and the optimality function used in the subalgorithm is proven to satisfy a condition which guarantees that the overall algorithm converges.
Abstract: The optimal design centering, tolerancing, and tuning problem is transcribed into a mathematical programming problem of the form P_g: \min\{f(x)|\max_{\omega\in\Omega}\min_{\tau\in\Gamma} \zeta^{j}(x,\omega, \tau) \leq 0\} , x \geq 0, x, \omega, \tau \in R^{n} , f: R^n \rightarrow R^1 , \zeta: R^n \times R^n \times R^n \rightarrow R^1 , continuously differentiable, \Omega and T compact subsets of R^n , J=\{1, \cdots , p\} . A simplified form of P_g , P: \min \{f(x) \Psi (x) \underset{=}{\triangle} \max_{omega\in \Omega \min_{\tau \in T} \zeta(x,\omega, \tau ) \leq 0 \} is discussed. It is shown that $\Psi(\cdot ) is locally Lipschitz continuous but not continuously differentiable. Optimality conditions for P based on the concept of generalized gradients are derived. An algorithm, consisting of a master outer approximations algorithm proposed by Gonzaga and Polak and of a new subalgorlthm for nondifferentiable problems of the form P_{i}: \min\{f(x)| \max_{\omega\in\Omega_i\} \min_{\tau \in T} \zeta (x, \omega, \tau ) \leq 0 \} , where \Omega_i is a discrete set, is presented. The subalgorlthm, an extension of Polak's method of feasible directions to nondifferentlable problems, is shown to converge under suitable assumptions. Moreover, the optimality function used in the subalgorithm is proven to satisfy a condition which guarantees that the overall algorithm converges.
TL;DR: The basic optimization problem without tolerances is denoted the zero tolerance problem (ZTP), and the WCP is solved by a double-iterative algorithm in which the inner iteration is performed by the FTP- algorithm.
Abstract: New algorithms are presented for the solution of optimum tolerance assignment problems. The problems considered are defined mathematically as a worst-case problem (WCP), a fixed tolerance problem (FTP), and a variable tolerance problem (VTP). The basic optimization problem without tolerances is denoted the zero tolerance problem (ZTP). For solution of the WCP we suggest application of interval arithmetic and also alternative methods. For solution of the FTP an algorithm is suggested which is conceptually similar to algorithms previously developed by the authors for the ZTP. Finally, the VTP is solved by a double-iterative algorithm in which the inner iteration is performed by the FTP- algorithm. The application of the algorithm is demonstrated by means of relatively simple numerical examples. Basic properties, such as convergence properties, are displayed based on the examples.
TL;DR: In this paper, the authors extended the four-port representation of SC networks by considering six basic building blocks for the design of any general active or passive SC-filter design, and the measured response is shown to coincide with the response predicted by the theory.
Abstract: In a previous publication by the authors it was shown how switched-capacitor (SC) networks can be analyzed by using nodal charge equations. The result was a description of SC networks as time-variant sampled-data networks which led to a four-port equivalent circuit representation in the z-domain. In this paper, the four-port representation is expanded by considering six basic building blocks for the design of any general active or passive SC network. With the four-port equivalent circuit representation, traditional two-port analysis tools, such as the transmission matrix and two-port transfer functions, can be used conveniently. An SC-filter design example is given and the measured response is shown to coincide with the response predicted by the theory.