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Showing papers in "IEEE Transactions on Circuits and Systems in 1998"


Journal Article
TL;DR: In this paper, the use of the delta operator in the realizations of digital filters has recently gained interest due to its good finite-word-length performance under fast sampling, and the authors studied efficient direct form structures, and showed that only some of them can be used in delta configurations, while others are evidently unstable.
Abstract: The use of the delta operator in the realizations of digital filters has recently gained interest due to its good finite-word-length performance under fast sampling. We studied efficient direct form structures, and show that only some of them can be used in delta configurations, while others are evidently unstable. In this paper, we focus on the roundoff noise analysis. Of all the direct-form structures, the direct form II transposed (DFIIt) delta structure has the lowest quantization noise level at its output. This structure outperforms both the conventional direct-form (delay) structures, as well as the state-space structures for narrow-band low-pass filters with respect to output roundoff noise. Excellent roundoff noise performance is achieved at the cost of only a minor additional implementation complexity when compared with the corresponding delay realization. Complexity of a signal processor implementation of the DFIIt delta structure, which was found to be the most suitable delta structure for signal processors, is compared with those of the direct form and state-space delay structures. In addition, some hardware implementation aspects are discussed, including the minimization of the internal word length.

64 citations




Journal Article
TL;DR: An event-driven algorithm and its symbolic implementation for the analysis of power and ground (P/G) bus networks and the results show that the symbolic implementation is an order of magnitude faster, with reasonably good accuracy, than using a traditional analog circuit simulator like SPICE.
Abstract: This paper presents an event-driven algorithm and its symbolic implementation for the analysis of power and ground (P/G) bus networks. The algorithm uses frequency-domain techniques and moment matching approaches based on Pade approximants to estimate the transfer function at each node in the P/G network. Afterwards, the transient waveforms are extracted for each node. The process requires repetitive simulation of a linear and time-variant (from one time event to the next) circuit model for the P/G network which is the reason a symbolic implementation was produced. The P/G network is modeled by a hierarchical combination of mesh and tree structures that are composed of a collection of RC-/spl pi/-segments and pulldown (or pullup) switches. The switches are symbolically represented by Boolean variables and a compiled symbolic code is generated only once for each P/G network. The transient waveforms are then produced by repetitive evaluation of the symbolic output. The results show that the symbolic implementation is an order of magnitude faster, with reasonably good accuracy, than using a traditional analog circuit simulator like SPICE.

1 citations