Showing papers in "IEEE Transactions on Circuits and Systems I-regular Papers in 2018"

Event-Triggered Control for Consensus Problem in Multi-Agent Systems With Quantized Relative State Measurements and External Disturbance

Abstract: For decreasing communication load and overcoming network constrains, such as the limited bandwidth and data loss in multi-agent networks, this paper integrates the two control strategies to investigate the bounded consensus problem of multi-agent systems (MASs) with external disturbance on the basis of an undirected graph, namely, the quantized control and the event-triggered control. In the existence of the external disturbance, two types of the high-gain control laws with the uniform quantized relative state measurements for the bounded consensus problem of MASs are first discussed, respectively. Then, in order to save the limited network resources in a multi-agent network, the event-triggered quantized communication protocols are designed based on the first case to obtain the bounded consensus in multi-agent systems. Moreover, it is shown that “Zeno behavior” phenomenon can be excluded under the two event-triggered quantized control mechanisms, and the boundness of the relative state error can be adjusted by selecting the different parameters. Finally, two examples are shown to validate the feasibility and efficiency of our theoretical analysis.

Observer-Based Adaptive SMC for Nonlinear Uncertain Singular Semi-Markov Jump Systems With Applications to DC Motor

Abstract: This paper deals with the observer-based adaptive sliding mode control (OBASMC) design for nonlinear uncertain singular semi-Markov jump systems. The system satisfies the singular property and follows a stochastic semi-Markov process related to Weibull distribution. Due to the influence of sensor factors in practical systems, the state vectors are not always known. Additionally, the unavoidable measurement errors in the actual system always lead to the model uncertainties and the unknown nonlinearity. Our attention is to design the OBASMC law for such a class of complex systems. First, by the use of the Lyapunov–Krasovskii functional, sufficient conditions are given, such that the sliding mode dynamics are stochastically admissible. Then, the OBASMC law is proposed to guarantee the reachability in a finite-time region. Finally, the practical system about dc motor model is given to verify the validity.

A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things

Abstract: Convolutional neural network (CNN) offers significant accuracy in image detection. To implement image detection using CNN in the Internet of Things (IoT) devices, a streaming hardware accelerator is proposed. The proposed accelerator optimizes the energy efficiency by avoiding unnecessary data movement. With unique filter decomposition technique, the accelerator can support arbitrary convolution window size. In addition, max-pooling function can be computed in parallel with convolution by using separate pooling unit, thus achieving throughput improvement. A prototype accelerator was implemented in TSMC 65-nm technology with a core size of 5 mm2. The accelerator can support major CNNs and achieve 152GOPS peak throughput and 434GOPS/W energy efficiency at 350 mW, making it a promising hardware accelerator for intelligent IoT devices.

Approximate Multipliers Based on New Approximate Compressors

Abstract: Approximate computing is an emerging trend in digital design that trades off the requirement of exact computation for improved speed and power performance. This paper proposes novel approximate compressors and an algorithm to exploit them for the design of efficient approximate multipliers. By using the proposed approach, we have synthesized approximate multipliers for several operand lengths using a 40-nm library. Comparison with previously presented approximated multipliers shows that the proposed circuits provide better power or speed for a target precision. Applications to image filtering and to adaptive least mean squares filtering are also presented in the paper.

Adaptive Fault-Tolerant Consensus for a Class of Uncertain Nonlinear Second-Order Multi-Agent Systems With Circuit Implementation

Abstract: In this paper, a robust fault-tolerant consensus control strategy and its circuit implementation method are proposed for a class of nonlinear second-order leader-following multi-agent systems against multiple actuator faults and time-varying state/input-dependent system uncertainties. The faults of partial loss of actuator effectiveness and bias-actuators are considered without knowing eventual faulty information. The uncertainties are supposed to be structured and to satisfy integral quadratic constraints. The nonlinear dynamics of underlying systems are described by linear state-dependent functions based on the differential mean value theorem. By designing adaptive schemes and state-feedback control gains, a novel distributed control strategy is constructed to ensure the asymptotic consensus of agents in the presence of actuator faults, uncertainties, and nonlinear dynamics. The control strategy is further physically implemented based on the circuit theory. The efficiency of the developed control circuits is verified by a multiple coupled nonlinear forced pendulum system based on a circuit simulation software.

Memristor-Based Circuit Design for Multilayer Neural Networks

Abstract: Memristors are promising components for applications in nonvolatile memory, logic circuits, and neuromorphic computing. In this paper, a novel circuit for memristor-based multilayer neural networks is presented, which can use a single memristor array to realize both the plus and minus weight of the neural synapses. In addition, memristor-based switches are utilized during the learning process to update the weight of the memristor-based synapses. Moreover, an adaptive back propagation algorithm suitable for the proposed memristor-based multilayer neural network is applied to train the neural networks and perform the XOR function and character recognition. Another highlight of this paper is that the robustness of the proposed memristor-based multilayer neural network exhibits higher recognition rates and fewer cycles as compared with other multilayer neural networks.

An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits

Abstract: The computation-intensive circuit simulation makes the analog circuit sizing challenging for large-scale/complicated analog/RF circuits. A Bayesian optimization approach has been proposed recently for the optimization problems involving the evaluations of black-box functions with high computational cost in either objective functions or constraints. In this paper, we propose a weighted expected improvement-based Bayesian optimization approach for automated analog circuit sizing. Gaussian processes (GP) are used as the online surrogate models for circuit performances. Expected improvement is selected as the acquisition function to balance the exploration and exploitation during the optimization procedure. The expected improvement is weighted by the probability of satisfying the constraints. In this paper, we propose a complete Bayesian optimization framework for the optimization of analog circuits with constraints for the first time. The existing GP model-based optimization methods for analog circuits take the GP models as either offline models or as assistance for the evolutionary algorithms. We also extend the Bayesian optimization algorithm to handle multi-objective optimization problems. Compared with the state-of-the-art approaches listed in this paper, the proposed Bayesian optimization method achieves better optimization results with significantly less number of simulations.

Optimized Active Disturbance Rejection Control for DC-DC Buck Converters With Uncertainties Using a Reduced-Order GPI Observer

Abstract: The output voltage regulation problem of a PWM-based dc-dc buck converter under various sources of uncertainties and disturbances is investigated in this paper via an optimized active disturbance rejection control (ADRC) approach. Aiming to practical implementation, a new reduced-order generalized proportional integral (GPI) observer is first designed to estimate the lumped (possibly time-varying) disturbances within the dc-dc circuit. By integrating the disturbance estimation information raised by the reduced-order GPI observer into the output prediction, an optimized ADRC method is developed to achieve optimized tracking performance even in the presence of disturbances and uncertainties. It is shown that the proposed controller will guarantee the rigorous stability of the closed-loop system, for any bounded uncertainties of the circuit, by appropriately choosing the observer gains and the bandwidth factor. Experimental results illustrate that the proposed control solution is characterized by improved robustness performance against various disturbances and uncertainties compared with traditional ADRC and integral model predictive control (MPC) approaches.

Finite-Time Bipartite Consensus for Multi-Agent Systems on Directed Signed Networks

Abstract: This paper addresses the finite-time bipartite consensus problem for multi-agent systems (MASs) on a directed signed network. Some properties for signed digraphs are first investigated and two nonlinear control protocols are then designed for first- and second-order MASs, respectively, where agents may be influenced by bounded disturbances. Particularly, for MASs with second-order dynamics, a new estimation technique is developed to estimate the settling time. Simulation results are finally presented to verify the effectiveness of the proposed control protocols.

X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

Abstract: Silicon-based static random access memories (SRAM) and digital Boolean logic have been the workhorse of the state-of-the-art computing platforms. Despite tremendous strides in scaling the ubiquitous metal-oxide-semiconductor transistor, the underlying von-Neumann computing architecture has remained unchanged. The limited throughput and energy-efficiency of the state-of-the-art computing systems, to a large extent, result from the well-known von-Neumann bottleneck . The energy and throughput inefficiency of the von-Neumann machines have been accentuated in recent times due to the present emphasis on data-intensive applications such as artificial intelligence, machine learning, and cryptography. A possible approach towards mitigating the overhead associated with the von-Neumann bottleneck is to enable in-memory Boolean computations. In this paper, we present an augmented version of the conventional SRAM bit-cells, called the X-SRAM , with the ability to perform in-memory, vector Boolean computations, in addition to the usual memory storage operations. We propose at least six different schemes for enabling in-memory vector computations, including NAND, NOR, IMP (implication), XOR logic gates, with respect to different bit-cell topologies − the 8T cell and the 8+T Differential cell. In addition, we also present a novel ‘read-compute-store’ scheme, wherein the computed Boolean function can be directly stored in the memory without the need of latching the data and carrying out a subsequent write operation. The feasibility of the proposed schemes has been verified using the predictive transistor models and detailed Monte-Carlo variation analysis. As an illustration, we also present the efficacy of the proposed in-memory computations by implementing advanced encryption standard algorithm on a non-standard von-Neumann machine wherein the conventional SRAM is replaced by X-SRAM. Our simulations indicated that up to 75% of memory accesses can be saved using the proposed techniques.

Reliable Control of Fuzzy Singularly Perturbed Systems and Its Application to Electronic Circuits

Abstract: In this paper, the reliable control problem of nonlinear singularly perturbed systems subject to random actuator faults is studied. A Takagi-Sugeno fuzzy model is utilized to describe the nonlinear plant, and a Markov chain with partly unknown transition probabilities is adopted to characterize the random behaviors of the actuator faults, in contrast with the existing fault modes in which all the transition probabilities are required to be known. Combining the utilization of a novel fuzzy singular-perturbation-parameter-dependent Markovian Lyapunov function with the introduction of the slack matrix variable, sufficient conditions on the existence of the reliable fuzzy controller are presented, which are dependent on the upper bounds on the time derivatives of membership functions. A search algorithm is provided to obtain the maximum stabilization bound. Moreover, conditions based on single Lyapunov function are also established. The effectiveness and the applicability of the proposed new design technique are verified by an example of an electronic circuit system.

Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications

Abstract: In this paper, the designs of both non-iterative and iterative approximate logarithmic multipliers (ALMs) are studied to further reduce power consumption and improve performance. Non-iterative ALMs, that use three inexact mantissa adders, are presented. The proposed iterative ALMs (IALMs) use a set-one adder in both mantissa adders during an iteration; they also use lower-part-or adders and approximate mirror adders for the final addition. Error analysis and simulation results are also provided; it is found that the proposed approximate LMs with an appropriate number of inexact bits achieve higher accuracy and lower power consumption than conventional LMs using exact units. Compared with conventional LMs with exact units, the normalized mean error distance of 16-bit approximate LMs is decreased by up to 18% and the power-delay product has a reduction of up to 37%. The proposed approximate LMs are also compared with previous approximate multipliers; it is found that the proposed approximate LMs are best suitable for applications allowing larger errors, but requiring lower energy consumption. Approximate Booth multipliers fit applications with less stringent power requirements, but also requiring smaller errors. Case studies for error-tolerant computing applications are provided.

Single Underwater Image Restoration Using Adaptive Attenuation-Curve Prior

Abstract: Underwater imaging is an important topic in maritime research. Due to the existence of dust-like particles in water medium, underwater images are vulnerable to the effect of low contrast and color cast. In this paper, we propose a novel underwater image restoration method based on a non-local prior, namely, adaptive attenuation-curve prior. This prior relies on the statistical distribution of pixel values. That is, all pixel values of a clear image can be partitioned into several hundred distinct clusters in RGB space, and the pixel values in each cluster will be distributed on a curve with a power function form after attenuated by water in varying degrees. Specifically, we can estimate the transmission for each pixel according to its distribution on the curves. Then, we estimate the attenuation factor to compensate for the transmission. To prevent over saturation and reduce the noise of the recovered images, we propose the saturation constraints to adjust the transmission of the three color channels. Qualitative and quantitative results demonstrate that our proposed method can achieve better performance, compared with the state-of-the-art approaches. Moreover, our proposed method can be further extended to restore other kinds of degraded images, such as hazy images.

Efficient Hardware Architectures for Deep Convolutional Neural Network

Abstract: Convolutional neural network (CNN) is the state-of-the-art deep learning approach employed in various applications. Real-time CNN implementations in resource limited embedded systems are becoming highly desired recently. To ensure the programmable flexibility and shorten the development period, field programmable gate array is appropriate to implement the CNN models. However, the limited bandwidth and on-chip memory storage are the bottlenecks of the CNN acceleration. In this paper, we propose efficient hardware architectures to accelerate deep CNN models. The theoretical derivation of parallel fast finite impulse response algorithm (FFA) is introduced. Based on FFAs, the corresponding fast convolution units (FCUs) are developed for the computation of convolutions in the CNN models. Novel data storage and reuse schemes are proposed, where all intermediate pixels are stored on-chip and the bandwidth requirement is reduced. We choose one of the largest and most accurate networks, VGG16, and implement it on Xilinx Zynq ZC706 and Virtex VC707 boards, respectively. We achieve the top-5 accuracy of 86.25% using an equal distance non-uniform quantization method. It is estimated that the average performances are 316.23 GOP/s under 172-MHz working frequency on Xilinx ZC706 and 1250.21 GOP/s under 170-MHz working frequency on VC707, respectively. In brief, the proposed design outperforms the existing works significantly, in particular, surpassing related designs by more than two times in terms of resource efficiency.

Finite-Time $H_{\infty}$ State Estimation for Discrete Time-Delayed Genetic Regulatory Networks Under Stochastic Communication Protocols

Abstract: This paper investigates the problem of finite-time $H_{\infty }$ state estimation for discrete time-delayed genetic regulatory networks under stochastic communication protocols (SCPs). The network measurements are transmitted from two groups of sensors to a remote state estimator via two independent communication channels of limited bandwidths, and two SCPs are utilized to orchestrate the transmission orders of sensor nodes with aim to avoid data collisions. The estimation error dynamics is modeled by a Markovian switching system with two switching signals. By constructing a transmission-order-dependent Lyapunov–Krasovskii functional and utilizing an up-to-date discrete Wirtinger-based inequality together with the reciprocally convex approach, sufficient conditions are established to guarantee the stochastic finite-time boundedness for the estimation error dynamics with a prescribed $H_{\infty }$ disturbance attenuation level. The parameters of the state estimator are designed by solving a convex optimization problem which minimizes the disturbance attenuation level subject to several inequality constraints. The repressilator model is utilized to illustrate the effectiveness of the design procedure of the proposed state estimator.

Fault Detection for Linear Discrete Time-Varying Systems Subject to Random Sensor Delay: A Riccati Equation Approach

Abstract: This paper mainly studies the fault detection (FD) problem for linear discrete time-varying systems subject to random sensor delay. By assuming that the measurement channel is with Transmission Control Protocol (TCP), an observer-based FD filter (FDF) is provided as a residual generator via embedding the packet indicator into the filter. To construct this FDF, its design issue is formulated into two sub-problems. One is to maximize the $\mathcal {H}_{-}/\mathcal {H}_{\infty }$ or $\mathcal {H}_{\infty }/\mathcal {H}_{\infty }$ FD performance index, which aims to enhance the ratio of fault sensitivity/disturbance attenuation. The other one is to find the filter parameter matrices such that the error between the residual and the fault is minimized in the $\mathcal {H}_{\infty }$ sense. By employing stochastic analysis and introducing some adjoint operator based optimization approaches, analytical solutions to the aforementioned FDF design problem are derived via solving recursive Riccati equations. An illustrative example is given to show the effectiveness of the proposed methodologies.

Dual-Phase-Shift Control Scheme With Current-Stress and Efficiency Optimization for Wireless Power Transfer Systems

Abstract: Traditional wireless power transfer (WPT) systems usually adopt the single-phase-shift (SPS) control method to maintain a constant output current or a constant output voltage for various applications. However, the current-stress on one side is much higher than that of the other side especially under operating conditions with high voltage conversion ratio and light-load. This phenomenon actually can be proven by the established mathematical model of the current-stress of WPT systems using SPS control. This large current-stress will damage power devices and lower the efficiency of WPT systems. In addition, it will result in an increase of system total cost because of the need for the devices with the higher volt-ampere rating. A control strategy based on dual-phase-shift control is developed for WPT systems with an active rectifier to reduce the maximum value of current-stresses on both sides as well as to maintain a constant output voltage or current. Consequently, the system efficiency can be improved compared to traditional WPT systems with SPS control. A scaled-down experimental prototype is constructed to verify the effectiveness of the proposed WPT topology and the control method. Experimental results show that the proposed method can reduce the maximum current-stress significantly and improve the system efficiency compared to traditional WPT systems under SPS control.

An Architecture to Accelerate Convolution in Deep Neural Networks

Abstract: In the past few years, the demand for real-time hardware implementations of deep neural networks (DNNs), especially convolutional neural networks (CNNs), has dramatically increased, thanks to their excellent performance on a wide range of recognition and classification tasks. When considering real-time action recognition and video/image classification systems, latency is of paramount importance. Therefore, applications strive to maximize the accuracy while keeping the latency under a given application-specific maximum: in most cases, this threshold cannot exceed a few hundred milliseconds. Until now, the research on DNNs has mainly focused on achieving a better classification or recognition accuracy, whereas very few works in literature take in account the computational complexity of the model. In this paper, we propose an efficient computational method, which is inspired by a computational core of fully connected neural networks, to process convolutional layers of state-of-the-art deep CNNs within strict latency requirements. To this end, we implemented our method customized for VGG and VGG-based networks which have shown state-of-the-art performance on different classification/recognition data sets. The implementation results in 65-nm CMOS technology show that the proposed accelerator can process convolutional layers of VGGNet up to 9.5 times faster than state-of-the-art accelerators reported to-date while occupying 3.5 mm2.

A Millimeter-Wave Fully Integrated Passive Reflection-Type Phase Shifter With Transformer-Based Multi-Resonance Loads for 360° Phase Shifting

Abstract: This paper presents a millimeter-wave fully differential transformer-based passive reflection-type phase shifter (RTPS) capable of performing full span 360° continuous phase shift from 58 to 64 GHz. It consists of two transformer-based 90° couplers and two transformer-based multi-resonance reflective loads to provide 360° phase shift with low loss and ultra-compact chip size. Our proof-of-concept design is implemented in a standard 130-nm BiCMOS process with a core area of 480 $\mu \text{m} \,\, \times 340~\mu \text{m}$ . It achieves a wide phase shifting range of 367° and a low insertion loss IL ( $3.7~\text {dB} ) at 62 GHz and maintains a full span 360° phase shifting range from 58 to 64 GHz. Moreover, it supports 360° phase shifting with a constant IL, i.e., $\vert \text {IL}\vert =10$ , 11, 12 dB, at an IL variation of less than 0.74 dB at 62 GHz. To the best of our knowledge, this design achieves a first-ever full span 360° phase shifting (up to 367°), the lowest IL, the smallest IL variation, and the best figure-of-merit of 37.1°/dB among reported 60 GHz fully integrated RTPS in silicon.

A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS

Abstract: This paper presents a CMOS broadband millimeter wave power amplifier (PA) based on magnetically coupled resonator (MCR) matching network. The MCR matching network is analyzed theoretically. Design method for MCR-based broadband PA is proposed. For the PA’s output matching network, the inductance ratio should be equal to the load/source resistance ratio to achieve broadband impedance transformation. And the coupling coefficient ( $k$ ) of the MCR can be determined from the no gain ripple condition. Fabricated in 65-nm CMOS process, the PA chip achieves 32.9% peak power added efficiency, 15.3-dBm saturated output power ( $P_{\mathrm {sat}}$ ), and 12.9-dBm output 1-dB compression point ( $P_{\mathrm {1\,dB}}$ ). The fractional bandwidth of the PA is 63.3% from 21.6 to 41.6 GHz, which covers the full Ka-band (26.5 to 40 GHz).

Event-Based Control for Network Systems via Integral Quadratic Constraints

Abstract: This paper investigates the event-based control for network systems. Edge-based approach is utilized to predict the value of edge state between two event instants. Different from the node-based approach, it can significantly reduce the communication burden at event instants. Based on the small gain theorem, the closed-loop system is expressed as the feedback interconnection of a linear time-invariant system and an operator. The operator describes the unstable component and has an upper bound in $L_{2}$ space and the control gain is designed, such that the feedback interconnection is stable. Furthermore, we adopt the integral quadratic constraints to describe the correlation between output and input of the operator. And the Kalman–Yakubovich–Popov Lemma is adopted to transform the infinite dimensional stability condition into one inequality. The designed event-triggering condition and distributed control law can ensure that a network system achieves synchronization. The effectiveness of the communication protocol and control strategy is illustrated by a numerical example.

Leader-Following Consensus of Multi-Agent Systems With Switching Networks and Event-Triggered Control

Abstract: This paper addresses the event-based leader-following consensus of a class of multi-agent systems with switching networks. Fully distributed event-triggered functions are proposed to select the sampling instants automatically. Detailed algorithms are given to design the feedback gains and coupling strength. The positive lower bound of the sampling intervals is captured to exclude Zeno behaviours. Finally, simulations are also carried out to verify the effectiveness of the event-triggered control scheme.

One-Dimensional Nonlinear Model for Producing Chaos

Abstract: Motivated by the concept of circuit design in digital circuit, this paper proposes a one-dimensional (1D) nonlinear model (1D-NLM) for producing 1D discrete-time chaotic maps. Our previous works have designed four nonlinear operations of generating new chaotic maps. However, they focus only on discussing individual nonlinear operations and their properties, but fail to consider their relationship among these operations. The proposed 1D-NLM includes these existing nonlinear operations, develops two new nonlinear operations, discusses their relationship among different nonlinear operations, and investigates the properties of different combinations of these operations. To show the effectiveness of 1D-NLM in generating new chaotic maps, as examples, we provide four new chaotic maps and study their dynamics properties from following three aspects: equilibrium point, stability, and bifurcation diagram. Performance evaluations are provided using the Lyapunov exponent, Shannon entropy, correlation dimension, and initial state sensitivity. The evaluation results show that these new chaotic maps have more complex chaotic behaviors than existing ones. To demonstrate the performance of 1D-NLM in practical applications, we use a pseudo-random number generator (PRNG) to compare new and existing chaotic maps. The randomness test results indicate that new chaotic map generated by 1D-NLM shows better performance than existing ones in designing PRNG.

Modeling and Analysis of Passive Switching Crossbar Arrays

Abstract: Emerging technologies have enabled efficient, high-speed realizations of ultra-dense crossbar arrays, driving the need for better insight in the transient operation of such systems. Previous work focused mostly on the effect of line resistance and its impact on steady-state response. In this paper, we develop a compact $RC$ framework that includes the effects of parasitics. We use memristors as an exemplar device where interconnect parasitics (resistance, inductance, capacitance, and conductance) are extracted using ANSYS Q3D extractor for 5- and 50- $nm$ feature sizes. A model for the crossbar is presented, considering the stray and coupling capacitive parasitics of the crossbar. The derived model is based on state-space representation and provides more insight into the behavior of crossbar arrays containing either linear or nonlinear switching devices. The framework provides a closed-form solution to evaluate Elmore delay, as well as the steady-state response of the system. Signal delay is evaluated and compared for both grounded and floating interconnect inputs and verified against HSPICE, showing a perfect match.

An Accelerated LIF Neuronal Network Array for a Large-Scale Mixed-Signal Neuromorphic Architecture

Abstract: We present an array of leaky integrate-and-fire (LIF) neuron circuits designed for the second-generation BrainScaleS mixed-signal 65-nm CMOS neuromorphic hardware. The neuronal array is embedded in the analog network core of a scaled-down prototype high input count analog neural network with digital learning system chip. Designed as continuous-time circuits, the neurons are highly tunable and reconfigurable elements with accelerated dynamics. Each neuron integrates input current from a multitude of incoming synapses and evokes a digital spike event output. The circuit offers a wide tuning range for synaptic and membrane time constants, as well as for refractory periods to cover a number of computational models. We elucidate our design methodology, underlying circuit design, calibration, and measurement results from individual sub-circuits across multiple dies. The circuit dynamics matches with the behavior of the LIF mathematical model. We further demonstrate a winner-take-all network on the prototype chip as a typical element of cortical processing.

A High Frame Rate Wearable EIT System Using Active Electrode ASICs for Lung Respiration and Heart Rate Monitoring

Abstract: A high specification, wearable, electrical impedance tomography (EIT) system with 32 active electrodes is presented. Each electrode has an application specific integrated circuit (ASIC) mounted on a flexible printed circuit board, which is then wrapped inside a disposable fabric cover containing silver-coated electrodes to form the wearable belt. It is connected to a central hub that operates all the 32 ASICs. Each ASIC comprises a high-performance current driver capable of up to 6 mAp-p output, a voltage buffer for EIT and heart rate signal recording as well as contact impedance monitoring, and a sensor buffer that provides multi-parameter sensing. The ASIC was designed in a CMOS 0.35- $\mu \text{m}$ high-voltage process technology. It operates from ±9 V power supplies and occupies a total die area of 3.9 mm2. The EIT system has a bandwidth of 500 kHz and employs two parallel data acquisition channels to achieve a frame rate of 107 frames/s, the fastest wearable EIT system reported to date. Measured results show that the system has a measurement accuracy of 98.88% and a minimum EIT detectability of 0.86 $\Omega $ /frame. Its successful operation in capturing EIT lung respiration and heart rate biosignals from a volunteer is demonstrated.

Exponential Consensus of Multiagent Systems With Lipschitz Nonlinearities Using Sampled-Data Information

Abstract: In this paper, exponential consensus of general linear multiagent systems with Lipschitz nonlinear dynamics using sampled-data information is investigated. Both leaderless and leader-following consensuses are considered. Using input-delay approach, the resulting sampled-data closed-loop systems are first reformulated as continuous systems with time-varying delay in the control input. Then, decoupled conditions in terms of linear matrix equality (LMI) on the Lipschitz constant, the decay rate, the communication graph parameters, and the control gain matrix to guarantee exponential consensus are derived using novel Lyapunov functionals. Based on the sufficient conditions, controller design methods are also provided in the form of decoupled LMIs. Finally, simulation examples including the consensus of Chua’s circuit systems are given to illustrate the effectiveness of the obtained results.

Event-Triggered Protocol for the Consensus of Multi-Agent Systems With State-Dependent Nonlinear Coupling

Abstract: This paper proposes an event-triggered protocol to achieve consensus in multi-agent system, in which neighboring agents are coupled via a nonlinear function with local passivity. It is mathematically proved that the proposed protocol guarantees average consensus in the system, excluding the existence of Zeno phenomenon. As a practical application, the scheme is applied to achieve synchronization in the Kuramoto oscillator network. Phase agreement is obtained for oscillators with identical natural frequency. For oscillators with non-identical natural frequencies, their phases are confined in a bounded range and their frequencies reach an average of their natural frequencies. To further demonstrate the generality of the scheme, another multi-agent system with coupling based on exponential and tangent functions is also presented. All the simulation results verify the condition of consensus and confirm the effectiveness of the scheme.

Fault Detection for Linear Discrete Time-Varying Systems With Multiplicative Noise: The Finite-Horizon Case

Abstract: This paper studies the problem of fault detection for linear discrete time-varying systems with multiplicative noise in finite-horizon, where our main object is to provide an optimal fault detection filter (FDF) design scheme such that stochastic sensitivity/robustness ratio for fault diagnosis is maximized in the sense of probability 1. An operator-aided optimization approach and a generalized FDF are proposed such that solutions to the filter design issues are derived in the operator forms. The relationships among the deduced solutions are explicitly revealed via the proposed operator-aided methodology. The parameter matrices of the filter are computed in an analytical way by solving some recursive matrix equations. It is shown that the addressed approaches establish an operator-based framework of optimal FDF design for some categories of linear discrete-time systems. An example is given to illustrate the efficacy of our algorithms.

ASNI: Attenuated Signature Noise Injection for Low-Overhead Power Side-Channel Attack Immunity

Abstract: Computationally-secure cryptographic algorithms implemented on a physical platform leak significant “ side-channel ” information through their power supplies. Correlational power attack is an efficient power side-channel attack (SCA) technique, which analyzes the statistical correlation between the estimated and the measured supply current traces to extract the secret key. The existing power SCA countermeasures are mainly based on reducing the SNR of the leaked information, power balancing, or gate-level masking, each of which introduces significant power, area or performance overheads, which calls for an efficient generic countermeasure. This paper presents ASNI: Attenuated Signature Noise Injection , which is an energy-efficient generic countermeasure, and shows SCA resistance on the AES-128 encryption as an application. ASNI uses a shunt low-drop-out (LDO) regulator to suppress the AES current signature by ${>}200 \times $ in the supply current traces. The shunt LDO has been fabricated and validated in 130 nm CMOS technology. System-level implementation of the ASNI, with the AES-128 core operating at 40 MHz, shows that the system remains secure even after 1 M encryptions, with $\sim 25 \times $ reduction in power overhead compared to that of noise addition alone.