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Showing papers in "IEEE Transactions on Circuits and Systems Ii-express Briefs in 2019"


Journal ArticleDOI

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TL;DR: Simulation results indicate that the HNC-PNMCC is better than the PNMCC, MCC, and sparse MCC with respect to the estimation performance for the cluster-sparse system identification under the impulsive noises.
Abstract: A blocked proportionate normalized maximum correntropy criterion (PNMCC) is presented to improve the estimation behavior of the traditional maximum correntropy criterion (MCC) algorithm for identifying the blocked sparse systems. The proposed blocked MCC is implemented by constructing a new cost function based on a hybrid-norm constraint (HNC) of the filter coefficient vector to adaptively utilize the cluster-sparse characteristic of unknown systems, denoting as hybrid-norm constrained PNMCC (HNC-PNMCC). The proposed HNC-PNMCC algorithm is achieved by using the basis pursuit. Various simulations are brought out to confirm the validity of the HNC-PNMCC. Simulation results indicate that the HNC-PNMCC is better than the PNMCC, MCC, and sparse MCC with respect to the estimation performance for the cluster-sparse system identification under the impulsive noises.

73 citations


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TL;DR: By employing the Lyapunov method, some sufficient conditions are derived to guarantee the exponential synchronization of Lur’e networks with synchronizing impulses and desynchronizing impulses simultaneously.
Abstract: This brief focuses on the pinning synchronization problem of impulsive Lur’e networks with nonlinear and asymmetrical coupling. In order to study the situation in which synchronizing impulses and desynchronizing impulses are allowed to occur simultaneously, a single pinning impulsive controller is designed to investigate the synchronization of Lur’e networks with hybrid impulses based on the methods of average impulsive interval and average impulsive gain. By employing the Lyapunov method, some sufficient conditions are derived to guarantee the exponential synchronization of Lur’e networks with synchronizing impulses and desynchronizing impulses simultaneously. Two numerical examples are given to illustrate the results.

58 citations


Journal ArticleDOI

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TL;DR: A novel aperiodic adaptive event-triggered communication mechanism is introduced to reduce the transmission load, which covers the previous ones as special cases and derives a new synchronization criterion, which depends on both the upper and lower bounds of variable sampling interval.
Abstract: This brief deals with the problem of master–slave synchronization for chaotic Lur’e systems with aperiodic sampled data. Specifically, a novel aperiodic adaptive event-triggered communication mechanism is introduced to reduce the transmission load, which covers the previous ones as special cases. By partially resorting to the time-dependent Lyapunov function, a new synchronization criterion is derived, which depends on both the upper and lower bounds of variable sampling interval. Finally, Chua’s circuit system is chosen as an illustrative example to show the virtue and effectiveness of the achieved synchronization strategies.

53 citations


Journal ArticleDOI

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TL;DR: The results show that, in order to enhance the robustness of power grids, it is better to make the network sparsely connected, and place the generators as hubs and decentralize these generators.
Abstract: In recent years, the frequent occurrences of large-scale blackouts highlight the necessity of enhancing the robustness of power grids. In this brief, based on the cascading failure model which considers both the network topology and electrical characteristics running in power grids, we study how the topological metrics affect the robustness of power grids. The topological metrics considered include both the connectivity of the network and the distribution of generators. We compare the results in typical complex network models and an IEEE 118-bus network. Moreover, by using the simulated annealing method, we find the optimal network topology to achieve the best network robustness, and compare the topological metrics before and after the optimization to verify our findings. The results show that, in order to enhance the robustness of power grids, it is better to make the network sparsely connected, and place the generators as hubs and decentralize these generators.

52 citations


Journal ArticleDOI

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TL;DR: Even if all the subsystems governing the continuous dynamics are not stable and some of the switching behaviors are destabilizing, the stability of the switched system can still be retained and the switching stabilization problem for linear context is solved.
Abstract: This brief studies the stability of switched systems in which all the subsystems may be unstable. In addition, some of the switching behaviors of the systems are destabilizing. By using the piecewise Lyapunov function method and taking a tradeoff between the increasing scale and the decreasing scale of the Lyapunov function at switching times, the maximum dwell time for admissible switching signals is obtained and the extended stability results for switched systems in a nonlinear setting are first derived. Then, based on the discretized Lyapunov function method, the switching stabilization problem for linear context is solved. By contrasting with the contributions available in the literature, we do not require that all the switching behaviors of the switching system under consideration are stabilizing. More specifically, even if all the subsystems governing the continuous dynamics are not stable and some of the switching behaviors are destabilizing, the stability of the switched system can still be retained. A numerical example is given to illustrate the validity of the proposed results.

48 citations


Journal ArticleDOI

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TL;DR: A new special low-complexity QCA 4:1 multiplexer, which is application-specific to the proposed ALU, and a new QCA full adder is proposed based on the cell interaction, which outperform in comparison to counterpart designs in terms of cell number, area, latency, and power consumption.
Abstract: Quantum-dot cellular automata (QCA) is a new nano-scale technology that due to making significant improvements in the design of electronic circuits can be considered as an appropriate alternative to CMOS technology. The arithmetic logic unit (ALU) is a fundamental component of the central processing unit to carry out the arithmetic and logical operations that multiplexer and full adder play an important role in its operations. In this brief, based on the extracted features of the arithmetic operations of the ALU, we propose a new special low-complexity QCA 4:1 multiplexer, which is application-specific to the proposed ALU. Moreover, a new QCA full adder is proposed based on the cell interaction. Likewise, a QCA multilayer ALU structure is designed based on the validated proposed structures to carry out four logical and eight arithmetic operations. The functional correctness of the proposed structures are evaluated by QCADesigner tool; also, QCAPro as an accurate power estimator tool is applied to investigate their power dissipation. The simulation results demonstrate that the proposed structures outperform in comparison to counterpart designs in terms of cell number, area, latency, and power consumption.

46 citations


Journal ArticleDOI

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TL;DR: Two new iterative approaches for solving the power flow problem in direct current networks as efficient alternatives to the classical Gauss–Seidel and Newton–Raphson methods are proposed.
Abstract: This express brief proposes two new iterative approaches for solving the power flow problem in direct current networks as efficient alternatives to the classical Gauss–Seidel and Newton–Raphson methods. The first approach works with the set of nonlinear equations by rearranging them into a conventional fixed point form, generating a successive approximation methodology. The second approach is based on Taylors series expansion method by using a set of decoupling equations to linearize the problem around the desired operating point; these linearized equations are recursively solved until reach the solution of the power flow problem with minimum error. These two approaches are comparable to the classical Gauss–Seidel method and the classical Newton–Raphson method, respectively. Simulation results show that the proposed approaches have a better performance in terms of solution precision and computational requirements. All the simulations were conducted via MATLAB software by using its programming interface.

42 citations


Journal ArticleDOI

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Xiangyi Wei1, Wenwu Yu1, He Wang1, Yiyang Yao, Feng Mei 
TL;DR: With the proposed observer, the state information can be exactly estimated through output information in fixed time with the effects of bounded disturbances, and the second-order multi-agent system can also reach consensus in fixedtime without using any velocity information.
Abstract: This brief considers the fixed-time consensus problem of second-order multi-agent systems with disturbances. With the proposed observer, the state information can be exactly estimated through output information in fixed time with the effects of bounded disturbances, and the second-order multi-agent system can also reach consensus in fixed time without using any velocity information. Finally, a numerical example is given to illustrate the effectiveness of the theoretical result.

42 citations


Journal ArticleDOI

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TL;DR: An improved averaged small-signal model of pulse-width modulated dc-dc power converters operated in continuous-conduction mode, which includes a resistance that corresponds to the switching power loss, is proposed, based on the principle of conservation of energy.
Abstract: This brief proposes an improved averaged small-signal model of pulse-width modulated dc-dc power converters operated in continuous-conduction mode, which includes a resistance that corresponds to the switching power loss. Through this model, the switching power loss can be incorporated into existing averaged small-signal dynamic models. The proposed approach is based on the principle of conservation of energy. The expressions for the equivalent switching-loss resistance for the basic converter topologies are derived. The improved dc and small-signal models of the switching network are given. A boost dc-dc converter is considered as an example. The effect of the switching-loss resistance on the small-signal control-to-output transfer function is shown. Experimental results are given and the theoretical predictions have been validated.

41 citations


Journal ArticleDOI

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TL;DR: This express brief shows a convex quadratic approximation for the optimal power flow (OPF) in direct-current microgrids (dc- ${\mu }$ Grid) via Taylor’s series expansion.
Abstract: This express brief shows a convex quadratic approximation for the optimal power flow (OPF) in direct-current microgrids (dc- ${\mu }$ Grid) via Taylor’s series expansion This approach can be used for solving OPF problems on radial and meshed dc- ${\mu }$ Grids with multiple constant power terminals, allowing to cover a wide range of configurations Two test dc- ${\mu }$ Grids with 10 and 21 nodes were used to validate the proposed model Nonlinear large-scale solvers were employed to compare the proposed linearization with the conventional nonlinear nonconvex model

41 citations


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TL;DR: This brief is concerned with the secure control problem of cyber-physical systems under denial-of-service (DoS) attacks, and a novel packet-based control method is proposed to resist DoS attacks.
Abstract: This brief is concerned with the secure control problem of cyber-physical systems under denial-of-service (DoS) attacks. Considering the energy constraints of the attackers, it is reasonable to assume that the maximum number of consecutive DoS attacks is bounded. According to the packet-based transmission scheme, a novel packet-based control method is proposed to resist DoS attacks. By constructing a nested switching model, several stability conditions are derived, which are dependent on the number of consecutive attacks. Furthermore, a controller design method is developed based on the linear matrix inequalities. Finally, a smart gird example is employed to show the effectiveness of the proposed method.

Journal ArticleDOI

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TL;DR: A wideband noise-cancelling low-noise amplifier (LNA) combining resistor feedback and source-follower feedback (SFF) is proposed, which facilitates upsizing of the feedback resistor to improve the gain and noise figure (NF), without compromising the input-impedance matching.
Abstract: A wideband noise-cancelling low-noise amplifier (LNA) combining resistor feedback and source-follower feedback (SFF) is proposed. The SFF facilitates upsizing of the feedback resistor to improve the gain and noise figure (NF), without compromising the input-impedance matching. Another benefit is that the noise contributions of both the feedback resistor and noise-cancelling transistors are significantly reduced. Fabricated in 65-nm CMOS, the LNA exhibits a voltage gain of 16.8 dB, and a flat NF of 3.3 ± 0.45 dB over a −3-dB bandwidth of 0.5 to 7 GHz. The power consumption is 11.3 mW at 1.2 V, and the die area is 0.044 mm2.

Journal ArticleDOI

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TL;DR: A distributed convex optimization problem over a weight-unbalanced directed network is studied in this brief, where the global objective function is equal to the sum of strongly convex objective functions with globally Lipschitz gradients.
Abstract: A distributed convex optimization problem over a weight-unbalanced directed network is studied in this brief, where the global objective function is equal to the sum of strongly convex objective functions with globally Lipschitz gradients. With respect to the optimization problem, a new continuous-time coordination algorithm is proposed to compute its optimal solution in a distributed manner. The asymptotical convergence of the proposed algorithm is guaranteed by resorting to the direct sum decomposition technique, Kronecker matrix algebra, the stability of perturbed systems, and input-to-state stability. Finally, some simulations are performed to illustrate the theoretical result.

Journal ArticleDOI

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TL;DR: If the signed directed graph contains a directed spanning tree rooted at the leader node, then the designed consensus protocol simultaneously stabilizes both the bipartite consensus error and observer estimation error with the errors converging to a small bounded set.
Abstract: In this brief, leader–follower bipartite consensus of a group of linear multiagent systems is studied over a signed directed graph where all the followers are subjected to mismatched unknown bounded disturbances. To that end, a distributed extended state observer where the disturbances are the extended state and a distributed relative output feedback consensus control law are designed to achieve bipartite consensus. With the suitable design of scaler coupling gain parameters, and feedback gain and observer gain matrices obtained from linear matrix inequalities, it is shown that if the signed directed graph contains a directed spanning tree rooted at the leader node, then the designed consensus protocol simultaneously stabilizes both the bipartite consensus error and observer estimation error with the errors converging to a small bounded set. The simulation results verify the effectiveness of the proposed method.

Journal ArticleDOI

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TL;DR: The authors study the fixed-time consensus problem for a class of first-order nonlinear multi-agent systems where the communication topologies are general directed and propose two algorithms to solve the problem.
Abstract: In this brief, the authors study the fixed-time consensus problem for a class of first-order nonlinear multi-agent systems where the communication topologies are general directed. Both fixed-time tracking consensus and fixed-time leaderless consensus problems are investigated. For the leader–follower situation, the communication topology is only required to contain a directed spanning tree. As for the leaderless situation, the topology is required strongly connected. Simulations are finally provided to verify the effectiveness of the proposed algorithms.

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TL;DR: It is shown that VCII is a very useful block in those configurations where CCII is limited, in terms of number of active blocks, and the CMOS implementation of VCII, for the first time, is presented.
Abstract: This brief presents a comprehensive study on a particular kind of conveyor called second-generation voltage conveyor (VCII) This building block is based on voltage conveying concept and is the dual of second generation current conveyor (CCII) It is shown that VCII is a very useful block in those configurations where CCII is limited, in terms of number of active blocks The results of this brief are helpful in choosing the best building block between CCII and VCII for each specific application Finally, for the first time, the CMOS implementation of VCII is also presented Simulation results with PSPICE using 035- ${\mu }\text{m}$ CMOS technology and supply voltage of ±165 V are given to approve the theory

Journal ArticleDOI

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Xiao-Kun Bi1, Teng Cheng1, Pedro Cheong1, Sut-Kam Ho1, Kam-Weng Tam1 
TL;DR: Based on a novel microstrip terminated cross-shaped resonator (TCSR), the dual-band bandpass filters (DB-BPFs) with fixed and reconfigurable bandwidths are proposed in this brief.
Abstract: Based on a novel microstrip terminated cross-shaped resonator (TCSR), the dual-band bandpass filters (DB-BPFs) with fixed and reconfigurable bandwidths are proposed in this brief. In addition to the basic TCSR’s three poles and four zeros, the extra four poles and three zeros can be introduced with the help of a pair of symmetrical parallel-coupled lines and open-ended stubs. Therefore, a planar DB-BPF with multiple transmission poles and zeros can be realized. To achieve the reconfigurable bandwidths, a capacitor is inserted into the basic TCSR’s lower stub. It is found that the lower bandedge of the first passband can be tuned while the other three bandedges are kept unchanged. Two prototypes, including fixed-bandwidth filter (Filter I) with 3-dB fractional bandwidths (FBWs) of 20.8% and 17.3%, and reconfigurable-bandwidth filter (Filter II) with 3-dB FBW variation from 22.5% to 34.7% for the first passband and 19.8% for the second passband, are designed, fabricated, and experimentally characterized. The experimental characterizations of these two filters verify the proposed design.

Journal ArticleDOI

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TL;DR: The purpose of the problem addressed is to design a set of set-membership filters such that, in the simultaneous presence of mixed time-delays, state saturation, WTOD protocol and bounded noises, the filtering error dynamics is confined to certain ellipsoid regions.
Abstract: This brief is concerned with the set-membership filtering problem for a class of time-varying state-saturated systems with mixed time-delays under the communication protocol. Under the weighted try-once-discard (WTOD) protocol, only the sensor node with the largest measurement difference is allowed to access the shared communication network at each transmission instant. The purpose of the problem addressed is to design a set of set-membership filters such that, in the simultaneous presence of mixed time-delays, state saturation, WTOD protocol and bounded noises, the filtering error dynamics is confined to certain ellipsoid regions. A sufficient condition is derived to guarantee the existence of the desired set-membership filters by means of the solutions to a set of recursive linear matrix inequalities. Subsequently, an optimization problem subject to certain inequality constraints is put forward to acquire the minimized ellipsoid in the sense of matrix trace. A simulation example is presented to illustrate the effectiveness of the proposed filter design scheme.

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TL;DR: The classic Lagrangians are generalized to a wider class of functions that satisfies the strong duality between primal and dual problems and the generalized Karush–Kuhn–Tucker conditions for this generalized Lagrange multiplier method are derived.
Abstract: The Lagrange multiplier method is widely used for solving constrained optimization problems. In this brief, the classic Lagrangians are generalized to a wider class of functions that satisfies the strong duality between primal and dual problems. Then the generalized Karush–Kuhn–Tucker conditions for this generalized Lagrange multiplier method are derived. This useful method has applications in optimization problems and designs of consensus protocols, which is demonstrated by proposing a new continuous-time algorithm and its distributed version for optimization. The convergence advantages of the distributed algorithm are shown in a simulation example.

Journal ArticleDOI

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TL;DR: This brief addresses the numerical approximation of the maximum power consumption in direct-current microgrids (DC-MGs) with constant power loads through a convex optimizing model through a semidefinite programming model.
Abstract: This brief addresses the numerical approximation of the maximum power consumption in direct-current microgrids (DC-MGs) with constant power loads through a convex optimizing model. The convex formulation is developed via a semidefinite programming model and is solved by using a MATLAB/CVX package. For comparison purposes the exact nonlinear model is solved in a GAMS package to compare the accuracy and quality of the results obtained with the proposed convex reformulation. Numerical testing is made with a small three-node DC-MG test system as well as DC-MGs from 10 to 150 nodes.

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TL;DR: A photovoltaic energy harvester that adopts the fractional open-circuit voltage method to track the maximal power point of PV cells is proposed, and it is suitable for Internet-of-Things applications.
Abstract: A photovoltaic (PV) energy harvester is proposed, and it adopts the fractional open-circuit voltage method to track the maximal power point of PV cells. The proposed harvester was designed and fabricated by using a 0.18- ${\mu }\text{m}$ 1P6M mixed-signal process. The input voltage of the proposed harvester may range from 0.5 to 1.1 V, and its measured peak total efficiency is 93.4%. The proposed harvester is suitable for Internet-of-Things applications, and the maximal duty cycle it can afford for a device with a 5-mA load and 20-ms activation time is 50%.

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TL;DR: The anti-windup strategy is constructed to make the dynamical system achieves SSY and maximize the domain of attraction and the simulation results of the practical system show the validity of the proposed Lyapunov function method.
Abstract: In this brief, we consider the anti-windup design for stochastic semi-Markovian switching systems (S-MSSs) with saturation nonlinearity and stochastic disturbance. In the system under consideration, stochastic S-MSSs with the semi-Markovian process can describe more complex systems in a practical control process. The main motivation of this brief is that the practical system described by stochastic S-MSSs always needs to consider the actuator saturation. To deal with this kind of complex problem, sufficient conditions for stochastic stability (SSY) analysis is developed by the Lyapunov function method. Then, the anti-windup strategy is constructed to make the dynamical system achieves SSY and maximize the domain of attraction. Finally, the simulation results of the practical system show the validity of the proposed method.

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TL;DR: This work presents a novel method that aims to forecast the power consumption of a single house, or a set of houses, based on non-intrusive load monitoring (NILM) and graph spectral clustering and shows that the method is more accurate compared to popular existing approaches.
Abstract: Forecasting energy or power usage is an important part of providing a stable supply of power to all customers on a power grid. We present a novel method that aims to forecast the power consumption of a single house, or a set of houses, based on non-intrusive load monitoring (NILM) and graph spectral clustering. In the proposed method, the aggregate power signal is decomposed into individual appliance signals and each appliance’s power is forecasted separately. Then the total power forecast is formed by aggregating forecasted power levels of individual appliances. We use four publicly available datasets (reference energy disaggregation dataset, rainforest automation energy, almanac of minutely power dataset version 2, tracebase ) to test our forecasting method and report its accuracy. The results show that our method is more accurate compared to popular existing approaches, such as autoregressive integrated moving average, similar profile load forecast, artificial neural network, and recent NILM-based forecasting.

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TL;DR: It will be shown that the proposed decoder built upon the BVG model is superior to other decoders in terms of rate of error and provides higher robustness in presence of attacks such as filtering, compression, cropping, scaling, and noise.
Abstract: Data security is a main concern in everyday data transmissions in the Internet. A possible solution to guarantee a secure and legitimate transaction is via hiding a piece of tractable information into the multimedia signal, i.e., watermarking. This brief proposes a new multiplicative image watermarking scheme in the contourlet domain by taking into account the local statistical properties and inter-scale dependencies of the contourlet coefficients of images. Although the contourlet coefficients are non-Gaussian within a sub-band, their local distribution fits the Gaussian distribution very well. In addition, it is known that there exist across-scale dependencies among these coefficients. In view of this, we propose the use of bivariate Gaussian (BVG) distribution to model the distribution of the contourlet coefficients. Motivated by the modeling results, an optimum blind watermark decoder is designed in the contourlet domain using the maximum likelihood method. By means of carrying out a number of experiments, the performance of the proposed decoder is investigated with regard to the bit error rate and compared to other decoders. It will be shown that the proposed decoder built upon the BVG model is superior to other decoders in terms of rate of error. It will also be shown that the proposed decoder provides higher robustness in comparison to other decoders in presence of attacks such as filtering, compression, cropping, scaling, and noise.

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TL;DR: A new exponential stability criterion is derived in terms of linear matrix inequalities for the resulting closed-loop system and a design method of the proposed controller can assure that the output signals of the system trace the specified reference signals within the preferred neighborhood of the equilibrium.
Abstract: The objective of this brief is to focus on the problem of output tracking control for a class of fractional-order positive switched systems via an observer-based controller method that combines equivalent-input-disturbance approach and Smith predictor. By employing Lyapunov theory together with average dwell-time approach, a new exponential stability criterion is derived in terms of linear matrix inequalities for the resulting closed-loop system. Based on the derived delay-dependent criterion, a design method of the proposed controller is then presented. The designed controller can assure that the output signals of the system trace the specified reference signals within the preferred neighborhood of the equilibrium. Furthermore, the solvability inclusive conditions for the proposed controller design of the considered system are established according to the state being available or not. Numerical simulation results are provided to demonstrate the strong disturbance rejection capability and the superiority of the proposed control design method over some existing ones.

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TL;DR: An ultra-low-power level-crossing analog-to-digital converter (LC-ADC) with on-chip adaptive sampling is presented, which uses sparsity of signals for low power data acquisition and is implemented with only one scaler and one high-precision comparator, in sharp contrast to conventional LC-ADCs that require an n-bit digital- to-analog converter and two comparators.
Abstract: An ultra-low-power level-crossing analog-to-digital converter (LC-ADC) with on-chip adaptive sampling is presented. Different from conventional ADCs based on Nyquist sampling, LC-ADC utilizes sparsity of signals for low power data acquisition. To save power, the proposed adaptive sampling scheme is implemented with only one scaler and one high-precision comparator, which is in sharp contrast to conventional LC-ADCs that require an n-bit digital-to-analog converter and two comparators. Implemented in 0.18- $\mu {\mathrm{ m}}$ CMOS process, the proposed ADC consumes only 61 nW under 0.5V supply, and achieves 5.6 bits equivalent numbers of bits and 35 dB signal-to-noise and distortion ratio with an operating frequency up to 1 kHz.

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TL;DR: A uniform modeling method for the neutral point clamped (NPC)-three-level converter based on open-circuit faults analysis is proposed, which integrates rectifier, inverter, and DC-link models and can represent the converter in normal condition as well as in open- Circuit fault conditions.
Abstract: A uniform modeling method for the neutral point clamped (NPC)-three-level converter is proposed based on open-circuit faults analysis The main contributions of this brief are twofold One is the proposed model can represent the converter not only in the normal condition but also the abnormal conditions that open-circuit faults occurring in any insulated gate bipolar transistors The other is the model can be used for real-time simulation purposes First, the NPC-three-level converter is simplified to a switch equivalent circuit by introducing the switch functions Second, when the open-circuit faults occur, current paths of the NPC-three-level converter are analyzed and the values of switch functions with the open-circuit faults in the converter are acquired The values of the switch functions in normal condition are obtained as well Then, the uniform model of NPC-three-level converter is established, which integrates rectifier, inverter, and DC-link models The uniform model can represent the converter in normal condition as well as in open-circuit fault conditions The effectiveness and accuracy of the proposed model have been verified by simulation and experiment results

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TL;DR: In this paper, the authors proposed an extremely energy-efficient mixed-signal vector-by-matrix multiplication (VMM) in a time domain, where multi-bit inputs/outputs are represented with time-encoded digital signals, while multi-bits matrix weights are realized with adjustable current sources, e.g., transistors biased in subthreshold regime.
Abstract: We propose an extremely energy-efficient mixed-signal ${N} \times {N}$ vector-by-matrix multiplication (VMM) in a time domain. Multi-bit inputs/outputs are represented with time-encoded digital signals, while multi-bit matrix weights are realized with adjustable current sources, e.g., transistors biased in subthreshold regime. The major advantage of the proposed approach over other types of mixed-signal implementations is very compact peripheral circuits, which would be essential for achieving high energy efficiency and speed at the system level. As a case study, we have designed a multilayer perceptron, based on two layers of 10 $ \times $ 10 four-quadrant multipliers, in 55-nm process with embedded NOR flash memory technology, which allows for compact implementation of adjustable current sources. Our analysis, based on memory cell measurements, shows that >6 bit operation can be ensured for larger ( ${N} >$ 50) VMMs. Post-layout estimates for 55-nm 6-bit VMM, which take into account the impact of PVT variations, noise, and overhead of I/O circuitry for converting between conventional digital and time domain representations, show ~7 fJ/Op for ${N} >$ 500. The energy efficiency can be further improved to POp/J regime for more optimal and aggressive designs.

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TL;DR: This work proposes a 2FeFET TCAM design based on a state-of-the-art, experimentally calibrated FeFET model that requires less write energy than CMOS/resistive random access memory (ReRAM) TCAMs, respectively.
Abstract: Ternary content addressable memories (TCAMs) represent a form of logic-in-memory and are currently widely used in routers, caches, and efficient machine learning models. From a technology prospective, researchers have begun to consider various non-volatile (NV) memory technologies to design NV TCAMs that may offer improvements with respect to figures of merit, such as energy and delay when compared to conventional CMOS designs. Among these devices, ferroelectric field effect transistors (FeFETs) stand out due to their high $ {I}_{\text {ON}}/{I}_{\text {OFF}}$ ratio, efficient voltage-driven write mechanism, low-cost, and CMOS-compatible fabrication process. We propose a 2FeFET TCAM design based on a state-of-the-art, experimentally calibrated FeFET model. We evaluate and compare our design with other TCAMs at the cell and array levels. Our results suggest that a 2FeFET TCAM requires $3.5{\times }/3200 {\times }$ less write energy than CMOS/resistive random access memory (ReRAM) TCAMs, respectively. The cell area is 13% of that of a CMOS TCAM, and is on par with ReRAM designs. The search energy-delay-product of a 2FeFET TCAM is also $4.1 {\times }/2.8 {\times }$ less than CMOS/ReRAM TCAMs, respectively.

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TL;DR: This brief presents a low-power fast-transient capacitor-less low-dropout regulator (CL-LDO) for system-on-a-chip applications and aLow-quiescent-current class-AB amplifier with embedded slew-rate enhancement (SRE) circuit is proposed to improve both current efficiency and load transient performance.
Abstract: This brief presents a low-power fast-transient capacitor-less low-dropout regulator (CL-LDO) for system-on-a-chip applications. A low-quiescent-current class-AB amplifier with embedded slew-rate enhancement (SRE) circuit is proposed to improve both current efficiency and load transient performance. As the SRE circuit is directly controlled by the amplifier, only a minimum hardware overhead is required. The proposed CL-LDO is fabricated in a 0.18- ${\mu }\text{m}$ standard CMOS process. It occupies an active area of 0.031 mm2 and consumes a quiescent current of $10.2~\mu \text{A}$ . It is capable of delivering a maximum load current of 100 mA at 1.0-V output from a 1.2-V power supply. The measured results show that a settling time of $0.22~\mu \text{s}$ is achieved for load steps from 1 mA to 100 mA (and vice versa) with an edge time of $0.1~\mu \text{s}$ .