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Showing papers in "IEEE Transactions on Components and Packaging Technologies in 1994"



Journal Article
TL;DR: In this paper, a split-gate flash EEPROM cell that relies on enhanced hot-electron injection onto the floating gate for fast 5 V-only programming is presented.
Abstract: This paper presents a split-gate flash EEPROM cell that relies on enhanced hot-electron injection onto the floating gate for fast 5 V-only programming. The device is referred to as the High Injection MOS (or HIMOS) cell and is fabricated in a 0.7-/spl mu/m double polysilicon CMOS technology with minor additions to the standard CMOS process flow. The cell has been optimized for a virtual ground array configuration in order to shrink the area down to the range of 10-20 /spl mu/m/sup 2/ per bit. An extensive study is presented of the influence of applied programming voltages and device geometry on cell performance. It is shown that, for a cell area of 16.5 /spl mu/m/sup 2/, microsecond programming can be achieved with a program-gate voltage of 12 V and 5 V-only operation. Furthermore, during programming the unique features of the HIMOS cell result in very low drain current (approximately 25 /spl mu/A per cell for 5 V-only operation) and a correspondingly low power consumption. It is shown experimentally that the combination of high programming efficiency with low power consumption indicates that 3.3 V-only operation is already viable in 0.7-/spl mu/m technology. In addition, a detailed study of the various possible disturb effects confirms the reliability of the HIMOS technology, and the feasibility of using a virtual ground array for this memory cell. >

1 citations