Showing papers in "IEEE Transactions on Components and Packaging Technologies in 2008"
TL;DR: The thermal challenges in next-generation electronic systems, as identified through panel presentations and ensuing discussions at the workshop, Thermal Challenges in Next Generation Electronic Systems, held in Santa Fe, NM, January 7-10, 2007, are summarized in this article.
Abstract: Thermal challenges in next-generation electronic systems, as identified through panel presentations and ensuing discussions at the workshop, Thermal Challenges in Next Generation Electronic Systems, held in Santa Fe, NM, January 7-10, 2007, are summarized in this paper. Diverse topics are covered, including electrothermal and multiphysics codesign of electronics, new and nanostructured materials, high heat flux thermal management, site-specific thermal management, thermal design of next-generation data centers, thermal challenges for military, automotive, and harsh environment electronic systems, progress and challenges in software tools, and advances in measurement and characterization. Barriers to further progress in each area that require the attention of the research community are identified.
368 citations
Abstract: The size and crystal orientation of Sn grains in Pb-free, near eutectic Sn-Ag-Cu solder joints were examined. A clear dependence of the thermomechanical fatigue response of these solder joints on Sn grain orientation was observed (Sn has a body centered tetragonal crystal structure). Fabricated joints tend to have three orientations in a cyclic twin relationship, but among the population of solder balls, this orientation triplet appears to be randomly oriented. In thermally cycled joints, solder balls with dominant Sn grains having the particular orientation with the c-axis nearly parallel to the plane of the substrate were observed to fail before neighboring balls with different orientations. This results from the fact that the coefficient of thermal expansion of Sn in the basal plane (along the alpha-axis) is half the value along the c-axis; joints observed to be damaged had the maximum coefficient of thermal expansion mismatch between solder and substrate at the joint interface, as well as a tensile stress modes during the hot part of the thermal cycle. Localized recrystallization was observed in regions of maximum strain caused by differential expansion conditions, and its connection with crack nucleation is discussed.
266 citations
TL;DR: In this article, the authors examined the commonly-used thermal-moisture analogy approach in thermal-mixture analogy approach and concluded that such an analogy using a normalized concentration approach does not exist in the case of soldering reflow, when the solubility of each diffusing material varies with temperature or the saturated moisture concentration is not a constant over an entire range of reflow temperatures.
Abstract: This paper first examines the commonly-used thermal-moisture analogy approach in thermal-moisture analogy approach. We conclude that such an analogy using a normalized concentration approach does not exist in the case of soldering reflow, when the solubility of each diffusing material varies with temperature or the saturated moisture concentration is not a constant over an entire range of reflow temperatures. The whole field vapor pressure distribution of a flip chip BGA package at reflow is obtained based on a multiscale vapor pressure model. Results reveal that moisture diffusion and vapor pressure have different distributions and are not proportional. The vapor pressure in the package saturates much faster than the moisture diffusion during reflow. This implies that the vapor pressure reaches the saturated pressure level in an early stage of moisture absorption, even the package is far from moisture saturated. However, the interfacial adhesion degrades continuously with moisture absorption. Therefore, the package moisture sensitivity performance will largely reply on the adhesion strength at elevated temperature with moisture. A specially designed experiment with a selection of six different underfills for flip chip packages was conducted. Results confirm that there is no correlation between moisture absorption and the subsequent interface delamination at reflow. The adhesion at high temperature with moisture is the only key modulator that correlates well with test data. Such a parameter is a comprehensive indicator, which includes the effects of thermal mismatch, vapor pressure, temperature and moisture. In this paper, a micromechanics based mechanism analysis on interfacial delamination is also presented. With the implementation of interface properties into the model study, it shows that the critical stress, which results in the unstable void growth and delamination at interface, is significantly reduced when the effect of moisture on debonding is considered.
100 citations
TL;DR: In this paper, a numerical investigation of 3D fluid flow and heat transfer in a rectangular micro-channel was carried out using water as a cooling fluid in a silicon substrate, and the shape of the micro channel was optimized using surrogate methods.
Abstract: A numerical investigation of 3D fluid flow and heat transfer in a rectangular micro-channel has been carried out using water as a cooling fluid in a silicon substrate. Navier-Stokes and energy equations for laminar flow and conjugate heat transfer are solved using a finite volume solver. Solutions are first carefully validated with available analytical and experimental results; the shape of the micro-channel is then optimized using surrogate methods. Ratios of the width of the micro-channel to the depth and the width of the fin to the depth are selected as design variables. Design points are selected through a four-level full factorial design. A single objective function thermal resistance, formulated using pumping power as a constraint, is optimized. Mass flow rate is adjusted by the constant pumping power constraint. Response surface approximation, kriging, and radial basis neural network methods are applied to construct surrogates and the optimum point is searched by sequential quadratic programming.
100 citations
TL;DR: In this article, the authors developed constitutive models of Sn3.8Ag0.7Cu and Sn1.0Ag 0.5Cu solder alloys, which represent the extremes of Ag composition that have been mooted at the present time.
Abstract: Constitutive models for SnAgCu solder alloys are of great interest at the present. Commonly, constitutive models that have been successfully used in the past for Sn-Pb solders are used to describe the behavior of SnAgCu solder alloys. Two issues in the modeling of lead-free solders demand careful attention: 1) Lead-free solders show significantly different creep strain evolution with time, stress and temperature, and the assumption of evolution to steady state creep nearly instantaneously may not be valid in SnAgCu alloys and 2) Models derived from bulk sample test data may not be reliable when predicting deformation behavior at the solder interconnection level for lead-free solders due to the differences in the inherent microstructures at these different scales. In addition, the building of valid constitutive models from test data derived from tests on solder joints must de-convolute the effects of joint geometry and its influence on stress heterogeneity. Such issues have often received insufficient attention in prior constitutive modeling efforts. In this study all of the above issues are addressed in developing constitutive models of Sn3.8Ag0.7Cu and Sn1.0Ag0.5Cu solder alloys, which represent the extremes of Ag composition that have been mooted at the present time. The results of monotonic testing are reported for strain rates ranging from 4.02E-6 to 2.40E-3 s-1. The creep behavior at stress levels ranging from 7.8 to 52 MPa is also described. Both types of tests were performed at temperatures of 25degC, 75degC and 125degC. The popular Anand model and the classical time-hardening creep model are fit to the data, and the experimentally obtained model parameters are reported. The test data are compared against other reported data in the literature and conclusions are drawn on the plausible sources of error in the data reported in the prior literature.
89 citations
TL;DR: In this article, a statistical pattern recognition and leading indicators of shock damage have been used to study the damage initiation and progression in shock and drop of electronic assemblies, thus removing the limitation of current failure testing where the damage progression cannot be monitored.
Abstract: Electronic products may be subjected to shock and vibration during shipping, normal usage, and accidental drop High strain rate transient bending produced by such loads may result in failure of fine pitch electronic interconnects Current experimental techniques rely on electrical resistance for determination of failure Significant advantage can be gained by prior knowledge of impending failure for applications where the consequences of system failure may be catastrophic This research effort focuses on an alternate approach to damage quantification in electronic assemblies subjected to shock and vibration, without testing for electrical continuity The proposed approach can be extended to monitor product level damage In this paper, statistical pattern recognition and leading indicators of shock damage have been used to study the damage initiation and progression in shock and drop of electronic assemblies Statistical pattern recognition is currently being employed in a variety of engineering and scientific disciplines such as biology, psychology, medicine, marketing, artificial intelligence, computer vision, and remote sensing The application quantification of shock damage in electronic assemblies is new Previously, free vibration of rectangular plates has been studied by various researchers for development of analytical closed form models In this paper, closed form models have been developed for the eigen frequencies and mode shapes of electronic assemblies with various boundary conditions and component placement configurations Model predictions have been validated with experimental data from modal analysis Pristine configurations have been perturbed to quantify the degradation in confidence values with progression of damage Sensitivity of leading indicators of shock damage to subtle changes in boundary conditions, effective flexural rigidity, and transient strain response has been quantified A damage index for experimental damage monitoring has been developed using the failure indicators The above damage monitoring approach is not based on electrical continuity and hence can be applied to any electronic assembly structure irrespective of the interconnections The damage index developed provides parametric damage progression data, thus removing the limitation of current failure testing, where the damage progression cannot be monitored Hence the proposed method does not require the assumption that the failure occurs abruptly after some number of drops and can be extended to product level drops
84 citations
TL;DR: It is found that it is possible to design a TE solution that will both maximize the COP and minimize the junction temperature, and compared to the more conventional coefficient of performance maximization scheme.
Abstract: Advanced cooling solutions are needed to address the growing challenges posed by future generations of microprocessors. This paper outlines an optimization methodology for electronic system based thermoelectric (TE) cooling. This study stresses that an optimum TE cooling system should keep the electronic device below a critical junction temperature while utilizing the smallest possible heat sink. The methodology considers the electric current and TE geometry that will minimize the junction temperature. A comparison is made between the junction temperature minimization scheme and the more conventional coefficient of performance (COP) maximization scheme. It is found that it is possible to design a TE solution that will both maximize the COP and minimize the junction temperature. Experimental measurements that validate the modeling are also presented.
80 citations
TL;DR: In this article, a failure-envelope approach based on wavelet transforms and damage proxies has been developed to model drop and shock survivability of electronic packaging, which is scalable to application at system level.
Abstract: Product level assessment of drop and shock reliability relies heavily on experimental test methods. Prediction of drop and shock survivability is largely beyond the state-of-art. However, the use of experimental approach to test out every possible design variation, and identify the one that gives the maximum design margin is often not feasible because of product development cycle time and cost constraints. Presently, one of the primary methodologies for evaluating shock and vibration survivability of electronic packaging is the JEDEC drop test method, JESD22-B111 which tests board-level reliability of packaging. However, packages in electronic products may be subjected to a wide-array of boundary conditions beyond those targeted in the test method. In this paper, a failure-envelope approach based on wavelet transforms and damage proxies has been developed to model drop and shock survivability of electronic packaging. Data on damage progression under transient-shock and vibration in both 95.5Sn4.0Ag0.5Cu and 63Sn37Pb ball-grid arrays (BGAs) has been presented. Component types examined include-flex-substrate and rigid substrate BGAs. Dynamic measurements like acceleration, strain and resistance are measured and analyzed using high-speed data acquisition system capable of capturing in-situ strain, continuity and acceleration data in excess of five million samples per second. High-speed video at 150000 fps per second has been used to capture the deformation kinematics. The concept of relative damage index has been used to both evaluate and predict damage progression during transient shock. The failure-envelope provides a fundamental basis for development of component integration guidelines to ensure survivability in shock and vibration environments at a user-specified confidence level. The approach is scalable to application at system-level. Explicit finite-element models have been developed for prediction of shock survivability based on the failure envelope. Model predictions have been correlated with experimental data for both leaded and leadfree BGAs.
78 citations
TL;DR: In this paper, the authors present theoretical and numerical results describing digitized heat transfer (DHT), a newly developing active thermal management technique for high-power density electronics and integrated micro systems.
Abstract: This paper presents theoretical and numerical results describing digitized heat transfer (DHT), a newly developing active thermal management technique for high-power density electronics and integrated micro systems. In describing DHT, we numerically investigate the mass, momentum, and energy equations governing the flow within a translating microdroplet. Our analysis shows the existence of a pair of recirculation zones inside the droplet. This internal circulation within discrete fluid slugs results in significantly increased overall heat transfer coefficients when compared to continuous Graetz-type flows. The internal circulation drives the cold fluid in the middle of the droplet to the vicinity of the walls and creates a higher local temperature difference between the wall and the fluid in contact with the wall, resulting in higher heat transfer rates. Nusselt numbers characterizing DHT flow are also shown to exhibit periodic fluctuations with a period equal to the characteristic time scale for droplet circulation. The overall effect of discretizing a flow on heat transfer capability is described and characterized in terms of a nondimensional circulation number defined by the ratio of characteristic thermal diffusion and fluid circulation time scales. DHT coolants, including liquid metals and alloys, are proposed, and their physical properties are shown to enable handling of significantly higher heat transfer rates than classical air- or water-cooled methods. The actuation method for DHT coolant transport is also outlined, and shown to provide the capability for active, on-demand suppression of transient hot spots. This overall analysis defines the key parameters for optimization of the DHT method and forms the basis of ongoing experimental work.
69 citations
TL;DR: In this article, performances of two-phase cooling of a chip at very high heat flux with refrigerant R236fa in a silicon multimicrochannel heat sink were presented. But the performance of the chip was not compared with an extrapolation of the present results.
Abstract: This paper presents performances of two-phase cooling of a chip at very high heat flux with refrigerant R236fa in a silicon multimicrochannel heat sink. This heat sink was composed of 134 parallel channels, 67 mum wide, 680 mum high, and 20 mm long, with 92- mum -thick fins separating the channels. The base heat flux was varied from 3 to 255 W/cm2 , the volume flow rate from 0.18 to 0.67 I/min, and the exit vapor quality from 0 to 80%. The working pressure and saturation temperature were set at 273 kPa and 25 degC, respectively. The present database includes 1040 local heat transfer coefficients. The base temperature of the chip could be maintained below 52 degC while dissipating 255 W/cm2 with 10 degC of inlet subcooling and 90 kPa of pressure drop. A comparison of the respective performances with an extrapolation of the present results shows that two-phase cooling should be able to cool the chip 13 K lower than liquid cooling for the same pumping power at a base heat flux of 350 W/cm2.
66 citations
TL;DR: In this paper, the authors investigated the use of spacing rules for high-frequency transmission line crosstalk reduction using planar transmission line configurations, such as microstrip and stripline, in printed circuit boards and radio frequency/microwave integrated circuits.
Abstract: High-frequency transmission lines crosstalk reduction using spacing rules is treated in this paper. Two of the most popular planar transmission line configurations, namely microstrip and stripline, commonly used in printed circuit boards and radio frequency/microwave integrated circuits, are considered in this work. The trace separation between two adjacent transmission lines of each type is stepwise increased as function of the trace width. The single-ended transmission line structures are numerically investigated by a frequency-based 3-D full-wave electromagnetic analysis tool. A particular case using coated microstrip transmission lines has been fabricated, along with some calibration structures, to allow direct measurement and experimental analysis of crosstalk between the single-ended transmission lines. The test structures are characterized at high-frequency (up to 20 GHz) with scattering parameters using a vector network analyzer. The experimental results are compared with the simulation data, and some conclusions and suggestions on the impact and use of spacing rules for high-frequency crosstalk reduction between single-ended transmission lines are presented. These investigations emphasize the necessity of reevaluating classical design rules for their suitability in high-frequency applications.
TL;DR: In this article, nonlinear finite element (FE) models using fracture mechanics based J-integral calculations are used to assess the reliability problems of the exposed pad package family, and the results indicate that when diepad delamination is present, cracks are likely to grow beneath the die and dielift will occur.
Abstract: Exposed pad packages were introduced in the late 1980s and early 1990s because of their excellent thermal and electrical performance. Despite these advantages, the exposed pad packages experience a lot of thermo-hygro-mechanical related reliability problems during qualification and testing. Examples are die lift, which occurs predominantly after moisture sensitivity level conditions, and die-attach to leadframe delamination leading to downbond stitch breaks during temperature cycling. In this chapter, nonlinear finite element (FE) models using fracture mechanics based J-integral calculations are used to assess the reliability problems of the exposed pad package family. Using the parametric FE models any geometrical and material effects can be explored to their impact on the occurrence diepad delamination, and dielift. For instance the impact of diepad size is found to be of much less importance as the impact of die thickness is. Using the fracture mechanics approach, the starting location for the delamination from thermo-hygro-mechanical point of view is deducted. The results indicate that when diepad delamination is present, cracks are likely to grow beneath the die and dielift will occur. The interaction between dielift and other failure modes, such as lifted ball bonds, are not found to be very significant. The FE models are combined with simulation-based optimization methods to deduct design guidelines for optimal reliability of the exposed pad family.
TL;DR: In this article, the authors developed an efficient network model that captures the physics of interparticle interactions and allows for random size distributions in the intermediate volume fractions of 30-80%.
Abstract: Particulate composites are commonly used in microelectronics applications. One example of such materials is thermal interface materials (TIMs) that are used to reduce the contact resistance between the chip and the heat sink. The existing analytical descriptions of thermal transport in particulate systems do not accurately account for the effect of interparticle interactions, especially in the intermediate volume fractions of 30%-80%. Another crucial drawback in the existing analytical as well as the network models is the inability to model size distributions (typically bimodal) of the filler material particles that are obtained as a result of the material manufacturing process. While full-field simulations (using, for instance, the finite element method) are possible for such systems, they are computationally expensive. In the present paper, we develop an efficient network model that captures the physics of interparticle interactions and allows for random size distributions. Twenty random microstructural arrangements each of Alumina as well as Silver particles in Silicone and Epoxy matrices were generated using an algorithm implemented using a Java language code. The microstructures were evaluated through both full-field simulations as well as the network model. The full-field simulations were carried out using a novel meshless analysis technique developed in the author's (GS) research [26]. In all cases, it is shown that the random network models are accurate to within 5% of the full field simulations. The random network model simulations were efficient since they required two orders of magnitude smaller computation time to complete in comparison to the full field simulation.
TL;DR: In this paper, the interfacial reliability of a silicon/underfill/FR-4 assembly exposed at 85degC/85%RH was studied using moire interferometry and micro-digital image speckle correlation (mu-DiSC) techniques.
Abstract: The reliability issues have been converted to the underfill adjacent interfaces since the introduction of the underfill to flip chip package in 1990's. Both thermal cycling and hygrothermal conditioning severely attack the interfaces to de- laminate. The moisture migrating into the underfill decreases the adhesion strength, swells to deform the assembly, and weakens the mechanical and thermal properties of the material. In this study, interfacial reliability of a silicon/underfill/FR-4 assembly exposed at 85degC/85%RH was studied using moire interferometry and micro-digital image speckle correlation (mu-DiSC) techniques. A thermal aging study was simultaneously performed to understand the long-term reliability of the assembly. The results showed that the thermal aging relieved the stresses induced by hygrothermal swelling mismatch between dissimilar materials involved, whereas increased the strains induced by hygrothermal swelling. It indicated the time effect is not negligible when the assembly is subjected to the moisture conditioning, otherwise, the deformation induced by the swelling could be overestimated. The mu-DiSC technique was applied to measure the critical interfacial fracture toughness of the silicon/underfill interface. The results showed that the moisture could significantly reduce the interfacial strength due to the break of hydrogen bonding. By combining the moire and mu-DiSC results, it was concluded that the hygrothermal loading could increase the possibility of interfacial delamination in a flip chip package. Finally, the morphologies of the fractured surface were studied with the aid of scanning electron microscope. Remarkable changes of the failure mode were observed.
TL;DR: In this paper, the optimal plate fin design and control for central processing unit (CPU) heat sink processes is considered, where a real-coded genetic algorithm is used to search for an optimal set of plate-fin shape parameters.
Abstract: This paper considers the optimal plate fin design and control for central processing unit (CPU) heat sink processes. First, we apply a finite element method to investigate the heat transfer phenomena of a heat sink process. To have a better heat dispersion performance, a real-coded genetic algorithm is then utilized to search for an optimal set of plate-fin shape parameters. The objective function to be minimized is the entropy generation rate which can take simultaneously the two major factors, heat transfer rate and air resistance, into consideration in the design. The present optimization scheme is able to achieve a better design for heat dispersion than existing methods. To attenuate environmental and time-varying disturbances, a direct adaptive control scheme is then developed for the CPU heat sink process. It is based on using a bounded single neuron controller (SNC) along with a parameter tuning algorithm to regulate the temperature of a selected control point. Extensive comparisons of the SNC-based control performance with the on-off control as well as a PI controller show that the proposed scheme provides excellent control performance despite the existence of unexpected process uncertainties.
TL;DR: In this paper, a finite element model with material properties characterized by dynamic mechanical analyzer and thermomechanical analyzer was established to simulate the thermally-induced deformation of test specimens for understanding mechanics.
Abstract: The objective of this study is to experimentally and numerically investigate thermal and residual deformation of plastic ball grid array (PBGA) package and assembly. Shadow moire was used to measure their real-time out-of-plane deformations (warpages) during heating and cooling conditions. A finite element model with material properties characterized by dynamic mechanical analyzer and thermomechanical analyzer was established to simulate the thermally-induced deformations of test specimens for understanding mechanics. The full-field warpages of the PBGA package and assembly were measured during the temperature cycling. The results show that a maximum warpage with a concave (smiling) shape in both package and assembly occurred at the neighborhood of 155degC during the thermal cycling, rather than with a convex (crying) shape at room temperature by assuming the warpage-free (or stress-free) temperature is at 175degC of molding. This issue has been resolved through the finite element analyses by cooperating into the residual strain (stress) in the epoxy molding compound (EMC) of the package, which is obtained by measuring the residual and thermal deformations of the detached EMC/die bi-material structure. This residual strain of the EMC maybe comes either from the chemical shrinkage of the EMC curing, or possible from stress relaxation of the EMC during the first solder reflow of attaching the solder balls. Furthermore, the consistency of thermal deformations for both the package and assembly obtained from the finite element models indicates that the maximum warpage occurs at the corner of the substrate at near 155degC, rather than at the room temperature, due to the glass transition temperature (Tg) and residual strains of the EMC. This maximum warpage can be mitigated by lowering the residual shrinkage strain. And the warpage of the PBGA assembly coincides with the package at the temperature beyond 155degC (highly resulting from apparent creep of the solder balls), but is larger than that of the package below 155degC, due to constraint of the printed circuit board through less-pronounced creep solder balls.
TL;DR: In this paper, the authors demonstrate the practical multiobjective optimization of plate-fin heat sinks and the superiority of using a combined response surface method and multi-objective evolutionary optimization over solely using the evolutionary optimizer.
Abstract: The work in this paper is aimed at demonstrating the practical multiobjective optimization of plate-fin heat sinks and the superiority of using a combined response surface method and multiobjective evolutionary optimizer over solely using the evolutionary optimizer. The design problem assigned is to minimize a heat sink junction temperature and fan pumping power. Design variables determine a heat sink geometry and inlet air velocity. Design constraints are given in such a way that the maximum and minimum fin heights are properly limited. Function evaluation is carried out by using finite volume analysis software. Two multiobjective evolutionary optimization strategies, real-code strength Pareto evolutionary algorithm with and without the use of a response surface technique, are implemented to explore the Pareto optimal front. The optimum results obtained from both design approaches are compared and discussed. It is illustrated that the multiobjective evolutionary technique is a powerful tool for the multiobjective design of electronic air-cooled heat sinks. With the same design conditions and an equal number of function evaluations, the multiobjective optimizer in association with the response surface technique totally outperforms the other. The design parameters affecting the diversity of the Pareto front include fin thickness, fin height distribution, and inlet air velocity while the plate base thickness and the total number of fins of the non-dominated solutions tend to approach certain values.
TL;DR: In this article, an aerodynamic design for the axial-flow fan is conducted and a CPU fan is designed to be integrated with the radial fins in order to form a complete fan-heat sink assembly.
Abstract: Traditional design methods to achieve improvement in heat sink performance are not suitable for meeting new thermal challenges. Revolutionary rather than evolutionary concepts are required for removing heat from the electronic components. We have recently developed an emerging novel approach, the integration design of the forced convection air cooling system. The aerodynamic design for the miniature axial-flow fan is conducted and a CPU fan is designed to be integrated with the radial fins in order to form a complete fan-heat sink assembly. The 3-D data of the fan generated by FORTRAN program are imported into Pro/E to create its 3-D model. The performance curve of the fan prototype fabricated by the computer numerically controlled machine is tested in a standard wind tunnel. To reduce the economic cost and prompt the design efficiency, the computational fluid dynamics is adopted to estimate the initial fan's performance. A series of radial heat sinks is designed in accordance with the outflow angle of airflow discharged from the fan. The inlet angle of the fin is arranged so that the incoming flow from the upstream impeller matches the fin's angle of heat sinks. Using the multi-block hexahedral grid technique, the numerical simulation of the system, including the fan and heat sinks, is performed by means of Multiple Reference Frame (MRF) and RNG k-epsiv Model. Our results indicate that the thermal resistance of the streamlined heat sink is decreased by 15.9% compared to the traditional heat sink and the entropy generation rate of the streamlined heat sink is lower. The experiments support our simulation results. The series of heat sinks is able to achieve the productive thermal performance when the integration design concept is utilized.
TL;DR: In this article, the failure criteria used in industry and academia, focusing on three key attributes: resistance threshold, duration of resistance change, and frequency of changes, are reviewed and assessed.
Abstract: The specification of a failure criterion for solder joints is an important element in the qualification of an electronic product. A common approach to reliability testing is to monitor electrical resistance during the testing. The techniques employed for resistance monitoring and data acquisition will determine whether information regarding transients or long-term drift is captured by the measurement. This paper reviews and assesses the failure criteria used in industry and academia, focusing on three key attributes: resistance threshold, duration of resistance change, and frequency of changes. An experimental study on thermomechanical fatigue of ball grid array package solder joints was performed to compare measurement techniques and failure criteria.
TL;DR: In this article, the authors developed analytical models for determining heat transfer from in-line and staggered pin-fin heat sinks used in electronic packaging applications, which can be applied over a wide range of heat sink parameters.
Abstract: Analytical models are developed for determining heat transfer from in-line and staggered pin-fin heat sinks used in electronic packaging applications. The heat transfer coefficient for the heat sink and the average temperature of the fluid inside the heat sink are obtained from an energy balance over a control volume. In addition, friction coefficient models for both arrangements are developed from published data. The effects of thermal conductivity on the thermal performance are also examined. All models can be applied over a wide range of heat sink parameters and are suitable for use in the design of pin-fin heat sinks. The present models are in good agreement for high Reynolds numbers with existing experimental/numerical data.
TL;DR: In this paper, the effects of the following key parameters on reliability of both CCGA and PBGA assemblies were investigated: thermal cycle ranges, -50degC/75degC, -55degC /100degC and -55 degC/125degC; corner staking on failure mechanisms for two thermal cycle profiles, −55deg C/125 degC and −50deg C /75 degC; and package interchangeability, i.e., using PBGA package on CCGA pad design with a larger pad.
Abstract: Area array packages (AAPs) with 1.27 mm pitch have been the packages of choice for commercial applications; they are now starting to be implemented for use in military and aerospace applications. Thermal cycling characteristics of plastic ball grid array (PBGA) and chip scale package assemblies, because of their wide usage for commercial applications, have been extensively reported on in literature. Thermal cycling represents the on-off environmental condition for most electronic products and therefore is a key factor that defines reliability. However, very limited data is available for thermal cycling behavior of ceramic packages commonly used for the aerospace applications. For high reliability applications, numerous AAPs are available with an identical design pattern both in ceramic and plastic packages. This paper compares assembly reliability of ceramic and plastic packages with the identical inputs/outputs (I/Os) and pattern. The ceramic package was in the form of ceramic column grid array (CCGA) with 560 I/Os peripheral array with the identical pad design as its plastic counterpart. The effects of the following key parameters on reliability of both CCGA and PBGA assemblies were investigated:(1) thermal cycle ranges, -50degC/75degC, -55degC/100degC, and -55degC/125degC; (2) corner staking on failure mechanisms for two thermal cycle profiles, -55degC/125degC and -50degC/75degC; (3) package interchangeability, i.e., using PBGA package on CCGA pad design with a larger pad. Packages were assembled on polyimide boards and their daisy chains were continuously monitored. Optical photomicrographs were taken at various thermal cycle intervals to document damage progress and behavior. Representative samples along with their cross-sectional photomicrographs at higher magnification, taken by scanning electron microscopy and analyzed by energy dispersive X-ray, are also presented. The inspection documents were used to determine crack propagation and failure analyses for packages with and without corner staking. In assemblies with corner staking adhesive, a transition in failure from corner columns to center columns was observed when maximum temperature in thermal cycling profiles changed. This is a new failure mechanism not reported on in literature. Finite element analysis (FEA) was used to predict such global failure mode changes. FEA findings are also presented.
TL;DR: PHM in China is discussed and overviews key papers in the Total Chinese Journal Database are overviewed.
Abstract: Prognostics and health management (PHM) is an active research area, being implemented into many Chinese products and systems. In China, the key technologies of PHM, which include sensor and data acquisition, data transmission, data preprocessing, health monitoring, fault diagnosis, fault prognosis and decision support, have a long research history. This paper discusses PHM in China and overviews key papers in the Total Chinese Journal Database.
TL;DR: In this paper, a four-point cyclic bending test was performed under various loading levels to investigate the fatigue behavior of solder joints with chemical compositions of 95.5Sn4.0Ag0.5Cu and 63Sn37Pb.
Abstract: Nowadays, interest in the bending reliability of ball grid array packages has increased with the increase in mobile devices. Initially, bending tests were conducted to certify the safety of an electronic package during the manufacturing and shipping processes. But recently, the purpose of the bending test has changed: cyclic bending tests are being used to evaluate the electronic package's endurance against handling damage such as bending, twisting and key pressure. Furthermore, the bending test is being adopted as an alternative to a drop test. In this study, a four-point cyclic bending test was performed under various loading levels to investigate the fatigue behavior of solder joints with chemical compositions of 95.5Sn4.0Ag0.5Cu and 63Sn37Pb. It was found that the lead-free solder has a longer fatigue life than the lead-contained solder when the applied load is low. A finite element analysis (FEA) with plasticity and creep constitutive equations was conducted because there are no suitable sensors to measure stress and strain of solder ball joints directly. From the analysis results, it was found that the inelastic energy dissipation could be used as a good damage parameter. Also, from the inspection of the failure site and the FEA, it was found that the fatigue crack initiated at the exterior solder joints and propagated into the inner solder joints.
IBM1
TL;DR: In this article, the authors demonstrate a mobile measurement technology which allows for fast and systematic 3D temperature mapping of data centers, which yields the first experimental 3-D temperature images of an actual data center.
Abstract: We demonstrate a mobile measurement technology which allows for fast and systematic 3-D temperature mapping of data centers. This technology yields the first experimental 3-D temperature images of an actual data center. The experimental temperature distributions reveal strong hot spots in the data center suggesting that current cooling schemes can be readily improved.
TL;DR: In this paper, a power cycling thermal fatigue test is performed with different ball grid array solder joints, that is, lead contained [sn/37 Pb (SP)] and lead free [Sn/4.0Ag/0.5 Cu (SAC)] and the result is compared.
Abstract: Failure mechanisms exposed by environmental accelerating testing methods such as thermal cycling or thermal shock test, may differ from those at service operating conditions. While the device is heated up or cooled down evenly on its external surface during environmental testing, real operating powered devices experience temperature gradients caused by internal local heating, components' different heat dissipation capability, and ambient temperature variation, etc. In this study, a power cycling technique is introduced to better approximate the field operating conditions so as to activate the field failure modes. Power cycling thermal fatigue test is performed with different ball grid array solder joints, that is, lead contained [Sn/37 Pb (SP)] and lead free [Sn/4.0Ag/0.5 Cu (SAC)], and the result is compared. In order to account for the thermal fatigue life behavior discrepancy for different solder joint composition, real time Moire interferometry is applied to measure the global/local thermo-mechanical behavior during power cycling excursion. Effective damage parameter, the total average shear strain, is extracted from the experiment and applied to account for the difference in fatigue life result of two different solders. In addition, amount of experimentally measured total average shear strain is mutually verified with finite element method analysis. It is clear that total average shear strain of a solder joint can be an effective damage parameter to predict thermo-mechanical fatigue life. A physical mechanism in terms of thermal material property of solder joints' is proposed to offer some thoughts to abnormal shear strain behavior that leads to discrepancies in fatigue life of two solders. An importance of power cycling testing method is emphasized for certain package designs.
TL;DR: In this article, a set of formal principles are presented for guiding the design of piggyback products, derived from the results of an empirical study of 72 different products and analyzed with a dissection tool.
Abstract: Products evolve to accommodate competitive market pressures, rapid rates of technology change, and constant improvements in performance and functionality. While adding functionality and value, the fast moving technologies also make products obsolete quickly. One of the primary reasons for product obsolescence is technological obsolescence which results when consumers are attracted to functions in newer models of products that are more technologically advanced. One way to deal with problem is ldquopiggybacking,rdquo a strategy that enables renewed functionality of a technologically obsolete product through the integration or add-on of a secondary device or component. Not to be confused with upgrading strategies, piggybacking requires a device that fits adjacent to, upon, or within the existing product architecture. Piggybacking is an attractive strategy for consumer electronic products that are particularly prone to technological obsolescence as it offers a means to accommodate fast and slower changing technologies within a single product. Currently, piggyback products are realized with ad hoc methods that rely on the experience and intuition of the designer, often applied inconsistently and not well known by less experienced designers. In this paper, a set of formal principles is presented for guiding the design of piggyback products. These principles are derived from the results of an empirical study of 72 different products. As part of the study, various products are analyzed with a dissection tool with representative principles derived from the data. The utility of these principles is demonstrated via the conceptual design of a novel piggyback products.
TL;DR: It is found that such global workload staggering can potentially reduce operational costs by nearly 35% and dynamic optimization of the thermal workloads based on local weather patterns can reduce the environmental burden by up to 30%.
Abstract: The rapid deployment of information and communications technology (ICT) across the globe has led to a network of high-density computer data centers to store, process and transmit information. These large-scale technology warehouses consume vast amounts of energy for running the compute infrastructure and auxiliary cooling resources. Recent literature has suggested the possibility of globally staggering compute workloads to take advantage of local climatic conditions as a means to reducing cooling energy costs. This paper further explores this premise by performing an in-depth analysis of the environmental and economic burden of managing the thermal infrastructure of a globally connected data center network. The paper examines a case study where the potential energy savings achievable by staggering workloads across arbitrarily chosen data centers in the U.S., India, and Russia are examined. The results show that the environmental benefit of such off-shoring is mostly dependent on the fuel mix of the grid to which the workload is transferred and the energy consumption in each location. Further, we show that dynamic optimization of the thermal workloads based on local weather patterns can reduce the environmental burden by up to 30%. The paper concludes with a detailed economic assessment. For the case study in this paper, we find that such global workload staggering can potentially reduce operational costs by nearly 35%.
TL;DR: In this article, the influence of different surface finish on the reliability of copper pillar interconnections was investigated using a scanning electron microscope with energy dispersive X-ray (SEM-EDX), and the feasibility and reliability of these copper-pillar FCOM systems were also compared and evaluated.
Abstract: Copper pillar interconnects are a popular interposing option due to the advantages of small pillar size and good thermal and electrical performance, making copper pillar interconnects very useful for high-frequency and high-density flip-chip-on-module (FCOM) packages. However, the challenges associated with the technology include controlling the formation of brittle intermetallic compounds (IMC) and weak interfaces during heat-related processes, and preventing copper migration during bonding and reliability testing. As the reliability of the joint is significantly affected by the property of the surface finish, it is important to understand the influence of different surface finishes on the reliability of copper pillar interconnections. This paper focuses on Ni/Au-capped, Sn-capped, Sn-2.5Ag-capped, and organic solderability preservative (OSP)-capped copper pillar interconnections with lead-free Sn-3.0Ag-0.5Cu solder paste in FCOM packages. The types, morphology, and distribution of IMC formed in the bulk solder, the copper pillar/SAC, and copper pad/ENIG/SAC interfaces during multiple reflows ( 265degC ) and reliability testing thermal cycle (TC), autoclave (AC), high-temperature storage (HTS), and thermal shock [(TS)] were investigated using a scanning electron microscope with energy dispersive X-ray (SEM-EDX). The feasibility and reliability of these copper-pillar FCOM systems were also compared and evaluated. The reliability results show that OSP-capped copper pillar interconnects are the best interposing option in terms of reliability and performance.
TL;DR: In this paper, the integration of cylindrical microchannels fabricated by direct-write assembly in printed circuit board layouts for a micro heat exchanger application is presented, and the thermal performance of the manufactured prototype is characterized with respect to the fluid flow rate.
Abstract: The electronic industry has a growing need for efficient heat dissipation mechanisms such as micro heat exchanger systems. This active cooling approach requires the integration of microfluidic components near the main heat sources of the electronic devices. Despite the investigation of several micro-cooling configurations, their commercial utilization by the electronic industry is rather limited due to complex fabrication and integration methods. Here, we present the integration of cylindrical microchannels fabricated by direct-write assembly in printed circuit board layouts for a micro heat exchanger application. The thermal performance of the manufactured prototype was characterized with respect to the fluid flow rate. The original fabrication and integration approaches presented here show high potential for efficient, compact, and low-cost micro heat exchangers for the electronic industry.
TL;DR: In this paper, an exact analytical solution was derived to obtain the accurate coefficient of hygroscopic swelling, with the consideration of 3-D moisture diffusion across the specimen, and the correlation between the locally defined and the averaged coefficient was obtained analytically.
Abstract: The coefficient of hygroscopic swelling is a material property used to measure the volumetric change with moisture absorption under given humidity and temperature conditions. Current hygroscopic swelling characterization techniques use an averaged approach based on the averaged moisture content. However, the moisture distribution is not uniform across the test specimen during measurement. This introduces analysis errors in determining the material property. In this paper, an exact analytical solution was derived to obtain the accurate coefficient of hygroscopic swelling, with the consideration of 3-D moisture diffusion across the specimen. The correlation between the locally defined and the averaged coefficient of hygroscopic swelling was obtained analytically. The results showed that the coefficient of hygroscopic swelling obtained based on the previous method using the averaged approach may overestimate the property up to 250%. The methodology and formulation developed in this paper was then applied to analyze a set of existing experimental data, and results were compared to the current approach. This paper also investigated the reliability of a flip chip ball grid array package under high accelerated stress test condition (120degC/100%RH). Finite element analysis simulation results revealed the significance of contribution of hygroscopic swelling induced tensile stresses under bump region. The finite element results gave an insight of the failure mechanism associated with moisture absorption.