Showing papers in "IEEE Transactions on Components, Packaging and Manufacturing Technology in 2012"

Low-Cost Thin Glass Interposers as a Superior Alternative to Silicon and Organic Interposers for Packaging of 3-D ICs

Abstract: Interconnecting integrated circuits (ICs) and 3-D-ICs to the system board (printed circuit board) are currently achieved using organic or silicon-based interposers. Organic interposers face several challenges in packaging 2-D and 3-D-ICs beyond the 32-nm node, primarily due to their poor dimensional stability and coefficient of thermal expansion (CTE) mismatch to silicon. Silicon interposers made with back-end of line wafer processes can achieve the required wiring and I/O density, but their high-cost limit them to high-performance applications. Glass is proposed as a superior alternative to organic and silicon-based interposers for packaging of future ICs and 3-D-ICs with highest I/Os at lowest cost. This paper presents for the first time a novel thin and large panel glass interposer capable of scaling to 700 mm and larger panels with potential for significant cost reduction over interposers made on 200-mm or 300-mm wafers. The formation of small through vias at high speed has been the biggest technical barrier for the adoption of glass as an interposer and system substrate; and this paper describes pioneering research in via-formation in thin glass substrates, using a novel “polymer-on-glass” approach. Electrical modeling and design of through package vias (TPVs) in glass is discussed in detail, and the feasibility of 50-μm pitch TPVs in 180-μm thin glass substrates has been demonstrated. The excellent surface finish and low CTE of glass leads to increased I/O density, and increased functionality per unit area leading to system miniaturization.

Narrow-Band Microwave Filter Using High-Q Groove Gap Waveguide Resonators With Manufacturing Flexibility and No Sidewalls

Abstract: This paper presents a new type of narrow band filter with good electrical performance and manufacturing flexibility, based on the newly introduced groove gap waveguide technology. The designed third and fifth-order filters work at Ku band with 1% fractional bandwidth. These filter structures are manufactured with an allowable gap between two metal blocks, in such a way that there is no requirement for electrical contact and alignment between the blocks. This is a major manufacturing advantage compared to normal rectangular waveguide filters. The measured results of the manufactured filters show reasonably good agreement with the full-wave simulated results, without any tuning or adjustments.

Stochastic Modeling-Based Variability Analysis of On-Chip Interconnects

Abstract: In this paper, a novel stochastic modeling strategy is constructed that allows assessment of the parameter variability effects induced by the manufacturing process of on-chip interconnects. The strategy adopts a three-step approach. First, a very accurate electromagnetic modeling technique yields the per unit length (p.u.l.) transmission line parameters of the on-chip interconnect structures. Second, parameterized macromodels of these p.u.l. parameters are constructed. Third, a stochastic Galerkin method is implemented to solve the pertinent stochastic telegrapher's equations. The new methodology is illustrated with meaningful design examples, demonstrating its accuracy and efficiency. Improvements and advantages with respect to the state-of-the-art are clearly highlighted.

Use of ${\rm Al}_{2}{\rm O}_{3}\hbox{--}{\rm Cu}$ /Water Hybrid Nanofluid in an Electronic Heat Sink

Abstract: Cooling of electronic components is important as demand for reduced component size and the increased heat generation rate cause the heat flux to increase. Liquid-cooled heat sinks work better than air-cooled heat sinks due to the improved heat transfer capability of liquids over air. If the thermal properties of the liquids are further improved, the performance of the heat sinks can be increased in terms of their capacity of heat removal at reduced size. In this paper, the thermal properties of water are altered by adding Al2O3-Cu nanocomposite powder. This nanocomposite powder is synthesized in a thermochemical route followed by a hydrogen reduction technique. The synthesized nanocomposite powder is characterized by X-ray diffraction, scanning electron microscopy, and energy-dispersive spectroscopy. Al2O3-Cu/water hybrid nanofluid is prepared and tested in a thin-channeled copper heat sink of overall dimensions 59 × 59 × 12.6 mm. The effect of hybrid nanofluid in the enhancement of convective heat transfer and pressure drop is studied. The experimental results demonstrate that the convective heat transfer coefficient of the heat sink is increased significantly when hybrid nanofluid is used as the working fluid compared with water. The rise in pumping power with the use of hybrid nanofluid compared with water is less than the rise in the convective heat transfer coefficient.

Thermal Management Challenges in Telecommunication Systems and Data Centers

Abstract: The framework for this paper is the growing concern about the worldwide increasing energy consumption of telecommunications systems and data centers, and particularly the contribution of the thermal management system. The present energy usage of these systems is discussed, as well as the relationship between cooling system design and the total cost of ownership. This paper identifies immediate and future thermal bottlenecks facing the industry, ranging from technological issues at the component and system level to more general needs involving reliability, modularity, and multidisciplinary design. Based on this enumeration, the main challenges to implementing cooling solutions are reviewed. Particular attention is paid to implementing liquid cooling, since this technology seems the most promising to addressing the key thermal bottlenecks, and improving the future sustainability of thermal management in the telecom and data center industry. Finally, an outlook is presented toward future potential challenges.

Improved Microstrip Filters Using PMC Packaging by Lid of Nails

Abstract: This paper shows that microstrip filters perform like textbook examples when packaged with perfect magnetic conductor (PMC). A PMC is made as a pin surface or lid of nails, and this is used to package a microstrip parallel coupled line bandpass filter. Our measurements confirm that parallel plate, cavity modes, and radiation are suppressed. This paper also includes a study of the reasons for a frequency shift between the ideal PMC packaged case and the realized case.

Numerical Analysis of Novel Micro Pin Fin Heat Sink With Variable Fin Density

Abstract: Numerical analyses to characterize and design micro pin fin heat sinks for cooling the 2016s IC chip heat generation are carried out in this paper. A novel design with variable fin density is proposed to generate a more uniform temperature of the IC chip junctions. The variable-density feature allows the gradual increase of the heat transfer area as coolant passes through the system. Single-phase water in the laminar regime is employed. Four different fin shapes (circle, square, elliptical, and flat with two redounded sides) are analyzed. The junction temperature and pressure drop variations in the heat sink generated by these shapes are presented. The effects of varying the fin length and height are also studied. The best heat sink configuration has a thermal resistance ranging from 0.14 to 0.25 K/W with a pressure drop lower than 90 kPa and a junction temperature ~ 314 K under the conditions studied. The temperature gradient at the bottom wall of the heat sink is considered as a parameter for comparing various heat sink designs. The novel cooling device has an overall temperature gradient lower than 2°C/mm, which is significantly lower than the temperature gradients in other schemes reported in literature.

Radiation Suppression for Cable-Attached Packages Utilizing a Compact Embedded Common-Mode Filter

Abstract: A compact and wideband common-mode filter is newly proposed to embed in a cable-attached printed circuit board (PCB) or packages for the suppression of the common-mode noise and its resulting electromagnetic interference (EMI) emission from the attached cable. The proposed filter consists of a pair of distributed signal lines on the top of a mushroom-like structure. Owing to its symmetry, an equivalent circuit model is developed and applied efficiently for this filter design. As an example, a filter prototype is designed and fabricated on a multilayer PCB. The filter prototype shows that it can greatly reduce the common-mode noise over 10 dB from 1.65 to 5.2 GHz. In addition, the corresponding fractional bandwidth is over 100% while the electrical size of the prototype is only 0.11 × 0.11 λg, where λg is the wavelength of the central frequency of its stopband. Also in the time domain, this filter prototype can reduce over 60% of the unintended noise. More importantly, the differential-signal integrity, in terms of the insertion loss in the frequency domain and the eye diagram in the time domain, is maintained up to 7 GHz. To the best of our knowledge, it is the first embedded common-mode filter proposed for gigahertz differential signals with such a large bandwidth and the most compact size. To further demonstrate the ability of the filter to suppress the common-mode current on the attached cable and the corresponding EMI emission, a test board design is also introduced and realized. From the experimental results related to this test board, a 10-dB suppression on average is indeed achieved.

Optimization of Phase Change Material Heat Sinks for Low Duty Cycle High Peak Load Power Supplies

Abstract: A power electronic device's lifetime depends on its maximum operating temperature and the temperature swings it is subjected to Heat sinks employing phase change materials (PCMs) can be employed to achieve a temperature reduction, but only for a limited duration This makes such heat sinks appropriate for use in applications with high peak loads but with low duty cycles The heat sink is modeled using the thermal resistors and capacitors (RCs) network approach, and an optimization procedure for designing a hybrid air-cooled heat sink containing PCM is developed, yielding a maximum possible temperature reduction for a given application It is shown that air-cooled heat sinks employing pure PCMs are best suited for applications with pulses width lengths of several minutes with a period of several tens of minutes In order to achieve a faster response of the PCM, the concept of PCM-metal foam is explored and modeled Experimental data is presented which confirms the validity of the thermal RC network approach

Sintering of Copper Particles for Die Attach

Abstract: First steps are taken toward a low-cost alternative to silver sintering as a highly reliable die attach technology for deep drilling applications and future power electronic modules. In this feasibility analysis, we evaluate sintering of copper particles for die attach. Particulate copper pastes are pretreated in H2 atmosphere (50 mbar) in order to gain oxide-free particles. Subsequently, particles are sintered at a pressure of 40 N/mm2 and a temperature of 350°C for 2 min. Porosity, Young's modulus as well as electrical and thermal conductivities of sintered layers are analyzed. Moreover, shear tests at ambient temperature are performed for evaluating the adhesion of monometallic as well as Cu-Au bonds according to the American military standard for chip-substrate contacts (MIL-STD-883H, method 2019.8).

Self-Packaged Millimeter-Wave Substrate Integrated Waveguide Filter With Asymmetric Frequency Response

Abstract: Substrate integrated waveguide (SIW) technology provides an effective solution for the low-cost and high-performance interconnect and packaging of microwave and millimeter wave systems. In this paper, Ka-band four-degree bandpass filters having asymmetric frequency response, which are required in the design of transmit and receive diplexers for high rejection between neighboring channels, are proposed and realized on an SIW platform. The filters are self-packaged due to the fact that a conductor-backed coplanar waveguide is used to directly excite the filters. Higher-order resonant mode is used to achieve the required negative coupling on the basis of a single-layer SIW. The proposed filters, having the same center frequency of 35 GHz and pass bandwidth of 1.3 GHz, are fabricated on a conventional Rogers RT/Duroid 6002 substrate with thickness of 0.508 mm by using a low-cost printed circuit board process. Measured results of those filters, which exhibit high single-sided selectivity and minimum in-band insertion loss of about 1.25 dB, agree well with simulated results.

Pick-and-Place Silver Sintering Die Attach of Small-Area Chips

Abstract: A method for high-temperature-stable die attaches based on sintering of micro and nano silver particles is described. A low-temperature (200°C) and low-pressure (3 N/mm2) process was established to ensure compatibility with conventional adhesive die attach and to avoid surface damage on the dice, respectively. A modified flip-chip bonder providing high placement accuracy (2 μm) is used for a precise pick-and-place die attach. A thermal finite element modeling simulation was performed to analyze the bonding process. Additionally, the influence of the surface properties on the adhesion of sintered silver layers was investigated. The area-selective sintering method allows combination with other standard processes for die attach. It is now possible to establish pressure-assisted silver sintering for the series production of hybrid electronic circuits, which is an option requested by the industry to expand the operation range of sensors and electronics in harsh environments (e.g., measurement while drilling).

System Integration of Electronic Functions in Smart Packaging Applications

Abstract: A system integration scheme relevant for smart packaging applications is presented. Recent advances in printed electronics, radio frequency identification tag production, and standardization of communication protocols are factors that increase the design freedom for new applications. As in all new technology fields, the first products are expected to appear in the high-cost segment attracting early adopters in the form of niche products. A reasonable assumption is that these products will come from hybridization of different types of technologies. Such a scenario is likely since no technology solution available can provide all features that these types of applications demand. There is a need of standard solutions for hybridization of silicon devices and printed (or foil-type) components. Conductive ink technology is a powerful tool for hybridization and customization of large-area electronics, providing 3-D integration and large-area customization. However, high-performance communication and advanced processing demand the use of silicon. Smart hybridization solutions allow combination of the best from both worlds. This paper analyzes the requirements on hybridization technologies suitable for smart packaging applications and provides design examples on integration of intrusion surveillance solutions for cellulose-based packaging applications. It shows that even though the current hybridization technologies are far from optimal, they can provide a considerable design freedom and system performance.

Design of an Integrated Loop Heat Pipe Air-Cooled Heat Exchanger for High Performance Electronics

Abstract: The continually increasing heat generation rates in high performance electronics, radar systems and data centers require development of efficient heat exchangers that can transfer large heat loads. In this paper, we present the design of a new high-performance heat exchanger capable of transferring 1000 W while consuming less than 33 W of input electrical power and having an overall thermal resistance of 0.05 K/W. The low thermal resistance is achieved by using a loop heat pipe with a single evaporator and multiple condenser plates that constitute the array of fins. Impellers between the fins are driven by a custom permanent magnet synchronous motor in a compact volume of 0.1 × 0.1 × 0.1 m to maximize the heat transfer area and reduce the required airflow rate and electrical power. The design of the heat exchanger is developed using analytical and numerical methods to determine the important parameters of each component. The results form the basis for the fabrication and experimental characterization that is currently under development.

Bended Differential Transmission Line Using Compensation Inductance for Common-Mode Noise Suppression

Abstract: In this paper, a bended differential transmission line using a compensation inductance is proposed to efficiently suppress the common-mode noise. The bended differential transmission line using the compensation inductance can then be implemented by the bended differential transmission line using the short-circuited coupled line. It has been shown that the bended differential transmission line using the short-circuited coupled line can greatly reduce the mode conversion from -5.47 to -14.75 dB, and the time-domain-through common-mode noise from 0.068 to 0.02 V as compared with the bended differential transmission line using the right-angle bend. In order to verify the simulation results, measurement is done in the frequency and time domains where the measurement results are in good agreement with the simulation results.

Drop-on-Demand Laser Sintering With Silver Nanoparticles for Electronics Packaging

Abstract: This paper proposes a “dry” laser-sintering method and discusses characteristics of a laser-sintered silver thin film on a polyimide or a copper substrate. This novel technology consists of the following processes: first, ink-jet printing of metal nanoparticles with dispersants and solvents for minute patterning; second, short preheating to remove organic substances in the ink; and finally, millisecond-order laser-beam irradiation under atmospheric conditions with the flow of argon gas for metallization. Regarding the wiring, visible lasers with high absorption on the ink develop rapid metallization and activate solvent evaporation, resulting in a rough surface with large pores. Interface adhesion is increased by the anchoring effect in the course of laser irradiation. In contrast, near-infrared lasers with low absorption heat the ink from the polyimide interface, yielding a dense, low-specific-resistance structure. Regarding pad formation on the copper leadframe without any surface pre-treatments, interdiffusion takes place at the Ag/Cu interface and increases adhesivity. The structural quality of the laser-sintered silver pad is almost the same as that of an electroplated one, so that no difference in good wire-bondability is obtained when the near-infrared continuous-wave laser is irradiated for a short time of a millisecond order per lead.

Measurement and Analysis of a High-Speed TSV Channel

Abstract: Using high-speed through-silicon via (TSV) channels is a potential means of utilizing 3-D interconnections to realize considerable high-bandwidth throughput in vertically stacked and laterally distributed integrated circuits However, although the TSV and a silicon interposer in a high-speed TSV channel lead to a significant decrease of the interconnect length, the received digital signal after transmission through a TSV channel is still degraded at a high data-rate due to the nonidealities of the channel Therefore, an analysis of the signal integrity in a high-speed TSV channel is necessary In this paper, a single-ended high-speed TSV channel is measured and analyzed in the frequency-domain and the time-domain To measure the high-speed TSV channel, two types of test vehicles are fabricated, consisting of TSVs and interposers With these test vehicles, the channel losses are measured in the frequency-domain up to 20 GHz, and eye-diagrams are measured in the time-domain at 1 Gb/s and 10 Gb/s Based on these measurements, the channel loss, characteristic impedance, and reflection of the high-speed TSV channel are analyzed and compared to those of the channel in multichip module (MCM) package Because of the losses from the silicon-substrate and the thin oxide-layer used in the TSVs, the overall loss of the high-speed TSV channel is higher than that of the MCM channel In addition, the characteristic impedance of the high-speed TSV channel is frequency-dependent, whereas that of the MCM channel is frequency-independent Moreover, in contrast to the MCM channel, the reflection is negligible in the high-speed TSV channel because the channel is too short and the losses are too high to be affected by the reflection Finally, the design guidance of a high-speed TSV channel for wide bandwidth is determined based on the analysis of the measurements

Laser-Enabled Advanced Packaging of Ultrathin Bare Dice in Flexible Substrates

Abstract: Embedding ultrathin semiconductor dice in flexible substrates provides unique capabilities for product designers and makes products such as smart bank cards and radio-frequency identification banknotes possible. Most of the current work in this area is directed toward handling, embedding, and interconnecting the ultrathin chips. Relatively little attention is paid to another critical process step-placing the flexible and very fragile ultrathin die onto the flexible substrate reliably and in a cost-efficient manner, suitable for high throughput assembly. The presented laser-enabled technology for embedding ultrathin dice in a flexible substrate was developed at the Center for Nanoscale Science and Engineering, North Dakota State University, Fargo, ND, to address this problem. The technology has been successfully demonstrated and proven for the fabrication of an RFID tag.

Modeling and Analysis of a Power Distribution Network in TSV-Based 3-D Memory IC Including P/G TSVs, On-Chip Decoupling Capacitors, and Silicon Substrate Effects

Abstract: In this paper, we propose a model for 3-D stacked on-chip power distribution networks (PDNs) in through silicon via (TSV)-based 3-D memory ICs that includes the effects of power/ground TSVs (P/G TSVs), on-chip decoupling capacitors (on-chip decaps), and the silicon substrate. In the modeling procedure of 3-D stacked on-chip PDNs, the distributed RLGC-lumped model of an on-chip PDN, including the effects of the on-chip decaps and silicon substrate, is proposed. Additionally, the RLGC-lumped model of a P/G TSV pair is introduced. The proposed model of the 3-D stacked on-chip PDN combines the proposed models of on-chip PDNs with the models of P/G TSV pairs in a hierarchical order with a segmentation method. The proposed models of the on-chip PDN and 3-D stacked on-chip PDN are successfully validated by simulations and measurements up to 20 GHz. Additionally, with these models, the impedances of the 3-D stacked on-chip PDNs are analyzed with respect to the variations in the number of P/G TSV pairs, the capacitance of on-chip decaps, and the height of an interlayer dielectric layer between the on-chip PDN and silicon substrate. These variations critically affect the impedance of the 3-D stacked on-chip PDN by changing the capacitance and inductance of the PDN.

Thermal Management of Electronics Using PCM-Based Heat Sink Subjected to Cyclic Heat Load

Abstract: Designing a heat sink based on a phase change material (PCM) under cyclic loading is a critical issue. For cyclic operation, it is required that the fraction of the PCM melting during the heating cycle should completely resolidify during the cooling period, so that that thermal storage unit can be operated for an unlimited number of cycles. Accordingly, studies are carried out to find the parameters influencing the behavior of a PCM under cyclic loading. A number of parameters are identified in the process, the most important ones being the duty cycle and heat transfer coefficient (h) for cooling. The required h or the required cooling period for complete resolidification for infinite cyclic operation of a conventional PCM-based heat sink is found to be very high and unrealistic with air cooling from the surface. To overcome this problem, the conventional design is modified where h and the area exposed to heat transfer can be independently controlled. With this arrangement, the enhanced area provided for cooling keeps h within realistic limits. Analytical investigation is carried out to evaluate the thermal performance of this modified PCM-based heat sink in comparison to those with conventional designs. Experiments are also performed on both the conventional and the modified PCM-based heat sinks to validate the new findings.

Development of Wafer-Level Warpage and Stress Modeling Methodology and Its Application in Process Optimization for TSV Wafers

Abstract: Through-silicon via (TSV) technology has been widely investigated recently for 3-D electronic packaging integration. Reducing TSV wafer warpage is one of the most challenging concerns for successfully subsequent processes. In this paper, a wafer-level warpage modeling methodology has been developed by the finite element analysis method using an equivalent material model. The developed modeling methodology has been verified by numerical results and experimental data. Using the developed model, wafer warpage has been simulated and analyzed by considering different factors, such as annealing temperature, copper (Cu) overburden thickness, TSV depth, and diameter. Simulation results show that wafer warpage increases with increasing annealing temperature and Cu overburden thickness. Such findings have been successfully used in TSV process optimization to reduce wafer warpage after annealing process. A global-local modeling methodology has also been implemented to determine wafer stress accurately. Wafer bending stress is high at wafer surface and close to TSV edge. Wafer bending stress increases with increasing TSV diameter and it is higher at the edge of TSVs with finer pitch.

Analytical Solution for Steady-State and Transient Temperature Fields in Vertically Stacked 3-D Integrated Circuits

Abstract: Vertical integration for microelectronics poses significant challenges related to dissipation of heat generated in multiple device planes. Thermal management of 3-D integrated circuits (3-D ICs) is recognized to be one of the foremost technological and research challenges currently blocking the widespread adoption of this promising technology. The computation of steady-state and transient temperature fields in a 3-D IC is critical for determining the thermal characteristics of a 3-D IC and for evaluating any candidate thermal management technology. This paper presents an analytical solution for the 3-D temperature field in a 3-D IC based on the solution of the governing energy equations using Fourier series expansion for steady-state temperature fields. In addition, this approach is combined with Laplace transforms to determine transient temperature fields. Comparison of the temperature fields predicted by the proposed models with finite-element simulations shows excellent agreement. The model is used to compute the temperature field in a representative 3-D IC, and it is shown that by utilizing a thermal-friendly floorplanning approach, the maximum temperature of the 3-D IC is reduced substantially.

Thermal Management of Power Inverter Modules at High Fluxes via Two-Phase Spray Cooling

Abstract: A spray cooling system was developed and tested for thermal management of power inverter modules utilized in automotive applications. The system featured an array of 1×2 pressure atomized nozzles that used 88°C boiling point antifreeze coolant with 0.15-l/min.cm2 liquid flow rate and 145-kPa pressure drop. A 2-cm2 simulated device, having two kinds of enhanced spray surface with microscale structures, reached up to 400-W/cm2 heat flux with as low as 14 °C surface superheat. These experimental results demonstrated the capability of greatly reducing the overall thermal resistance of the inverter modules that are commonly cooled with single-phase convective systems. The long-term reliability of the spray cooling was assessed with 2000 h of testing time. Performance of the presented system proved the spray cooling of power electronics as an attractive option that enables high power densities while maintaining acceptable and uniform device temperatures. In addition, due to the use of high temperature coolant at low flow rates, the spray cooling offers a compact and efficient system design.

Integration Method for Electronics in Woven Textiles

Abstract: This paper presents a technology to integrate electronics at the thread level in woven textiles. Flexible plastic substrates are cut into stripes and serve as carriers for electronics, including ICs, thin-film devices, interconnect lines, and contact pads. These functionalized plastic stripes, called e-stripes, are woven into textiles. Conductive threads perpendicular to the e-stripes electrically interconnect the devices on the individual e-stripes. The integration of e-stripes and conductive threads into the woven textiles is compatible with commercial weaving processes and suitable for large-scale manufacturing. We demonstrate the technology with a woven textile containing five e-stripes with digital temperature sensors. Conductive threads interconnect the e-stripes among each other to form a bus topology. We show that the contacts between the conductive threads and the pads on e-stripes as well as the contacts between the temperature sensors and e-stripes withstand shear forces of at least 20 N. The integration of the temperature sensors into the textile increases the bending rigidity of the textile by 30%; however, it is still possible to obtain a textile-bending radii of <;1 mm. This technology seamlessly integrates electronics into textiles, thus advancing the field of smart textiles and wearable computing.

Microstructurally Adaptive Model for Primary and Secondary Creep of Sn-Ag-Based Solders

Abstract: Sn-Ag-based solders are susceptible to appreciable microstructural coarsening due to the combined effect of thermal and mechanical stimuli during service and storage. This results in evolution of the creep properties of the solder over time, necessitating the development of a thermo-mechanical history-dependent creep model for accurate prediction of the long-term reliability of microelectronic solder joints. In this paper, the coarsening behavior of Ag3Sn and Cu6Sn5 precipitates in ball grid array-sized joints of Sn-3.8Ag-0.7Cu solder attached to Ni bond-pads with four different thermo-mechanical histories is reported. Because of the substantial numerical superiority of Ag3Sn over Cu6Sn5, it was inferred that the evolution of mechanical properties during aging is controlled largely by the coarsening of Ag3Sn. An effective diffusion length (x) for Ag diffusion in Sn was defined, and it is shown to adequately describe the thermo-mechanical history dependence of Ag3Sn particle size. The shear creep behavior of these joints was experimentally characterized, and the entire creep data were fitted to a unified model combining exponential primary creep and power-law steady state creep. The parameter x was then incorporated into the creep equation to produce a unified creep model, which can adapt to thermo-mechanical history-dependent microstructural coarsening in the solder. Predictions using this creep law show very good agreement with experimental creep data for several different test and microstructural conditions.

Vibration-Induced Changes in the Contact Resistance of High Power Electrical Connectors for Hybrid Vehicles

Abstract: Relatively little is known about the fretting mechanism of high power connectors used in hybrid vehicles, even though the vehicles are widely being introduced to the market. This paper experimentally investigates the fretting mechanisms of silver-plated high power connectors caused by vibrations. In order to emulate operational and environmental effects, a test stand was designed that is capable of measuring electrical contact resistance (ECR), relative displacement and connector temperature. The experimental results show that the variation of ECR of connectors subject to vibration is primarily due to periodic changes of contact area caused by relative motion between the contact interfaces, rather than other fretting corrosions. This finding was reinforced by observing a good correlation between relative motion and the increase of ECR under vibration. When a vibration stops, the ECR decreased to a value that is slightly larger than the original value. A surface analysis shows no obvious corrosion until the coating is worn away. In addition, the effect of high current on the fretting mechanism is also investigated.

Review of test methods used for the measurement of hermeticity in packages containing small cavities

Abstract: This paper presents a critical review of the traditional and newly proposed test methods used for the measurement of hermeticity in packages with very small cavity volumes. Closed-form expressions of the minimum and maximum true leak rates achievable are provided for the helium fine leak test method. These expressions are shown to provide practical guidelines for the accurate testing of hermeticity for ultrasmall packages. A portfolio of hermeticity test methods is also presented outlining the limitations and advantages of each method.

Modeling and Design Optimization of Ultrathin Vapor Chambers for High Heat Flux Applications

Abstract: Passive phase-change thermal spreaders, such as vapor chambers have been widely employed to spread the heat from small-scale high-flux heat sources to larger areas. In this paper, a numerical model for ultrathin vapor chambers has been developed, which is suitable for reliable prediction of the operation at high heat fluxes and small scales. The effects of boiling in the wick structure on the thermal performance are modeled, and the model predictions are compared with experiments on custom-fabricated vapor chamber devices. The working fluid for the vapor chamber is water and a condenser side temperature range of 293 K-333 K is considered. The model predictions agree reasonably well with experimental measurements and reveal the input parameters to which thermal resistance and vapor chamber capillary limit are most sensitive. The vapor space in the ultrathin devices offers significant thermal and flow resistances when the vapor core thickness is in the range of 0.2 mm-0.4 mm. The performance of a 1-mm-thick vapor chamber is optimized by studying the variation of thermal resistance and total flow pressure drop as functions of the wick and vapor core thicknesses. The wick thickness is varied from 0.05 to 0.25 mm. Based on the minimization of a performance cost function comprising the device thermal resistance and flow pressure drop, it is concluded that the thinnest wick structures (0.05 mm) are optimal for applications with heat fluxes below 50 W/cm2 , while a moderate wick thickness of 0.1 mm performs best at higher heat flux inputs 50 (>;W/cm2).

Silicon Carbide Power Modules for High-Temperature Applications

Abstract: A hermetic multichip power package for silicon carbide devices that will operate at 200°C ambient and switch 50-100 A has been developed. The Al2O3/MoCu structure, in which the SiC junction field-effect transistors and diodes are attached, was designed to hermetically seal the device areas. Details of the materials and processes used to fabricate the package are discussed. Die attach, ribbon bonding, and lid attach, as well as thermal modeling, electrical testing, and thermal cycling results are also described.

Compact Thermal Resistor-Capacitor-Network Approach to Predicting Transient Junction Temperatures of a Power Amplifier Module

Abstract: Junction temperature is an important issue for a semiconductor package, influencing the package's thermal, mechanical, and reliability performance. An accurate prediction of junction temperature provides informative guidance in design, development and operation of the package. A compact thermal resistor-capacitor (RC) network approach is presented in this paper to accurately predict transient junction temperatures. The thermal RC network in this approach is a nongrounded Foster network. This approach consists of extraction of the thermal Foster network and prediction of the transient junction temperature response to a given power input using the extracted network. The network extraction part is based on Kirchhoff's current law and Laplace transformation technique, and uses the Foster network to facilitate changes of the RC network structure. The temperature prediction part is a direct substitution-and-calculation process, and therefore is fast to carry out. Since Laplace transforms are directly or indirectly available for most power inputs, their transient temperatures may be predicted by the proposed approach. Superposition is employed in cases where the Laplace transform of a given power input is not directly found in Laplace tables, or where the junction temperature is affected by multiple heat sources. The proposed approach is demonstrated with a power amplifier (PA) module; predicted junction temperatures are accurate in both single and multiple heat source cases.