Showing papers in "IEEE Transactions on Consumer Electronics in 1999"

Image enhancement based on equal area dualistic sub-image histogram equalization method

Abstract: Histogram equalization is a simple and effective image enhancing technique. But in some conditions, the luminance of an image may be changed significantly after the equalizing process, this is why it has never been utilized in a video system in the past. A novel histogram equalization technique, equal area dualistic sub-image histogram equalization, is put forward in this paper. First, the image is decomposed into two equal area sub-images based on its original probability density function. Then the two sub-images are equalized respectively. Finally, we obtain the results after the processed sub-images are composed into one image. The simulation results indicate that the algorithm can not only enhance the image information effectively but also preserve the original image luminance well enough to make it possible to be used in a video system directly.

A watermarking technique based on one-way hash functions

Abstract: Digital watermarking techniques have been proposed for the copyright protection of digital images A digital watermarking technique is a technique for embedding invisible watermarks in a digital image The watermarks must be designed to be unrecognizable by unauthorized people and to be identified by the legal copyright owner of the image In this paper, we proposed a new copyright watermarking scheme Our scheme is based on one-way hash functions, which are widely used in cryptosystems The main goal of our method is to design a secure watermarking scheme

Wide band AC power line characterization

Abstract: This paper presents data characterizing the household AC power line in the 1-60 MHz band. Two types of measurements were performed: transmission and noise sampling. The transmission measurements were done by using the impulse channel sounding method, so both the line attenuation and the delay spread were obtained. The noise measurements include: power line background noise, appliance noise, and noise sampled over a 24 hour period. Statistical characteristics of the delay spread, frequency response and noise can be extracted from the data and used in the design of AC power line based communications systems.

An adaptive digital image watermarking technique for copyright protection

Abstract: An adaptive digital image watermarking technique is proposed. The proposed method exploits the sensitivity of human eyes to adaptively embed a visually recognizable watermark in an image without affecting the perceptual quality of the underlying host image. In addition, the watermark will still be present if some lossy image processing operations such as low-pass filtering, median filtering, resampling, requantization, and lossy JPEG image compression are applied to the watermarked image. Experimental results show the effectiveness of the proposed watermarking method.

On key distribution management for conditional access system on pay-TV system

Abstract: A conditional access system (CAS) is essential in a pay-TV system to charge the subscriber the subscription fee, and key management is also important. Various levels of key hierarchy for a CAS are discussed and two methods of grouping the subscribers to reduce the complexity of key distributions are presented. Based on the proposed two grouping methods we proposed a simple and a complete scheme with four-levels of key hierarchy for the key distribution management CAS of the pay-TV system. We also analyze the performance of the proposed complete scheme. It is shown that our system is efficient and suitable for a pay-TV system which provides both pay per channel (PPC) and pay per view (PPV) services. Besides, the proposed complete scheme is also a flexible one for dynamic management. Finally, it should be noted that, though our discussion are focused on pay-TV only, our schemes are also suitable for a digital broadcasting system (DBS).

Secure communication mechanisms for GSM networks

Abstract: With the advance of wireless communications technology, mobile communications has become more convenient than ever. However, because of the openness of wireless communications, the protection of the privacy between communicating parties is becoming a very important issue. We focus on the security of the Global System for Mobile communication (GSM) networks. A secure communication architecture for the GSM network is proposed. In the proposed architecture, we use public-key cryptography for user authentication and stream cipher for message encryption and decryption. An authentication protocol and a key generation method are presented in conjunction with the proposed architecture. Cryptanalysis and operational analysis show that the authentication protocol is secure and efficient. Simulation results indicate that the key generation method can always produce key strings of evenly distributed 0s and 1s and with infinite period.

A subband coding technique for image compression in single CCD cameras with Bayer color filter arrays

Abstract: This paper presents a subband coding technique suitable for image compression in a single CCD camera with a Bayer color filter array (CFA). In it, we have applied a SSKF (symmetric short kernel filter) both horizontally and vertically to red and blue color signals, and a two dimensional perfect reconstruction filter to green color signals. Here, we compare this technique to two other image compression methods: DPCM and the Hadamard transform, each of which also allows an output signal from the CCD in a color camera to be compressed directly with simple logic circuitry and is suitable for use in low cost video conference cameras. Simulation results demonstrate that the subband coding offers the best quality (27-30 dB) with a compression ratio of approximately 2 bit/pel.

Visible light communication for audio systems

Abstract: This paper describes an audio system that is well-suited for use in a small confined area with many audio transmitters broadcasting different audio signals. The transmitter of the proposed system is constructed using visible light LEDs, in which current fed to the LEDs is modulated and encoded with audio information or messages. The audio system provides audio signal transmission in a free space optical link. The receiver, combined with an ear jack, is located at some distance from the transmitters. The handheld receiver is designed to demodulate the optically transmitted audio information and reproduce the messages with the ear jack. For modulating emission of LEDs, an oscillator is used to vary the frequency of on/off periods of the LEDs. The frequency of flicker is high enough to be indistinguishable by human eye and hence the LEDs appear to be constantly illuminated.

Digital still cameras

Abstract: This paper presents an interpolation method for digital still cameras (DSCs) which is based on color signal correlation. The authors have developed a method of reducing aliasing by increasing the resolution of color signals in DSCs that use a single-plate charge coupled device (CCD) with a primary color filter array. The new method interpolates signals by taking advantage of the fact that color signal variations are similar to one another in a local region of an image. It selects the signal that shows the higher correlation, either in the horizontal or vertical directions, at color signal positions subject to interpolation, thus improving the color resolution. First, the effectiveness of the new method was verified using image simulation. Next, the prototype hardware was fabricated. The prototype is fitted with an original reduced instruction set computer (RISC) built-in dynamic random access memory (DRAM) for processing image signals to provide high-speed camera signal processing. The authors also confirmed that the effectiveness of the new method was also established in actual products.

A flexible heterogeneous video processor system for television applications

Abstract: A new video processing architecture for high-end TV applications is presented, featuring a flexible heterogeneous multi-processor architecture, executing video tasks in parallel and independently. The signal flow graph and the processors are programmable, enabling an optimal picture quality for different TV display modes. The concept is verified by an experimental chip design. The architecture allows several video streams to be processed and displayed in parallel and in a programmable way, with an individual signal quality.

Transmission scheme for the terrestrial ISDB system

Abstract: In Japan, the final draft specifications for a terrestrial digital broadcasting system called ISDB-T was fixed in September 1998 by the Association of Radio Industries and Businesses, and this paper describes the transmission scheme for that system. This transmission scheme can be sufficiently flexible and extendible. We propose the introduction of a frame structure to both the OFDM signal and the transport signal in order to provide hierarchical transmission flexibly while reducing the complexity of the receivers.

Low complexity index-compressed vector quantization for image compression

Abstract: This paper proposes a novel lossless index compression algorithm that explores the interblock correlation in the index domain and the property of the codebook ordering. The goal of this algorithm is to improve the performance of the VQ scheme at a low bit rate while keeping low computation complexity. In this algorithm, the closest codeword in the codebook is searched for each input vector. Then, the resultant index is compared with the previously encoded indices in a predefined search order to see whether the same index value can be found in the neighboring region. Besides, the relative addressing technique is employed to encode the current index if the same index value can not be found in the region. According to the results, the newly proposed algorithm achieves significant reduction of bit rate without introducing extra coding distortion. It is concluded that our algorithm is very efficient and effective for image vector quantization.

An area efficient DCT architecture for MPEG-2 video encoder

Abstract: This paper presents an area efficient VLSI architecture of transform coding module for MPEG-2 video encoder. This module consists of 2-D DCT and 2-D IDCT, Q and IQ, and zigzag and alternate scan conversion circuits. Hardware cost and performance of this module are mainly affected by the 2-D DCT and 2-D IDCT. In the proposed architecture, it is shown that a single 1-D DCT/IDCT could take the roles of the 2-D DCT and 2-D IDCT. It is capable of reusing a single 1-D DCT/IDCT four times. It is based on the row-column decomposition technique. It can be achieved through precise timing schedules. Intuitively, three 1-D DCT/IDCT and a matrix transposition memory could be saved as compared to the conventional architectures, which usually use two one-dimensional transforms and transposition memory. Even though there are some extra circuits due to timing controls and processing sequence schedules, this architecture takes about 24% and 50% respectively less area than the architectures published by Miyazaki et al. (1993) and by Matsiu et al. (1994). This design and implementation are applicable to the MPEG-2 video encoder accepting NTSC and PAL image formats in which the number of clocks to be allocated during a macro block period is 1320 for 54 MHz operating clock. To reduce its processing time, the proposed architecture uses a 3-bit serial distributed arithmetic method. As a result, this architecture can be characterized to maximize the utilization of the hardware resources, end can be used for encoders having a similar structure as the MPEC-2 video encoder. It also can be applied to the ASIC chips for multimedia services especially requiring low hardware complexity.

Performance of OFDM/CDMA system with turbo coding in a multipath fading channel

Abstract: The performance of an OFDM/CDMA system with turbo coding is analyzed and simulated in a multipath fading channel. The bit error probability is derived for a frequency-selective Rayleigh fading channel. In the OFDM/CDMA system, OFDM and CDMA are combined to exploit the advantages of both techniques. For decoding the turbo code, a MAP decoding algorithm is employed. Implementation issues are discussed for OFDM, a CDMA system, and a turbo decoding procedure. From the simulation results, it is demonstrated that turbo coding offers considerable coding gain with reasonable encoding/decoding complexity. Also, it is shown that the BER performance is substantially improved by increasing the interleaver length for a fixed code rate and the increasing number of iterations used in the decoding process. The results in the paper can be applied to the design of OFDM-based CDMA system.

An image resolution enhancing technique using adaptive sub-pixel interpolation for digital still camera system

Abstract: An image resolution enhancing technique is described. It is based on extracting 1-dimensional characteristic curves from subsequent frames and sub-pixel displacement values. Through sub-pixel mapping and adaptive interpolation, a high-resolution image can be obtained from several low-resolution image frames. This 1-dimensional algorithm is simple and cost-effective, and can be easily applied in real-time processing for digital still camera application.

Variable rate vector quantization scheme based on quadtree segmentation

Abstract: Quadtree segmentation is a hierarchical spatial decomposition technique that partitions an image into variable-sized blocks based on a quadtree structure Different coding strategies can be adopted to encode blocks of different perceptual significance In this paper, an novel variable rate vector quantization scheme based on quadtree segmentation is proposed with which low-detailed blocks are adaptively encoded by the mean-subsampled vector quantization while high-detailed blocks by the traditional vector quantization scheme The simulation results show that the proposed variable-block-sized vector quantization scheme achieves better subjective image quality with higher PSNR at low bit rates

Block coded modulation for the reduction of the peak to average power ratio in OFDM systems

Abstract: We propose a block coded modulation (BCM) technique to reduce the peak to average power ratio (PAPR) in OFDM systems. In the proposed technique, binary blocks are mapped to M-ary blocks and M-ary blocks of small sizes with low PAPR are selected. Large size M-ary blocks with low PAPR are constructed by using the selected small size M-ary blocks. Similar to trellis coded modulation, with this technique variable rates ranging from 1 to a rate much higher than 1 of BCM can tie obtained upon different requirements of the random error correction capability in the system, given that the PAPR is below a fixed value. The PAPR gain is defined by comparing with the uncoded OFDM system. Optimal coding gain for the BCM given a PAPR gain is also obtained in various cases.

Efficient FFT and equalizer implementation for OFDM receivers

Abstract: The FFT and equalizer units are core components of OFDM receivers for multicarrier reception in consumer applications. This paper presents a novel FFT architecture with adaptive scaling and a new equalizer architecture circumventing the need for explicit arithmetic division. For the example of DVB-T COFDM terrestrial digital TV reception, the tradeoff between complexity and performance is investigated under relevant reception conditions.

A PRML detector for a DVDR system

Abstract: In this paper, adaptive algorithms for updating the coefficients of an equalizer and a 2-state Viterbi detector for a partial response maximum likelihood (PRML) detector in a digital versatile disc record (DVDR) system are proposed and implemented with field programmable gate array (FPGA). The conventional partial response (PR) equalization method, derived under the conventional minimum mean square error (MMSE) criterion, exhibits performance degradation due to high-frequency noise enhancement effect of the equalizer in the process of compensating the low pass characteristic of an optical channel with an eight-to-fourteen modulation-plus (EFMPlus) coded input. The proposed equalization method achieves performance improvement by effectively equalizing the channel output at the important points, i.e. zero-crossing points, where the information on actual recorded bits is stored. Considering the speed limit of the FPGA chip, the maximum likelihood (ML) detector is implemented by a 2-state Viterbi algorithm which has similar performance to the original 6-state Viterbi detector by selecting an appropriate value for threshold. Following performance analyses of the proposed algorithms for PRML detector by various computer simulation, the PRML detector is implemented by FPGA chip.

Preliminary DTV field test results and their effects on VSB receiver design

Abstract: The Federal Communication Commission (FCC) has selected the Advanced Television System Committee (ATSC) digital television (DTV) standard (except for video formats) as the new terrestrial standard for the United States. The U.S. has begun the transition from the 50+-year old analog NTSC system to the new digital ATSC system. A brief overview of ATSC's digital vestigial sideband (VSB) transmission system is covered, as well as the methodology used in field-test data gathering and data analysis. Results from DTV field tests in several U.S. cities by early adopter DTV broadcasters are summarized. Finally, FCC planning factors for consumer DTV receivers that are used in allocating spectrum for the 1600+ broadcast stations based on NTSC replication are discussed along with digital VSB receiver target design parameters that were developed as a result of these VSB field tests.

A design of a 10-W single-chip class D audio amplifier with very high efficiency using CMOS technology

Abstract: A one-chip integrated circuit (IC) of a 10-W class-D audio power amplifier with very high efficiency using CMOS technology is presented. A mixture of a class D output stage and a bridge tied load (BTL) is the main topology of the proposed amplifier. The new 10-W IC audio power amplifier operates at 12 V with the efficiency of more than 90% and the total harmonic distortion (THD) of 0.1%. The amplifier is implemented in a 4-/spl mu/m double-metal, single-poly CMOS technology that provides with relatively high voltage (12 V) MOSFETs.

A scalable video compression technique based on wavelet transform and MPEG coding

Abstract: We present a scalable coding scheme based on the discrete wavelet transform (DWT) and MPEG coding for video applications. It utilizes the hierarchical pyramid structure that provides multiple resolutions. The DWT decomposes the image into several bands. In each band, a fixed-size motion compensated MPEG coder with custom-designed quantization tables and scanning direction is employed. This scheme has the advantages of reusing the widely available MPEG hardware and software as well as relieving the limitation of the image size imposed by the MPEG hardware technology. The simulation results show that the DWT-MPEG coding method improves the image quality over ordinary MPEG coding by 0.3/spl sim/1.5 dB.

Design of an efficient VLSI architecture for 2-D discrete wavelet transforms

Abstract: We present a VLSI architecture for the separable two-dimensional discrete wavelet transform (DWT) decomposition. Using a computation-schedule table, we show how the proposed separable architecture uses only a minimal number of filters to generate all levels of DWT computations in real time. For the computation of an N/spl times/N 2-D DWT with a filter length L, this architecture spends around N/sup 2/ clock cycles, and requires 2NL-2N storage units, 3L multipliers, as well as 3(L-1) adders.

Performance analysis of an MPEG-II audio/video player

Abstract: An MPEG audio/video player in software is implemented on a commercial operating system and is detailed evaluated. The primary purpose of this work is to explore new system technologies in quality-of-service (QoS) support for advanced multimedia applications. Here, we address the performance analysis of this software-MPEC-II player and report the experiences in performance tuning and QoS enhancements via empirical experiments.

A cost-effective 8/spl times/8 2-D IDCT core processor with folded architecture

Abstract: A dedicated cost-effective core processor of the 8/spl times/8 two-dimensional (2-D) inverse discrete transform (IDCT) architecture based on the direct realization approach is proposed. The folding scheme is developed to obtain a low gate-count and high throughput. The experimental result shows that the chip's throughput is one pixel per clock cycle with a structure of 78 K transistors, which reveals that the low cost of VLSI implementation is more attractive than most of previously reported chips. With 0.6 /spl mu/m CMOS, double metal technology, the chip is a standard-cell implementation and requires a core size of 4.4/spl times/2.8 mm/sup 2/, and is able to operate at a clock rate of more than 100 MHz.

A low-voltage topology for CMOS RF mixers

Abstract: This paper presents a 0.5 /spl mu/m CMOS mixer for RF applications. The core consists of a quad differential pair, with resistive degeneration, implemented with MOS transistors in the linear region. This topology proves to be suitable for low voltage, highly linear down-converters. Compared with a CMOS Gilbert cell, it features a better linearity with a lower supply voltage. The mixer is powered at 2 V supply and drains 3.8 mA; the IIP3 and the single side band NF are given respectively by 21 dBm and 24 dB. In terms of spurious free dynamic range, the present circuit compares favorably with other reported mixers, operated at low voltage, both in bipolar and CMOS technologies. This is true even though a significant contribution to the noise figure comes from the IF stage, due to the very low supply.

An FPGA receiver for CPSK spread spectrum signaling

Abstract: In this paper, we present the design, implementation and testing of an M-ary direct sequence spread spectrum receiver suitable for wireless home networking applications. The receiver employs a novel code-phase-shift keying (CPSK) signaling scheme, in which each of the M signaling waveforms is derived from a different phase shift of a single pseudonoise code sequence. The receiver consists of an IF demodulator and a CPSK baseband decoder, implemented using discrete components and an FPGA (field programmable gate array) chip, respectively. A modified double-dwell serial search scheme is used for code acquisition and tracking, and the carrier-phase synchronization is solved by a Costas loop in the IF demodulator and a double threshold detection scheme in the CPSK decoder. Measurements of receiver performance are presented and compared with theoretical calculations.

Design of MPEG-2 video test bitstreams

Abstract: The MPEG-2 video specification is quite flexible. Many parameters in the standard must be interpreted correctly for a decoder to reconstruct encoded video data. It needs a well defined procedure to verify that a MPEG-2 decoder is compliant with the standard. This paper presents a design method of MPEG-2 video test bitstreams, which examines whether an MPEG decoder under test (DUT) produces correct images. The test bitstreams are designed to produce a uniform gray image if the DUT complies with the standard to facilitate error detection. The presented test bitstream is composed of two parts: the first part generates an image by varying a test parameter and the second part is predictive coded with a zero motion vector and a difference image which is the negative of the correct test pattern. It will cancel the test pattern and a uniform image will result if the decoder conforms to the standard. Also, we analyze the characteristics of the test bitstream in the public domain and present a design method of test bitstreams.

Generation of multiviewpoint video from stereoscopic video

Abstract: This paper proposes a new technique for generating multiviewpoint video from a two-view stereo video sequence. The two-view stereo video can be easily obtained by using inexpensive two-view stereo video capture devices. For each image pair in the two-view stereoscopic video signals, our system first estimates the corresponding points of each pixel based on an epipolar constraint. A smoothing algorithm is used to smooth the estimation result, and then generate the disparity maps for each image pair. Then the proposed system can generate multiple perspective stereo video by interpolating or extrapolating the original views based on the generated disparity maps. Compared to the traditional method of capturing the multiple perspective video directly, our method can significantly reduce both the difficulties of video capturing and processing as well as the amount of video data.

Effects of bandpass sigma-delta modulation on OFDM signals

Abstract: This paper presents a behavioural analysis of bandpass OFDM signals sampled and quantized by means of a sigma-delta A/D architecture. It describes the direct effects of sigma-delta modulation on OFDM signals with a variable number of subcarriers by measuring bit-error-rate degradations. Due to the Gaussian characteristic of OFDM signals, the study has been approached from a statistical point of view.