# Showing papers in "IEEE Transactions on Electronic Computers in 1964"

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TL;DR: A design is developed for a multiplier which generates the product of two numbers using purely combinational logic, i.e., in one gating step, using straightforward diode-transistor logic.

Abstract: It is suggested that the economics of present large-scale scientific computers could benefit from a greater investment in hardware to mechanize multiplication and division than is now common. As a move in this direction, a design is developed for a multiplier which generates the product of two numbers using purely combinational logic, i.e., in one gating step. Using straightforward diode-transistor logic, it appears presently possible to obtain products in under 1, ?sec, and quotients in 3 ?sec. A rapid square-root process is also outlined. Approximate component counts are given for the proposed design, and it is found that the cost of the unit would be about 10 per cent of the cost of a modern large-scale computer.

1,750 citations

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TL;DR: The author develops an adder tree to sum this set when t= 1 the maximum number of regions intersections of n t-flats and shows that a tree will be dependent on both t and n.

Abstract: will be less than Cnt+1(t+1)! but may be space into which the latter may be divided multiplier into twenty 2-bit segments. He (and usually will be) more than (t+2)!. by a maximum possible number of mutual then develops an adder tree to sum this set When t= 1 the maximum number of regions intersections of n t-flats. In general, q will be of twenty entries. He then shows that a tree will be dependent on both t and n. It is first shown of nineteen adders (I believe twenty are

430 citations

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TL;DR: This paper describes the development of a procedure that enables a digital computer to solve ``apictorial'' jigsaw puzzles, i.e., puzzles in which all pieces are uniformly gray and the only available information is the shape of the pieces.

Abstract: This paper describes the development of a procedure that enables a digital computer to solve ``apictorial'' jigsaw puzzles, i.e., puzzles in which all pieces are uniformly gray and the only available information is the shape of the pieces. The problem was selected because it provided an excellent vehicle to develop computer techniques for manipulation of arbitrary geometric patterns, for pattern identification, and for game solving. The kinds of puzzles and their properties are discussed in detail. Methods are described for characterizing and classifying piece contours, for selecting and ordering pieces that are ``most likely'' to mate with a given piece, for determining likelihood of fit, for overcoming ambiguities, and for evaluation of the progressive puzzle assembly. An illustration of an actual computer solution of a puzzle is given.

253 citations

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TL;DR: The paper shows how the syntactic structure of text may be described, and then goes on to suggest that a similar analysis may be performed on the class of pictures under study, to suggest as an alternative to the synthetic approach in which artificial languages are specified and then learned and used.

Abstract: This paper considers a class of information sources consisting of text and pictures. The text is English language text appearing in scientific and technical documents. The picture sources are the largely schematic pictures that occur in the same class of documents. However, the discussion is broadened slightly to include other picture sources. For a tiny fragment of English, the paper shows how the syntactic structure of text may be described, and then goes on to suggest that a similar analysis may be performed on the class of pictures under study. The description of these two kinds of information sources with a single class of descriptive techniques is suggested as an alternative to the synthetic approach in which artificial languages are specified and then learned and used. The major reason for doing syntactical analysis of such sources discussed here is that several information processing operations, amounting to the interpretation of the information sources looked upon as languages, can be done by the technique of syntax direction which uses the results of syntactic analysis to mediate subsequent processes for manipulating the information tokens. The paper concludes with an illustration of an algorithm for matching the sentences given by a simple grammar against the class of simple pictures which these sentences purport to describe.

198 citations

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TL;DR: This paper is concerned with the choice of the logical properties for each cutpoint cell, so that an array of these cells is capable of efficient and general combinational and sequential logic.

Abstract: A cutpoint cellular array is a two-dimensional rectangular arrangement of square cells, each of which has binary inputs on the top and left edges and outputs on the bottom and right edges. Each cell is interconnected with neighboring cells, and it is specialized by a set of binary constants that are termed cutpoints. This paper is concerned with the choice of the logical properties for each cutpoint cell, so that an array of these cells is capable of efficient and general combinational and sequential logic. Logical design algorithms are given, as well as a number of actual designs. It is believed that cutpoint cellular arrays have promise for application in the manufacture of a large number of integrated circuit components on one substrate.

127 citations

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CA Technologies

^{1}TL;DR: The syntactic rules for many programming languages have been expressed by formal grammars, generally variants of phrase-structure grammar, but major problems remain in rendering analyzers efficient in use of space and time and in finding fully satisfactory formal Grammars for present and future programming languages.

Abstract: The syntactic rules for many programming languages have been expressed by formal grammars, generally variants of phrase-structure grammars. The syntactic analysis essential to translation of programming languages can be done entirely mechanically for such languages. Major problems remain in rendering analyzers efficient in use of space and time and in finding fully satisfactory formal grammars for present and future programming languages.

88 citations

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TL;DR: This paper considers the problem of economical assignment of codes to the internal states of sequential circuits, and develops methods to minimize both the number of gates and of gate inputs (diodes) required to realize a given sequential circuit.

Abstract: This paper considers the problem of economical assignment of codes to the internal states of sequential circuits. The only restriction placed on these circuits is the fact that they are assumed to be clocked. The internal logic is realized with two-level diode or transistor circuitry, and the methods given here minimize both the number of gates and of gate inputs (diodes) required to realize a given sequential circuit. Methods are first developed for the coding of small fully specified state tables for which only the internal logic is to be minimized. These methods are then successively extended to cover the situations where it is desired to minimize simultaneously both the internal logic and the output logic of a sequential circuit, where the state tables are not fully specified, and where the size of the state tables is arbitrarily large. A method for dealing with the special class of ``counter-like'' state tables is also given. All the procedures presented here are designed to be easily programmable on a digital computer, and several of these methods have been so programmed. Our methods are discussed and compared with other existing procedures.

87 citations

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TL;DR: This paper presents methods for realizing simple threshold functions of n arguments by networks of k-input majority gates, where k≪n.

Abstract: This paper presents methods for realizing simple threshold functions of n arguments by networks of k-input majority gates, where k≪n. An optimal network realization of the 5-argument majority function using 3-input majority gates is given, and it is then generalized by steps with realizations for the (2n-l)-argument majority function (where n = 3, 4, ...) using (2n-3)-input majority gates, and then for the (2n-1)-argument majority function using (2k-l)-input majority gates (where k≪n). In a final generalization an array network using (2k-l)-input majority gates introduced for the realization of an (m/n), ``simple,'' threshold function (where m = 1, 2, ...,n). The array network is then applied to the synthesis of arbitrary symmetric functions; in the latter synthesis a realization of ``adjustable logic'' is given where, by simple control of network connections, the same network can be made to compute any symmetric function. The specific networks for ``5 by 3's'' (5-argument majority function realized by a 3-input majority gate), ``7 by 5's'', and ``7 by 3's'' are the best known.

85 citations

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TL;DR: This paper illustrates the use of SOL, a general-purpose algorithmic language useful for describing and simulating complex systems, by describing a number of individual processes which simultaneously enact a program very much like a computer program.

Abstract: This paper illustrates the use of SOL, a general-purpose algorithmic language useful for describing and simulating complex systems. Such a system is described as a number of individual processes which simultaneously enact a program very much like a computer program. (Some features of the SOL language are directly applicable to programming languages for parallel computers, as well as for simulation.) Once a system has been described in the language, the program can be translated by the SOL compiler into an interpretive code, and the execution of this code produces statistical information about the model. A detailed example of a SOL model for a multiple on-line console system is exhibited, indicating the notational simplicity and intuitive nature of the language.

64 citations

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IBM

^{1}TL;DR: The computer-aided design method described in this paper, besides eliminating drudgery and error, would permit several system designs to be attempted and evaluated; a permanent record of the chosen system would also be available for future modifications, maintenance, and simulation.

Abstract: This paper presents the results of an attempt to automate part of a formalized method of system design. Basic to this method are two languages, Boolean algebra and a register transfer language. From a Boolean algebra description a digital system can be constructed while the second language can be used in a step by step description of the execution of each instruction. To illustrate, a register transfer language is used to give a description of an adder considered as part of a digital system. This description is then translated into a set of Boolean equations. Next, the automation of this translation by using a syntax-directed compiler is explained. The compiler requires a syntactic description of register transfers. This description is given using a meta-language called Backus normal form. A Backus normal form description of Boolean equations that is used for translating Boolean equations into register transfers is also given; this translation process is called analysis. The feasibility of computer-aided design and analysis is thereby demonstrated. The computer-aided design method described in this paper, besides eliminating drudgery and error, would permit several system designs to be attempted and evaluated; a permanent record of the chosen system would also be available for future modifications, maintenance, and simulation. The analysis programs could be used to check the effect on the system of any changes made in the Boolean equations (or equivalently the logical diagrams) and the effect of any unused operation codes.

54 citations

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TL;DR: The complete set of orthogonal functions of binary variables called Walsh functions can be obtained as direct products of the subclass of these functions known as Rademacher functions, which can be conveniently represented by a square matrix of l's and ?

Abstract: The complete set of orthogonal functions of binary variables called Walsh functions can be obtained as direct products of the subclass of these functions known as Rademacher functions. The complete set of Walsh functions can be conveniently represented by a square matrix of l's and ?1's, which, when normalized, is an orthogonal matrix. The correct Rademacher functions to multiply together to obtain a specified Walsh function can be determined without the use of recursion formulas by reference to a simple modification of the reflected binary code. A binary equivalent of the Walsh matrix, consisting of 0's and 1's, can be generated directly by multiplying together, modulo 2, two simpler matrices easily obtained from the reflected binary code and natural binary code, respectively. A modified Walsh matrix that has a simple recursive structure can be obtained by rearranging the rows of the fundamental Walsh matrix. A binary equlivalent of thle former can also be generated directly by multiplying together, modulo 2, two simpler matrices easily obtained from the natural binary code alone. A transformation matrix for direct conversion of the Walsh matrix from its fundamental to modified (or modified to fundamental) form can be written by observing how the rows of the natural binary code are rearranged to form the modified reflected binary code.

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IBM

^{1}TL;DR: An informal description of the LOTIS language is presented, intended for formally describing the logical structure, the sequencing, and the timing of digital machines.

Abstract: An informal description of the LOTIS language is presented. LOTIS is intended for formally describing the logical structure, the sequencing, and the timing of digital machines. An effort has been made to produce a hardware notation that is convenient and lucid, precise and flexible. In a LOTIS machine description, every linguistic constituent corresponds to a unique machine element. Timing can be specified in the synchronous or asynchronous mode or in any combination of both. Autonomous control units have a notational counterpart by which, concurrency of several machine sequences, timesharing of facilities by several control units, and interlocks, can be concisely expressed. A machine description has a hierarchical structure with an arbitrary number of levels; this permits it to be readily segmented. Depending on the focus of interest, the level of descriptive detail can be varied over the different segments.

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Olivetti

^{1}TL;DR: In connection with the problem of two-level minimization of Boolean functions, the formulas which give the following quantities of statistical interest are obtained: average numbers of k cubes, prime k cubes and essential k cubes of a Boolean function.

Abstract: In connection with the problem of two-level minimization of Boolean functions, we have obtained in a combinatorial way the formulas which give the following quantities of statistical interest: average numbers of k cubes, prime k cubes and essential k cubes of a Boolean function. The parameters which appear in our formulas are: number of variables, number of ``one'' vertices and number of ``don't care'' vertices.

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IBM

^{1}TL;DR: An over-all view of the FORMAC language is given to permit the manipulation of mathematical expressions and samples of complete FORMAC programs are included.

Abstract: The purpose of this paper is to give an over-all view of the FORMAC language. FORMAC is an experimental programming system designed to permit the manipulation of mathematical expressions. The paper includes a brief description of the FORMAC language and samples of complete FORMAC programs. It should be noted that FORMAC is an experimental program, and that at the present time IBM has no intention of releasing it to their customers.

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IBM

^{1}TL;DR: A programmed algorithm automatically derives effective recognition logics from representative samples of characters for mixed-font characters from six to 11 different fonts over a wide range of printing quality.

Abstract: This paper contains a discussion of a programmed algorithm for designing multifont recognition logics. This design algorithm automatically derives effective recognition logics from representative samples of characters. It has been applied to design. translational invariant logics for upper and lower case typewritten alphabets. Recognition performances in the order of a few errors per thousand characters have been achieved for mixed-font characters from six to 11 different fonts over a wide range of printing quality.

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TL;DR: SOL is described using meta-linguistic formulas as used in the definition of ALGOL 60 to give a formal definition of a general-purpose algorithmic language useful for describing and simulating complex systems.

Abstract: This paper gives a formal definition of SOL, a general-purpose algorithmic language useful for describing and simulating complex systems. SOL is described using meta-linguistic formulas as used in the definition of ALGOL 60. The principal differences between SOL and problem-oriented languages such as ALGOL or FORTRAN is that SOL includes capabilities for expressing parallel computation, convenient notations for embedding random quantities within arithmetic expressions and automatic means for gathering statistics about the elements involved. SOL differs from other simulation languages such as SIMSCRIPT primarily in simplicity of use and in readability since it is capable of describing models without including computer-oriented characteristics.

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TL;DR: This paper counts through five variables the number of equivalence classes of invertible Boolean functions under the group operation of complementation, permutations, and complementation and permutation, linear transformations and affine transformations.

Abstract: A Boolean function has an inverse when every output is the result of one and only one input. There are 2n! Boolean functions of n variables which have an inverse. Equivalence classes of these functions are sets of equivalent functions in the sense that they are identical under a group operation on the input and output variables. This paper counts through five variables the number of equivalence classes of invertible Boolean functions under the group operation of complementation, permutation, and complementation and permutation, linear transformations and affine transformations. Lower bounds are given which experimentally give an asymptotic approximation. A representative function is given of each of the 52 classes of invertible Boolean functions of three variables under complementation and permutation. These are divided into three types of classes, 21 self-inverting functions, three functions have an inverse in the same class and 14 pairs of functions, each function of the pair in a different class. The four representative functions under the affine transformation are self-invertible.

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TL;DR: The algorithms derived in this paper provide the nucleus of a systematic procedure for the construction of economical state assignments for sequential machine state assignments with reduced dependence.

Abstract: This paper is an extension of the work of Hartmanis and Stearns on sequential machine state assignments with reduced dependence. In Section II the critical partition pairs of transition-incomplete sequential machines are defined, and methods are given for computing them. Section III pursues certain combinatorial problems associated with the construction of assignments with reduced dependence, once the critical partition pairs are known. The algorithms derived in this paper provide the nucleus of a systematic procedure for the construction of economical state assignments.

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IBM

^{1}TL;DR: An application of cyclic errorcorrecting codes in multiple-Parallel channels is studied and three methods are given to perform this serial-to-parallel transformation of linear feedback shiftI2 lJ2 register circuits.

Abstract: Linear-feedback shift-register circuits have been studied extenOE--Exclusive OR Gate sively.'-' These studies concentrated mainly on the serial case, i.e., Fig. 1-Polynomial g(x) = +x3+x4+x1+x6. with one input channel and one output channel. In practical cases, circuits with parallel multiple-channel inputs and outputs are also considered important. In this paper, an application of cyclic errorcorrecting codes in multiple-parallel channels is studied. A design will start in a conventional way for a serial circuit, which is then transformed into a required parallel circuit. Three methods are given to I7] perform this serial-to-parallel transformation of linear feedback shiftI2 lJ2 register circuits.

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TL;DR: This paper presents a method of obtaining for any given machine M an equivalent machine M?

Abstract: One of the most important and complicated problems in the synthesis of a sequential machine described by a state diagram or table is the assignment of the states of the secondary variables to the states of the machine. The secondary assignment for a given machine varies in accordance with the requirements of the design. It has already been shown that the partition with the substitution property and the partition pairs are of great significance in the secondary assignment. However, only few machines possess these properties, and hence, a more general method is needed. This paper presents a method of obtaining for any given machine M an equivalent machine M? which has a partition with the substitution property or partition pairs and therefore can be decomposed into two or more submachines connected in cascade or possibly in parallel. It is also shown that for machine M? we can find an assignment with self-dependent subsets. The method is shown to be general for any completely or incompletely specified sequential machine.

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TL;DR: It is shown that in obtaining solutions by residue arithmetic, the residue mode computation time approaches one sixth that required in the conventional mode as the equation systems become more complex.

Abstract: Residue arithmetic has the interesting characteristic that in multiplication, addition and subtraction any digit in the result is dependent only on its two corresponding operand digits. Consequently, for these operations, residue arithmetic is inherently faster than the conventional weighted arithmetics. A system design approach for exploiting the desirable characteristics of both residue and conventional number theory in digital computers is the principal topic of this paper. Criteria for selecting the moduli, and general techniques for implementing the residue arithmetic operations by simple modifications of conventional circuitry are described. A specific system with a conventional word length of 25 bits and a residue system with moduli 128, 127, 63 and 31 are treated in detail, showing that in comparison to the conventional mode of computation, residue arithmetic addition and subtraction are 3 times faster and multiplication is 12 times faster. As an example of the usefulness of the approach, the problem of solving systems of simultaneous linear equations is considered. It is shown that in obtaining solutions by residue arithmetic, the residue mode computation time approaches one sixth that required in the conventional mode as the equation systems become more complex.

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TL;DR: A number of decision problems are resolved for these classes of grammars and the languages they generate, largely in the negative.

Abstract: Phrase-structure grammars were first introduced and studied by Chomsky as devices for generating the sentences of a language. By means of increasingly heavy restrictions on the productions (rewriting rules), four types of grammars were singled out by Chomsky: type 0 (unrestricted), type 1 (context-dependent), type 2 (context-free), and type 3 (finite state). In this paper, a number of decision problems are resolved for these classes of grammars and the languages they generate, largely in the negative. A table of decision problems for grammars of the four different types is presented. This table indicates the problems which have been found to be decidable or undecidable. The ambiguity problem for type 3 grammars and the emptiness and infiniteness problems for type 2 grammars are shown to be decidable. A known unsolvable problem, the Post correspondence problem, is the key to the undecidability proofs which are given. For type 2 grammars, the ambiguity and equivalence problems are proved undecidable; the emptiness and infiniteness problems for type 1 grammars are shown to be undecidable. There is no algorithm to decide whether a language of a given type can be generated by a grammar of a more restricted type. The results on type 2 grammars were first obtained by Bar-Hillel, Perles, and Shamir.

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TL;DR: A standard method for testing and realizing a threshold function is to solve a set of linear inequalities in which the unknowns are the n weights to be assigned to the n variables, but this method results in a simpler set of inequalities which furnishes direct information on 1-realizability of the function and on the assignment of weights for realization, often without the necessity for trial and adjustment.

Abstract: A standard method for testing and realizing a threshold function is to solve a set of linear inequalities in which the unknowns are the n weights to be assigned to the n variables. In this paper a simple method of solving this set of inequalities is presented. Instead of using the weights themselves as the unknowns, a set of n new unknowns, the incremental weights ?a 1 , ?a 2 , . . ., ?a n?1 , together with the lowest weight a n , is used. This change of unknowns results in a simpler set of inequalities which, in turn, furnishes direct information on 1-realizability1 of the function and on the assignment of weights for realization, often without the necessity for trial and adjustment.

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TL;DR: The linguistic basis for the Logic Design Translators system is discussed; the translator resembles closely a compiler system; the several language levels involved in the logical design process are discussed and a relationship between language and machine design is demonstrated.

Abstract: The original work on Logic Design Translators was motivated by the realization that it is possible to automate, to a certain degree, the repetitious and time-consuming process of developing logic equations for digital computers. In this paper, the linguistic basis for the system is discussed. An experiment which explains the translation process is also presented. The translator resembles closely a compiler system; the several language levels involved in the logical design process are discussed. Finally, a relationship between language and machine design is demonstrated.

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TL;DR: In comparing his method with the authors', Mivata concludes that their method "depends mainly on special Ju= xy(0 + 0) 0 algebraic properties of the given logical function," and that his "method is better fuz XY( + u) = than the method of Cohn and Lindaman F(u except for certain special cases."

Abstract: We read Miyata's recent paper' with inand 2) requires no greater appeal to in\"commonly.\" I do not mean that my terest. We take issue only with his conclugenuity Indeed our derivation seems to remethod is anecessarily\" superior to Cohn sion that his method is, except in special quire less ingenuity than Mivata's. and Lindamans method except in special cases, necesarilsueri s2 The fundamental theorem of majoritycases. cases, necessarily superior to our .= deiso loi,a ie nou aleae,i Eveni h aeo i zFoadFo-~Fl In developing combinational switching decision logic asgivenin ourearlierpaper, is there may be some case in Fwhich Cohn and theory, one may consider 1) the number of Lindaman's method may lead us to a better logic elements in any network and 2) the F(X, Y, Z, Q) result. But we do not know if it is always so fan-in of each element. The number of eleor how to get the result. In the meaning that ments per network is, of course, virtually = (X # Y #f -) # (X # Y if ) #fy (1) unlimited, whereas the fan-in of each is of some elements, I think my methods are usually severely restricted by physical conwhere menale I the cs oftF1sF and siderations. Nevertheless, orthodox writers on majority (threshold) logic tacitly make Ly F(X, X, Z, Q) Fu0 #F01. FUSACHIKA MIYATA the opposite assumptions. They take the eleResearch Lab. of Precision ments per network to be severely restricted fxya F(X, X, Z, Q), Machinery and Electronics (usually to one), but fan-in to be unlimited. Tokyo Inst. of Tech. They therefore tend to elaborate logic theory and X#Y#Z denotes a binary quantity that Ookayama, Meguro-ku Tokyo for physically impossible devices. Japan It is accordingly refreshing to find times written mX(Y +Z)+XYZ\") Miyata attacking the real problem: synLike Miyata, we recognize that the first 3Received November 5, 1963. thesis of networks of components having term of I is just x.(y#z#u). Application of limited fan-in. Further, his method appears (1) to the second term yields to be both useful and novel. In comparing his method with ours, Mivata concludes that our method \"depends mainly on special Ju= xy(0 + 0) 0 algebraic properties of the given logical function,\" and that his \"method is better fuz XY( + u) = than the method of Cohn and Lindaman F(u except for certain special cases.\" Indeed, he .... z ) = (u i z # x y) # (i# z # xY) #0 A Note on Tributary Switching seems to prove that his method is necessarily = ( a z f x (\" i z # x Networks better than ours for a broad class of functions specified by his condition (63b). The -(u 4 h4 ~) .(~ f~ ) In recent articles, K. K. Maitra1 and one example he gives of such a function isJ. Sklansky2 discuss methods of synthesis for \"cascaded\" or \"tributary\" switching netI = xIyzu + y(z + u)} + xcy(zi + fu). The last step above seems to be the only works composed of two-input gates (see

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Raytheon

^{1}TL;DR: Noetathobevrscsifainofn multiplied by decimal-place weights is much more restrictive than codisets, and is applied only when the products of h's digital computers are made.

Abstract: codes is much more restrictive. As far as the REFERENCES author knows, only 53 codisets, each belong-[1] N. R. Scott, 'Analog and Digital Computer TechR() [()l[lpl-)C21pf() ing to one of the 53 codes included in the nology,\" McGraw-Hill Book Company, Inc., New starred weight sets of Table I, lend them[]York, N. Y., ppr. 231-235; 1960. inDgia +[2-8(x)][C21(1-P)f2(x) 2)R. K. Richards, 'Arithmetic Operations i iia selves to a universal encoding algorithm emComputers,' D. Van Nostrand Co., Inc., Princeploying exactly one binary decision per bit, [1ton, N. J., ppr. 178-183; 1955 systems for dx (1) 3]G. S. White, 'Coded-decimal number csyft(m)]}for and these only when the products of h's digital computers,' PROC. IRE, vol. 41, pp. 14501452;October, 1953.Noetathobevrscsifainofn multiplied by decimal-place weights are ar[4] G. P. Weeg, 'Uniqueness of weIghited code repreNoetathobrv'scsifainofn ranged in monotonically decreasing order. sentations,' IRE TRANS. ON ELECTRONIC COMobservation z is a(z) where 5(x) is a function

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TL;DR: An approach based on correlation techniques is developed for the analysis and synthesis of threshold elements and single-threshold-element realizability of arbitrary Boolean functions of n variables is shown to be dependent on a (n+1)-tuple of real numbers (characteristic vector), derivable solely from the given Boolean function.

Abstract: An approach based on correlation techniques is developed for the analysis and synthesis of threshold elements. A necessary and sufficient condition for linear separability is derived. Single-threshold-element realizability of arbitrary Boolean functions of n variables is shown to be dependent on a (n+1)-tuple of real numbers (characteristic vector), derivable solely from the given Boolean function. The task of finding appropriate weights for a given threshold function is converted to the minimization of a functional. Approximation to this functional relates the desired weights with the characteristic vector. As the degree of approximation increases, exact solution for the weights becomes possible at the expense of increased computational complexity. The absolute value of characteristic vector components is used to tabulate threshold functions compactly. A table is given for functions of up to six variables which permits one to determine directly, whenever it is possible, the weights and threshold that realize a given function without Boolean manipulation of that function into a standard form.