scispace - formally typeset
Search or ask a question

Showing papers in "International Journal of Circuit Theory and Applications in 2018"


Journal ArticleDOI
TL;DR: By introducing a flux-controlled memristor into the proposed multi-wing system, hyperchaotic multi-Wing attractor is observed in new memristive system, which has no equilibrium.
Abstract: Summary In this paper, a new multi-wing chaotic attractor is constructed. Based on the proposed multi-wing system, the paper presents a novel method to generate hyperchaotic multi-wing attractors. By introducing a flux-controlled memristor into the proposed multi-wing system, hyperchaotic multi-wing attractor is observed in new memristive system. At the same time, the new memristive system has no equilibrium. The phase portraits and Lyapunov exponents are used to analyze the dynamic behaviors of the no-equilibrium memristive system. Moreover, we analyze the influence on multi-wing system when adding the memristor in different position. The electronic circuit is realized by using off-the-shelf components. Copyright © 2017 John Wiley & Sons, Ltd.

132 citations






Journal ArticleDOI
TL;DR: A new Multiport zero voltage switching dc‐dc converter that can operate in 3 operational modes of boost, buck, and buck‐boost and has the ability to eliminate the input current ripple is proposed.
Abstract: Int J Circ Theor Appl. 2018;1–24. Summary In this paper, a newmultiport zero voltage switching dc‐dc converter is proposed. Multiport dc‐dc converters are widely applicable in hybrid energy generating systems to provide substantial power to sensitive loads. The proposed topology can operate in 3 operational modes of boost, buck, and buck‐boost. Moreover, it has zero voltage switching operation for all switches and has the ability to eliminate the input current ripple; also, at low voltage side, the input sources can be extended. In addition, it has the ability of interfacing 3 different voltages only by using 3 switches. In this paper, the proposed topology is analyzed theoretically for all operatingmodes; besides, the voltage and current equations of all components are calculated. Furthermore, the required soft switching and zero input currents ripple conditions are analyzed. Finally, to demonstrate the accurate performance of the proposed converter, the Power System Computer Aided Design(PSCAD)/ Electro Magnetic Transient Design and Control(EMTDC) simulation and experimental results are extracted and presented.

34 citations


Journal ArticleDOI
TL;DR: A data‐dependent feedback‐cutting–based bit‐interleaved 12T static random access memory (SRAM) cell is proposed, which enhances the write margin in terms of write trip point (WTP) and write static noise margin (WSNM) and offers a robust write margin when compared with the state‐of‐the‐art memory cells available in the literature.
Abstract: In this work, a data-dependent feedback-cutting–based bit-interleaved 12T static random access memory (SRAM) cell is proposed, which enhances the write margin in terms of write trip point (WTP) and ...

34 citations


Journal ArticleDOI
TL;DR: This work analyzed resistive switching-based memristors by using the charge–flux relations instead of the traditional current–voltage approach to develop a model that can be easily included in circuit simulators.
Abstract: Summary We analyzed resistive switching-based memristors by using the charge–flux relations instead of the traditional current–voltage approach. We employed simulated and experimental data to develop a model that can be easily included in circuit simulators. Physical simulations of devices with different conductive filament sizes were employed to fit the 3-parameter model introduced. Later on, the relations between the model parameters and the conductive filament geometrical features were characterized in-depth. In addition, a model to obtain the energy employed in the reset process was presented. Finally, we used the model to estimate the experimental conductive filament radius distribution using a set of 3000 reset cycles. Copyright © 2017 John Wiley & Sons, Ltd.

30 citations



Journal ArticleDOI
TL;DR: Three different models of memristors operating in extremely large memristive networks such as crossbar structures for memory and computational circuits, memristor‐based neural networks or circuits for massively parallel analog computations are considered.
Abstract: Summary The paper deals with the modeling of memristors operating in extremely large memristive networks such as crossbar structures for memory and computational circuits, memristor-based neural networks or circuits for massively parallel analog computations. Because the non-convergence and other numerical problems increase with increasing complexity of the simulated circuit, suitable models of the individual memristors need to be choicely developed and optimized. Three different models are considered, each representing a specific trade-off between speed and accuracy. Benchmark circuits for testing the applications of various complexities are used for the transient analysis in HSPICE. It is shown how the models can be modified to minimize the simulation time and improve the convergence. Copyright © 2017 John Wiley & Sons, Ltd.

30 citations


Journal ArticleDOI
TL;DR: This manuscript presents a memristor‐based neural network implementing the Stochastic Belief‐Propagation‐Inspired algorithm, an efficient supervised learning algorithm suited for devices with very‐low‐precision synaptic weights and demonstrates how to implement the key features of a machine learning algorithm in real‐world circuitry.

Journal ArticleDOI
TL;DR: Temperature-dependent circuit modeling and performance in terms of propagation delay, power dissipation, and crosstalk-induced voltage waveform at the far end of victim line of multilayer graphene nanoribbon (MLGNR) interconnects have been analyzed at 22 nm technology node.
Abstract: The temperature-dependent circuit modeling and performance in terms of propagation delay, power dissipation, and crosstalk-induced voltage waveform at the far end of victim line of multilayer graphene nanoribbon (MLGNR) interconnects have been analyzed at 22 nm technology node. A comparative performance analysis between MLGNR interconnects with resistance estimated using temperature-dependent model and temperature-independent model is examined. The results obtained are also compared with capacitively coupled interconnects of copper (Cu). The results show that as the temperature is varied from 300 K to 500 K, MLGNR has lower propagation delay and power dissipation as compared to Cu for 1 mm long interconnects. It is also observed that because of the dominance of both low resistance and ground capacitance compared to Cu, MLGNR has better crosstalk-induced delay and voltage waveforms with rise in temperature at the far end of aggressor and victim line, respectively. Further, simulated results show an average relative improvement in propagation delay of 37.24% and corresponding improvement in power dissipation of approximately 19.59% by using a temperature-dependent model in comparison to a temperature-independent model of MLGNR resistance with interconnect lengths varying from 200 to 1000 μm. The reduction in the time duration of victim output pulse over these interconnect lengths also shows a significant improvement of approximately 35% by using temperature-dependent model as against temperature-independent model of MLGNR resistance.

Journal ArticleDOI
TL;DR: Analysis of the row grounding technique shows that increasing the number of rows can help reduce read latency and energy, in contrast to the case of capacitive memory arrays.
Abstract: Summary Using memristive devices within a crossbar array could pave the way for memories with higher density and speed than state-of-the-art Flash memory, while maintaining relatively low energy. However, memristive crossbar arrays have great difficulty distinguishing logical states because of sneak path currents. The row grounding technique eliminates the sneak path effect, allowing reliable sampling of the memristor state. In this paper, we analyze the row grounding technique and propose several methods and constraints for the design of memristive crossbar arrays. When the row grounding technique is used for these arrays, our analysis shows that increasing the number of rows can help reduce read latency and energy, in contrast to the case of capacitive memory arrays. Simulation results confirm the theoretical analysis proposed in this paper. Copyright © 2017 John Wiley & Sons, Ltd.



Journal ArticleDOI
Manjeet Kumar1
TL;DR: A population‐based meta‐heuristic optimization algorithm called as cuckoo search algorithm (CSA) has been implemented in the design of optimal FD‐FIR filter, which reveals the advantages of the proposed FD filter using CSA compared with the FD filter designed using evolutionary algorithm like genetic algorithm and conventional FD filter design methods.


Journal ArticleDOI
TL;DR: A simple non-isolated multiple input (MI) bidirectional DC-DC topology is proposed which can operate in buck, boost, or buck-boost modes and generalized relationships have been proposed for calculation of critical inductance and output voltage ripple of proposed n-input boost topology.
Abstract: Summary In this paper, a simple non-isolated multiple input (MI) bidirectional DC-DC topology is proposed which can operate in buck, boost, or buck-boost modes. The proposed topology utilizes a battery pack to realize the bidirectional power flow operation especially when the input sources are non-storable ones. The excess energy of input sources can be stored in the battery and be injected to the load, when required. Simultaneous or independent power transfer of input sources is also provided. For better evaluation, the proposed topology has been compared with several recently presented novel topologies, from view point of number of inductors, capacitors, switches, and diodes. Comparison results show that the proposed topology utilizes less number of components (switches, inductors, capacitors, and current sensors) which can reduce the size, cost, and complexity of converter. Different operational modes of the proposed topology (unidirectional buck, boost, buck-boost modes, and bidirectional mode) have been presented. Also, boost mode of the proposed topology has been investigated in detail, from design point of view, and generalized relationships have been proposed for calculation of critical inductance (CI) and output voltage ripple (OVR) of proposed n-input boost topology. To validate proposed theoretical concepts, the proposed topology has been modeled and simulated in PSCAD/EMTDC software, and the 3-input boost version has been experimentally implemented. Simulation and experimental results confirm appropriate performance of the proposed topology.


Journal ArticleDOI
TL;DR: Experimental results show that the proposed algorithm has better security in comparison with other algorithms, such as histogram analysis, correlation coefficient analysis, information entropy analysis, differential attack analysis, and UACI have been performed.

Journal ArticleDOI
TL;DR: A small signal transistor can be identified by its performance database to be used in the design optimization of high‐performance low‐noise amplifiers with the full device capacity.
Abstract: Summary In this work, the simultaneous trade-off relations among the noise figure F, gain GT, input Vin, and output Vout VSWRs of a microwave transistor operated at a certain (VDS, IDS, f) condition are obtained fast and as accurate as the corresponding analytical results using multiobjective optimization process without any need for expertise on the microwave device, circuit, and noise. Three powerful evolutionary algorithms, cuckoo search, firefly, and differential evolution, are implemented comparatively as a study case to obtain the trade-off relations of a typical low-noise amplifier transistor NE3511S02 for its operation between 9 and 17 GHz at VDS = 2 V and IDS = 10 mA. Finally, differential evolution is found as the most successful algorithm to demonstrate the typical trade-off relations of NE3511S02. It can be concluded that these trade-off relations being obtained by using a signal and noise model of the transistor enable performance database covering all the (F ≥ Fmin, GT, Vin ≥ 1, Vout ≥ 1) quadruples with their (ZS, ZL) termination pairs using solely an evolutionary optimization process. Thus, a small signal transistor can be identified by its performance database to be used in the design optimization of high-performance low-noise amplifiers with the full device capacity.



Journal ArticleDOI
TL;DR: This work proposes a novel, low‐power, time‐efficient and adaptive memristor‐centred control strategy for the aforementioned robot action, based upon the exploitation of the combined ability of memristors to store and process data in the same physical location.


Journal ArticleDOI
TL;DR: A novel high‐speed redundant‐signed‐digit (RSD)‐based elliptic curve cryptographic (ECC) processor for arbitrary curves over a general prime field based on a new high speed Montgomery multiplier architecture which uses different parallel computation techniques at both circuit level and architectural level.

Journal ArticleDOI
TL;DR: The main result is that the harmonic balance method is quite simple to apply in this rich bifurcation context and is effective to detect Hopf and to accurately predict period-doubling bifURcations of all these different kinds.
Abstract: Summary The paper studies nonlinear dynamics and bifurcations of a class of memristor oscillatory circuits obtained by replacing the nonlinear resistor of a Chua's oscillator with a flux-controlled memristor. A recently developed technique, named flux-charge analysis method, has shown that the state space of such circuits can be decomposed in invariant manifolds, where each manifold is characterized by a different dynamics and different attractors. Goal of the paper is to investigate the use of the harmonic balance method in combination with flux-charge analysis method in order to study the different kinds of bifurcations generated by changing the circuit parameters on a fixed manifold, changing manifold for a fixed parameter set (bifurcations without parameters), or changing simultaneously circuit parameters and manifolds. The main result is that the harmonic balance method is quite simple to apply in this rich bifurcation context and is effective to detect Hopf and to accurately predict period-doubling bifurcations of all these different kinds. Copyright © 2017 John Wiley & Sons, Ltd.

Journal ArticleDOI
TL;DR: Flexible and real‐time capable memristive emulators, which can directly be incorporated into real circuits, can overcome the complexity of single devices with memory and make preinvestigations based on simulations very inefficient and time‐consuming.
Abstract: Present Address Department of Electrical Engineering and Information Technology/Communications Engineering, Ruhr-University, D-44780 Bochum, Germany. Summary Memristive devices are nonlinear resistors with memory. Due to the memory effect, those devices are potential candidates for self-organizing circuits capable of learning from environmental influences in the past. The complexity of single devices with memory in combination with the required huge number of these devices in circuits including them make pre-investigations based on simulations very inefficient and time-consuming. Flexible and real-time capable memristive emulators, which can directly be incorporated into real circuits, can overcome this problem. In our approach, we introduce a general memristor emulator based on wave digital principles. The proposed emulator is flexible, robust, efficient, and it preserves the passivity of the real device in a digital signal processing sense. All these properties result in a reusable emulator, independent of a particular application. This work lists the wave digital emulations of different models from ideal to extended memristors. As an example for an extended memristor, the wave digital emulation of a double barrier memristive device is demonstrated.

Journal ArticleDOI
TL;DR: This part II manuscript proposes circuit‐theoretic models for the new control system based upon an ideal and upon a physical memristor model and demonstrates through numerical simulations how it outperforms the old approach in terms of time‐efficiency and energy‐efficiency, maintaining a good degree of adaptability to changes in environmental conditions.
Abstract: 1Institute of Circuits and Systems, Faculty of Electrical and Computer Engineering, Technische Universität Dresden, Dresden, Germany 2Autonomous Motion Department, Max Planck Institute for Intelligent Systems, Tübingen, Germany 3Department of Electrical Engineering and Computer Sciences, University of California Berkeley, Berkeley, CA, USA 4Fachbereich VII, Forschungslabor Neurorobotik, Beuth Hochschule für Technik Berlin, Berlin, Germany

Journal ArticleDOI
TL;DR: The main fields of application that event‐based image sensors have found during the last 20 years are reviewed and the description of applications where such devices can outperform conventional frame‐based sensors is focused on.
Abstract: Correspondence *Juan A. Leñero-Bardallo. Email: juanle@imse-cnm.csic.es Summary The spread of event-driven asynchronous vision sensors during the last years has increased significantly the industrial interest and the application scenarios for them. This article reviews the main fields of application that event-based image sensors have found during the last twenty years. We focus in the description of applications where such devices can outperform conventional frame-based sensors. The practical functions of the three main families of asynchronous event-based sensors are analyzed. The article also studies what are the factors that increase nowadays the demand of sensors that minimize the power and bandwidth consumption. Moreover, the technological factors that have facilitated the development of asynchronous sensors are discussed.