Showing papers in "Journal of Electronic Packaging in 1993"

An Approximate Thermal Contact Conductance Correlation

Abstract: An approximate thermal contact conductance correlation which does not depend upon the surface asperity slope was developed. Published surface texture data for 65 specimens were used to establish a relationship between the average roughness and the RMS asperity slope, which was then used to develop a new approximate thermal contact conductance correlation. The investigation was conducted for a range of surface roughness typical of contacting surfaces. Comparison to limited test data and to 2080 simulated contact joints, indicates the new approximate thermal contact conductance correlation has an expected RMS error of approximately 23 percent.

Local Characteristics of Convective Heat Transfer From Simulated Microelectronic Chips to Impinging Submerged Round Water Jets

Abstract: An experimental study was performed to investigate the local characteristics of heat transfer from vertical simulated micro-chips to impinging submerged circular water jets. The effects of jet velocity, and nozzle-to-plate spacing were studied in the range of Re = 5.0 × 103 3.6 × 104 . Heat transfer rates at the stagnation point and local heat transfer distributions were correlated. Transition from laminar to turbulent flow was observed.

Effects of Adhesion and Delamination on Stress Singularities in Plastic-Packaged Integrated Circuits

Abstract: The reliability of plastic-packaged integrated circuits is severely affected by the occurrence of delamination. Several types of electrical and mechanical failures are introduced as a result of the delamination, such as metal smear, pattern shift, open channels, passivation cracking, andfracture ofthe plastic encapsulation. An analysis on the basis of fracture mechanics is applied to wedges of two dissimilar elastic media as a modelfor the interfaces between silicon chip andplastic mould compound. The stress state inside the encapsulation and in the vicinity of the edges of the silicon chip is characterized by a stress-singularity parameter. It is shown that loss of adhesion aggravates the singular behavior of the stress components and that delamination induces higher stresses inside the packaging material. This will lead to crack initiation in the plastic encapsulation and also to more rapid crack growth in comparison with undamaged devices. This stress-singularity approach provides an explanation for the observed relation between the occurrence ofdelamination and the increase of the failure frequency in plastic-encapsulated integrated circuits. The thermal effects that arise during the temperature cycling tests are also investigated. For uniformly distributed temperatures it is shown that the stress singularity is determined by the elasticity constants and by geometric effects and that it does not depend on thermal influences.

An Experimental and Finite Element Study of Thermal Fatigue Fracture of PbSn Solder Joints

Abstract: A solder joint specimen has been designed to determine the stress/strain hysteresis response and fracture behavior of 90 percent wtPb/10 percent wtSn solder alloy. The specimen consists of an Al2 O3 beam and an Al 2024-T4 beam bonded together at the ends with solder. The specimen is subjected to thermal cycling to failure between 40°C to 140°C with a 10°C/min ramp rate and 10-minute hold times. Stress/strain hysteresis loops were experimentally determined as a function of thermal cycles. A method based on the stress relaxation data at hold times has been developed to determine the steady state creep parameters of the solder. A constitutive equation for the solder alloy based on elastic and creep deformation has been formulated and implemented in a finite element code, ABAQUS. Good agreement was obtained between the finite element model and the experimental results. In the thermal fatigue test, crack length versus number of thermal cycles was measured for two different shear strain ranges, and the fracture surface was examined with SEM. The SEM results show a combined transgranular and intergranular fracture. In addition, a significant amount of secondary cracks and voids were generated during thermal fatigue which led to material weakening. A thermal fatigue model based on the C* integral, the measured stress history, and creep properties was employed to model the fracture behavior.

Finite Element Method for Predicting Equilibrium Shapes of Solder Joints

Abstract: This paper discusses the development and application of a finite element method for determining the equilibrium shapes of solder joints which are formed during a surface mount reflow process. The potential energy governing the joint formation problem is developed in the form of integrals over the joint surface, which is discretized with the use of finite elements. The spatial variables which define the shape of the surface are expressed in a parametric form involving products of interpolation (blending) functions and element nodal coordinates. The nodal coordinates are determined by employing the minimum potential energy theorem. The method described in this paper is very general and can be employed for those problems involving the formation of three dimensional joints with complex shapes. It is well suited for problems in which the boundary region is not known a priori (e.g., “infinite tinning” problems). Moreover, it enables the user to determine the shape of the joint in parametric form which facilitates meshing for subsequent finite element stress and thermal analyses.

Effect of Chip and Pad Geometry on Solder Joint Formation in SMT

Abstract: An analytical model of solder joint formation during a surface mount reflow process is developed for two-dimensional fillets whose flow may be restricted due to “finite” metallizations on a leadless component and the printed circuit board. Although these height and length constraints on the fillet geometry may result in obtuse contact angles, the solution is obtained in the form of an explicit integral, similar to that previously derived by the authors for the case of acute contact angles. This solution may also be recast into the form of elliptic integrals of the first and second kinds, thereby permitting one to evaluate the fillet geometry using mathematical tables or special function software, if desired, rather than resorting to a computer-based numerical quadrature. In addition an approximate zero-gravity solution is given by means of simple closed-form expressions relating the height, length, contact angles, and cross-sectional area of the fillet. Numerical results generated by implementing the “exact” integral solution for the joint profile are given in the form of dimensionless plots, relating fillet geometry to the solder properties (surface tension and density), amount of solder, chip height, and pad length. Also presented in dimensionless form are the approximate results from the zero-gravity model, which are independent of solder properties, yet are of sufficient accuracy for “small” joints. Because of their dimensionless nature, the results of the present paper may be of maximum utility to process engineers aiming to achieve desired joint geometries (e.g., to maximize fatigue life or to eliminate bridging problems), or to board designers responsible for selecting efficient footprint patterns to maximize board density. Models of solder joint formation, such as the one presented here, may be of most value when used in conjunction with stress analysis packages (e.g., finite element programs) and appropriate fatigue models. In this way an integrated approach to the design of solder joints and circuit boards may be taken, resulting in improved product reliability and performance.

Heat Pipes for Cooling High Flux/High Power Semiconductor Chips

Abstract: Results of an experimental study are reported which demonstrate the ability of heat pipes to simultaneously dissipate high heat fluxes and high total power at low surface temperatures. The application is to cooling high power density (and high total power) semiconductor chip modules. The two designs studied incorporate air or liquid cooling in the condenser sections. The air-cooled design consisted of a manifold base plate with a series of holes drilled in it each of which was lined with sintered copper powder which served as the wick. An array of wick lined tubes was attached normal to the plate and served as the condenser section. The other heat pipe was disk shaped and also had a sintered wick structure. Cooling water channels were placed over the entire periphery of the housing except in the region of heat input. Reported steady heat fluxes are up to 31 W/cm2 corresponding to total power dissipation of up to 1400 W for the water cooled heat pipe and up to 47 W/cm2 (900 W total power) for the air cooled heat pipe with surface temperatures under 100°C.

Forced Convective Cooling Enhancement of Electronic Package Configurations Through Self-Sustained Oscillatory Flows

Abstract: Grooved-channel geometries are formed when electronic components are directly mounted to a substrate. Some grooved-channel geometries have been found to excite and sustain the normally damped instabilities present in Poiseuille flows at lower Reynolds numbers than indicated by linear stability analysis. The resulting selfsustained oscillatory flows improve mixing and thereby enhance convective heat dissipation. Numerical simulations of the flow field and heat transfer characteristics of oscillatory and non-oscillatory flows for five grooved-channel and one suspended block geometry are presented. The extent of heat transfer enhancement is gauged through direct comparison to results corresponding to the steady-flow regime. Local heat transfer coefficients are determined and used to calculate the temperature distribution within a surface-mounted package. Furthermore, the importance of using locally-defined heat transfer coefficients instead of spatially-averaged coefficients for thermal design and analysis is discussed. This work was supported by the Engineering Design Research Center, a National Science Foundation / Engineering Research Center, under cooperative agreement EDC-8943164 and by the National Science Foundation Grant CTS-8908808.

Modeling the Vibration Restraints of Wedge Lock Card Guides

Abstract: One of the most dominate parameters that influence the calculation of a PWB’s natural frequency is the boundary conditions along the edges of the board. A series of experiments was conducted with Calmark three and five-part wedge locks to determine the boundary condition restraint offered by these commonly used card guides. The wedge locks were modeled as simple supports preventing transverse deflection of the plate edge and as linear elastic springs restraining the rotation of the plate edge. The rotational spring constant for the wedge lock was then calculated in an semi-inverse manner by measuring the natural frequency response of a well-characterized plate.

Solder Joint Reliability of Surface Mount Connectors

Abstract: The solder joint reliability of five different surface mount connectors has been studied by eleven different experimental methods. A set of test methods and specifications for determining the reliability of the solder joints of surface mount connectors has been recommended.

Structural Analysis of Printed Circuit Board Systems

Abstract: This is a discussion of the building blocks of electronic circuits - the microchips, transistors, resistors, condensers and the boards that support them - from the point of view of mechanics. After an introduction to the elements of structural analysis and finite-element analysis, the author turns to components, data and testing. A discussion of leadless chip carriers leads to a detailed thermal analysis of pin grid arrays. For compliant leaded systems, both mechanical (bending and twisting) and thermal stresses are discussed in detail. The book concludes with discussions of the dynamic response of circuit cards, plated holes in cards and boards, and the final assembly of cards and boards.

Nucleate Boiling and Critical Heat Flux From Protruded Chip Arrays During Flow Boiling

Abstract: The effects of chip protrusion on the forced-convection boiling and critical heat flux (CHF) of a dielectric coolant (FC-72) were investigated. The multi-chip module used in the present study featured a linear array of nine, 10mm x 10 mm, simulated microelectronic chips which protruded 1 mm into a 20-mm wide side of a rectangular flow channel. Experiments were performed in vertical upflow with 5-mm and 2-mm channel gap thicknesses. For each configuration, the velocity and subcooling of the liquid were varied from 13 to 400 cm/s and 3 to 36° C, respectively. The nucleate boiling regime was not affected by changes in velocity and subcooling, and critical heat flux generally increased with increases in either velocity or subcooling. Higher single-phase heat transfer coefficients and higher CHF values were measured for the protruded chips compared to similar flush-mounted chips. However, adjusting the data for the increased surface area and the increased liquid velocity above the chip caused by the protruding chips yielded a closer agreement between the protruded and flush-mounted results. Even with the velocity and area adjustments, the most upstream protruded chip had higher single-phase heat transfer coefficients and CHF values for high velocity and/or highly-subcooled flow as compared the downstream protruded chips. The results show that, except for the most upstream chip, the performances of protruded chips are very similar to those of flush-mounted chips.