Showing papers in "Journal of Electronic Packaging in 2013"

Comparative Study of Thermal Performance of Longitudinal and Transversal-Wavy Microchannel Heat Sinks for Electronic Cooling

Abstract: Liquid cooling incorporating microchannels are used to cool electronic chips in order to remove more heat load. However, such microchannels are often designed to be straight with rectangular cross section. In this paper, on the basis of straight microchannels having rectangular cross section (SRC), longitudinal-wavy microchannel (LWC), and transversal microchannel (TWC) were designed, respectively, and then the corresponding laminar flow and heat transfer were investigated numerically. Among them, the channel wall of LWC undulates along the flow direction according to a sinusoidal function while the TWC undulates along the transversal direction. The numerical results show that for removing an identical heat load, the overall thermal resistance of the LWC is decreased with increasing inlet Reynolds number while the pressure drop is increased greatly, so that the overall thermal performance of LWC is inferior to that of SRC under the considered geometries. On the contrary, TWC has a great potential to reduce the pressure drop compared to SRC, especially for higher wave amplitudes at the same Reynolds number. Thus the overall thermal performance of TWC is superior to that of SRC. It is suggested that the TWC can be used to cool chips effectively with much smaller pressure drop penalty. In addition to the overall thermal resistance, other criteria of evaluation of the overall thermal performance, e. g., (Nu/Nu(0))/(f/f(0)) and (Nu/Nu(0))/(f/f(0))(1/3), are applied and some controversial results are obtained. (Less)

Development of a Fused Deposition Modeling System for Low Melting Temperature Metal Alloys

Abstract: This research focused on extending the applications of fused deposition modeling (FDM) by extrusion and deposition of low melting temperature metal alloys to create three-dimensional metal structures and single-layer contacts which may prove useful for electronic interconnects. Six commercially available low melting temperature solder alloys (Bi36Pb32Sn31Ag1, Bi58Sn42, Sn63Pb37, Sn50Pb50, Sn60Bi40, Sn96.5Ag3.5) were tested for the creation of a fused deposition modeling for metals (FDMm) system with special attention given to Sn–Bi solders. An existing FDM 3000 was used and two alloys were successfully extruded through the system's extrusion head. Deposition was achieved through specific modifications to system toolpath commands and a comparison of solders with eutectic and non-eutectic compositions is discussed. The modifications demonstrate the ability to extrude simple single-layer solder lines with varying thicknesses, including sharp 90 deg angles and smooth curved lines and showing the possibility of using this system for printed circuit board applications in which various connections need to be processed. Deposition parameters altered for extrusion and the deposition results of low melting temperature metal alloys are introduced.

Two-Phase Liquid Cooling for Thermal Management of IGBT Power Electronic Module

Abstract: Recent trends including rapid increases in the power ratings and continued miniaturization of semiconductor devices have pushed the heat dissipation of power electronics well beyond the range of conventional thermal management solutions, making control of device temperature a critical issue in the thermal packaging of power electronics. Although evaporative cooling is capable of removing very high heat fluxes, two-phase cold plates have received little attention for cooling power electronics modules. In this work, device-level analytical modeling and system-level thermal simulation are used to examine and compare single-phase and two-phase cold plates for a specified inverter module, consisting of 12 pairs of silicon insulated gate bipolar transistor (IGBT) devices and diodes. For the conditions studied, an R134a-cooled, two-phase cold plate is found to substantially reduce the maximum IGBT temperature and spatial temperature variation, as well as reduce the pumping power and flow rate, in comparison to a conventional single-phase water-cooled cold plate. These results suggest that two-phase cold plates can be used to substantially improve the performance, reliability, and conversion efficiency of power electronics systems.

Rack Level Modeling of Air Flow Through Perforated Tile in a Data Center

Abstract: Effective air flow distribution through perforated tiles is required to efficiently cool servers in a raised floor data center. We present detailed computational fluid dynamics (CFD) modeling of air flow through a perforated tile and its entrance to the adjacent server rack. The realistic geometrical details of the perforated tile, as well as of the rack are included in the model. Generally, models for air flow through perforated tiles specify a step pressure loss across the tile surface, or porous jump model based on the tile porosity. An improvement to this includes a momentum source specification above the tile to simulate the acceleration of the air flow through the pores, or body force model. In both of these models, geometrical details of tile such as pore locations and shapes are not included. More details increase the grid size as well as the computational time. However, the grid refinement can be controlled to achieve balance between the accuracy and computational time. We compared the results from CFD using geometrical resolution with the porous jump and body force model solution as well as with the measured flow field using particle image velocimetry (PIV) experiments. We observe that including tile geometrical details gives better results as compared to elimination of tile geometrical details and specifying physical models across and above the tile surface. A modification to the body force model is also suggested and improved results were achieved.

Direct-Write Stretchable Sensors Using Single-Walled Carbon Nanotube/Polymer Matrix

Abstract: There have been increasing demands and interests in stretchable sensors with the development of flexible or stretchable conductive materials. These sensors can be used for detecting large strain, 3D deformation, and a free-form shape. In this work, a stretchable conductive sensor has been developed using single-walled carbon nanotubes (SWCNTs) and monofunctional acrylate monomers (cyclic trimethylolpropane formal acrylate and acrylate ester). The suggested sensors have been fabricated using a screw-driven microdispensing direct-write (DW) technology. To demonstrate the capabilities of the DW system, effects of dispensing parameters such as the feed rate and material flow rate on created line widths were investigated. Finally, a stretchable conductive sensor was fabricated using proper dispensing parameters, and an experiment for stretchability and resistance change was accomplished. The result showed that the sensor had a large strain range up to 90% with a linear resistance change and gauge factor ∼2.7. Based on the results, it is expected that the suggested DW stretchable sensor can be used in many application areas such as wearable electronics, tactile sensors, 3D structural electronics, etc.

Promising Technology for Electronic Cooling: Nanofluidic Micro Pulsating Heat Pipes

Abstract: Currently, the thermal management of microelectromechanical systems (MEMS) has become a challenge. In the present research, a micro pulsating heat pipe (MPHP) with a hydraulic diameter of 508lm, is experimented. The thermal performance of the MPHP in both the transient and steady conditions, the effects of the working fluid (water, silver nanofluid, and ferrofluid), heating power (4, 8, 12, 16, 20, 24, and 28W), charging ratio (20, 40, 60, and 80%), inclination angle (0 deg, 25 deg, 45 deg, 75 deg, and 90 deg relative to horizontal axis), and the application of magnetic field, are investigated and thoroughly discussed. The experimental results show that the optimum charging ratio for water is 40%, while this optimum for nanofluids is 60%. In most of situations, the nanofluid charged MPHPs have a lower thermal resistance relative to the water charged ones. For ferrofluid charged MPHP, the application of a magnetic field substantially reduces the thermal resistance. This study proposes an outstanding technique for the thermal management of electronics. [DOI: 10.1115/1.4023847]

A Stepped-Bar Apparatus for Thermal Resistance Measurements

Abstract: A stepped-bar apparatus has been designed and constructed to characterize the thermal resistance of materials using steady-state heat transfer techniques. The design of the apparatus is a modification of the ASTM D5470 standard where reference bars of equal cross-sectional area are used to extrapolate surface temperatures and heat flux across a sample of unknown thermal resistance. The design modification involves intentionally oversizing the upper reference bar (URB) of the apparatus to avoid contact area uncertainty due to reference bar misalignment, which is difficult to account for, as well as the high cost that can be associated with equipping the apparatus with precise alignment controls (e.g., pneumatic alignment). Multidimensional heat transfer in the upper reference bar near the sample interface is anticipated using numerical modeling. The resulting nonlinear temperature profile in the upper reference bar is accounted for by fitting a second order regression line through thermocouple readings near the sample interface. The thermal resistances of commercially available thermal gap pads and thermal pastes were measured with the stepped-bar apparatus; the measured values were in good agreement with published results, and exhibited a high degree of reproducibility. The measurement uncertainty of both the standard and stepped-bar apparatus decrease with increased thermocouple precision. Notably, the uncertainty due to reference bar misalignment with the standard apparatus becomes more pronounced as thermocouple precision and the number of thermocouples increases, which suggests that the stepped-bar apparatus would be especially advantageous for enabling accurate, high-precision measurements of very low thermal resistances. [DOI: 10.1115/1.4025116]

High-Efficiency Transient Temperature Calculations for Applications in Dynamic Thermal Management of Electronic Devices

Abstract: The highly nonuniform transient power densities in modern semiconductor devices present difficult performance and reliability challenges for circuit components, multiple levels of interconnections and packaging, and adversely impact overall power efficiencies. Runtime temperature calculations would be beneficial to architectures with dynamic thermal management, which control hotspots by effectively optimizing regional power densities. Unfortunately, existing algorithms remain computationally prohibitive for integration within such systems. This work addresses these shortcomings by formulating an efficient method for fast calculations of temperature response in semiconductor devices under a time-dependent dissipation power. A device temperature is represented as output of an infinite-impulse response (IIR) multistage digital filter, processing a stream of sampled power data; this method effectively calculates temperatures by a fast numerical convolution of the sampled power with the modeled system's impulse response. Parameters such as a steady-state thermal resistance or its extension to a transient regime, a thermal transfer function, are typically used with the assumption of a linearity and time-invariance (LTI) to form a basis for device thermal characterization. These modeling tools and the time-discretized estimates of dissipated power make digital filtering a well-suited technique for a run-time temperature calculation. A recursive property of the proposed algorithm allows a highly efficient use of an available computational resource; also, the impact of all of the input power trace is retained when calculating a temperature trace. A network identification by deconvolution (NID) method is used to extract a time-constant spectrum of the device temperature response. We verify this network extraction procedure for a simple geometry with a closed-form solution. In the proposed technique, the amount of microprocessor clock cycles needed for each temperature evaluation remains fixed, which results in a linear relationship between the overall computation time and the number of temperature evaluations. This is in contrast to time-domain convolution, where the number of clock cycles needed for each evaluation increases as the time window expands. The linear dependence is similar to techniques based on FFT algorithms; in this work, however, use of z-transforms significantly decreases the amount of computations needed per temperature evaluation, in addition to much reduced memory requirements. Together, these two features result in vast improvements in computational throughput and allow implementations of sophisticated runtime dynamic thermal management algorithms for all high-power architectures and expand the application range to embedded platforms for use in a pervasive computing environment.

Effect of Joint Size on Microstructure and Growth Kinetics of Intermetallic Compounds in Solid-Liquid Interdiffusion Sn3.5Ag/Cu-Substrate Solder Joints

Abstract: The effect of joint size on the interfacial reaction in the Sn3.5Ag/Cu-substrate soldering system was examined. An experiment was conducted in which parameters such as bonding time, temperature, and pressure were varied at multiple levels. The morphology and thickness of all intermetallic compounds (IMC) were analyzed using the scanning electron microscopy (SEM) and energy-dispersive X-ray spectroscopy (EDX) techniques. An examination of the microstructures of solder joints of different sizes revealed that the size of the solder joint has no effect on the type of IMCs formed during the process. It was found that the joint size significantly affected the thickness of the intermetallic layers. The Cu3Sn intermetallic layers formed in the smaller sized solder joints were found to be thicker than those in the larger sized solder joints. In all specimen sizes, the increase in the thickness of Cu3Sn intermetallic layers with soldering time was found to obey a parabolic relationship. Additionally, for the cases when eutectic solder is available in the joints, a similar soldering time and temperature dependency were found for the Cu6Sn5 IMC phase. The intermetallic growth of the Cu3Sn phase was under a volume-diffusion controlled mechanism. The growth rate constants and activation energies of intermetallic layers were also reported for different joint thicknesses. Furthermore, the growth rate constants of the Cu3Sn intermetallic layer were found to depend upon the size of the joints.

Two-Phase Flow Control of Electronics Cooling With Pseudo-CPUs in Parallel Flow Circuits: Dynamic Modeling and Experimental Evaluation

Abstract: On-chip two-phase cooling of parallel pseudo-CPUs integrated into a liquid pumped cooling cycle is modeled and experimentally verified versus a prototype test loop. The system's dynamic operation is studied since the heat dissipated by microprocessors is continuously changing during their operation and critical heat flux (CHF) conditions in the microevaporator must be avoided by flow control of the pump speed during heat load disturbances. The purpose here is to cool down multiple microprocessors in parallel and their auxiliary electronics (memories, dc/dc converters, etc.) to emulate datacenter servers with multiple CPUs. The dynamic simulation code was benchmarked using the test results obtained in an experimental facility consisting of a liquid pumped cooling cycle assembled in a test loop with two parallel microevaporators, which were evaluated under steady-state and transient conditions of balanced and unbalanced heat fluxes on the two pseudochips. The errors in the model's predictions of mean chip temperature and mixed exit vapor quality at steady state remained within +/- 10%. Transient comparisons showed that the trends and the time constants were satisfactorily respected. A case study considering four microprocessors cooled in parallel flow was then simulated for different levels of heat flux in the microprocessors (40, 30, 20, and 10 W cm(-2)), which showed the robustness of the predictive-corrective solver used. For a desired mixed vapor exit quality of 30%, at an inlet pressure and subcooling of 1600 kPa and 3 K, the resulting distribution of mass flow rate in the microevaporators was, respectively, 2.6, 2.9, 4.2, and 6.4 kg h(-1) (mass fluxes of 47, 53, 76 and 116 kg m(-2) s(-1)) and yielded approximately uniform chip temperatures (maximum variation of 2.6, 2, 1.7, and 0.7 K). The vapor quality and maximum chip temperature remained below the critical limits during both transient and steady-state regimes.

Thermal Performance of an Al2O3???Water Nanofluid Pulsating Heat Pipe

Abstract: A numerical study is performed to investigate the effects of nanofluids on the heat transfer performance of a pulsating heat pipe (PHP). Pure water is employed as the base fluid while Al2O3 with two different particle sizes, 38.4 and 47 nm, is used as nanoparticle. Different parameters including displacement of liquid slug, vapor temperature and pressure, liquid slug temperature distribution, as well as sensible and latent heat transfer in evaporator and condenser are calculated numerically and compared with the ones for pure water as working fluid. The results show that nanofluid has significant effect on heat transfer enhancement of the system and with increasing volume fraction and decreasing particles diameter the enhancement intensifies. [DOI: 10.1115/1.4024145]

Reliability Assessment and Activation Energy Study of Au and Pd-Coated Cu Wires Post High Temperature Aging in Nanoscale Semiconductor Packaging.

Abstract: Cu wirebonding is widely adopted in recent nanoelectronic packaging due to its conductivity, material properties, and cost effectiveness. However, there are few key technical barriers to be seriously considered in order to fully transition from Au to Cu ball bonds in semiconductor packages. Gan et al. [1–4] has reported the key challenges of Cu wirebonding deployment in nanoelectronic packaging while Tan et al. [5,6], Yu et al. [7] and Lin et al. [8] investigated the technical barriers and failure mechanism of bare Cu and Pd-coated Cu wirebonding in semiconductor packaging. Harman [9] reported the challenges and moisture reliability of Cu wirebonding and Au ball bond Kirkendall micro-voiding in early years. Hang et al. [10] investigated post isothermal aging of CuAl ball bonds mainly are attributed to CuAl IMC interface corrosion and induce interface microcracking. However, there are limited researchers carry out study on the wearout reliability of Palladium-coated Cu wire, bare Cu wire or Au wire bonds in nanoelectronics device packaging. It is a crucial to conduct knowledge based reliability studies and understands the wearout reliability models [4,8,11–13] and its associated failure mechanism with Cu wirebonding in nanoelectronic device packaging which will ensure successful Cu wirebonding deployment in high pin count and nanoscale devices. McPherson [14] laid out the time to failure reliability modeling in semiconductor physics and reliability stressing. Gan et al. [4] characterized the wearout reliability on Au and Pd-coated Cu ball bonds used in fineline BGA flash memory packages. There are few researchers investigated and compared the IMC diffusion kinetics and calculated the apparent activation energy for Cu and Au ball bond IMC after high temperature aging [8,12,15–25]. Wearout reliability of a product is defined as the staged whereby a product or part's reliability would give way at its weakest interconnect or link in a system. In this study, the Au and Pd-coated Cu bond reliability under different HTSL aging temperature to investigate the thermal activated processes in semiconductor device packaging. Wearout reliability plots, apparent activation energy (Eaa) and post HTSL ball shear and wire pull strength are investigated in the testing of HTSL. The obtained values of Au and PdCu ball bonds Eaa are compared to previous literature studies [11,12]. Failure mechanism at bond interface is established accordingly.

Effect of Indium Content on the Melting Point, Dross, and Oxidation Characteristics of Sn-2Ag-3Bi-xIn Solders

Abstract: This paper presents the effect of indium (In) content on the melting temperature, wettabililty, dross formation, and oxidation characteristics of the Sn-2Ag-3Bi-xIn alloy. The melting temperature of the Sn-2Ag-3Bi-xIn alloy (2 ≤ x ≤ 6) was lower than 473 K. The melting range between the solidus and liquidus temperatures was approximately 20 K, irrespective of the indium content. As the indium content increased, the wetting time increased slightly and the maximum wetting force remained to be mostly constant. The dross formation decreased to approximately 50% when adding 1In to Sn-2Ag-3Bi, and no dross formation was observed in the case of Sn-2Ag-3Bi-xIn alloy (x ≥ 1.5) at 523 K for 180 min. Upon approaching the inside of the oxidized solder of the Sn-2Ag-3Bi-1.5In alloy from the surface, the O and In contents decreased and the Sn content increased based on depth profiling analysis using Auger electron spectroscopy (AES). The mechanism for restraining dross (Sn oxidation) of Sn-2Ag-3Bi alloy with addition of indium may be due to surface segregation of indium. This is due to the lower formation energy of indium oxide than those of Sn oxidation.

Study on Heat Conduction in a Simulated Multicore Processor Chip—Part II: Case Studies

Abstract: The objective of this study is to understand the effects of various parameters involved in the chip design and cooling on the occurrence of hot spots on a multicore processor chip. The thermal environment for the die is determined by the cooling design which differs distinctly between different classes of electronic equipment. In the present study, like many other hot spot studies, the effective heat transfer coefficient represents the thermal environment for the die, but, its representative values are derived for different cooling schemes in order to examine in what classes of electronic equipment the hot spot concern grows. The cooling modes under study are high-performance air-cooling, high-performance liquid-cooling, conventional air-cooling, and oil-cooling in infrared radiation (IR) thermography setup. Temperature calculations were performed on a model which is designed to facilitate the study of several questions that have not been fully addressed in the existing literature. These questions are concerned with the granularity of power and temperature distributions, thermal interactions between circuits on the die, the roles of on-chip wiring layer and the buried dioxide in heat spreading, and the mechanism of producing temperature contrast across the die. The main results of calculations are the temperature of the target spot and the temperature contrast across the die. Temperature contrasts are predicted in a range 10–25 K, and the results indicate that a major part of the temperature contrast is formed at a granularity corresponding to the size of functional units on actual microprocessor chips. At a fine granularity level and under a scenario of high power concentration, the on-chip wiring layer and the buried oxide play some roles in heat spreading, but their impact on the temperature is generally small. However, the details of circuits need to be taken into account in future studies in order to investigate the possibility of nanometer-scale hot spots. Attention is also called to the need to understand the effect of temperature nonuniformity on the processor performance for which low temperature at inactive cells makes a major contribution. In contrast to the situation for the die under forced convection cooling, the die in passively cooled compact equipment is in distinctly different thermal environment. Strong thermal coupling between the die and the system structure necessitates the integration of package and system level analysis with the die-level analysis.

Enhanced Diffusion of Silver Atoms on the Surface of Nanoparticles at Low Temperatures

Abstract: Microstructure development of 35 nm silver nanoparticles during the low temperature sintering was examined in situ as the ambient temperature increased from room temperature up to 450 °C using X-ray diffraction and electron microscopy techniques. Measured particle size increased rapidly up to ∼90 nm in the temperature range between 130 and 250 °C, which is thought to be from the atomic diffusion on the surfaces of nanoparticles. On the other hand, further increase of the annealing temperature results in little or almost no change in the grain size. Therefore, the sintering effect due to the surface diffusion of silver atoms is active only on the surface of nanoparticles whose size is less than ∼90 nm, indicating enhanced atomic mobility of silver atoms on the surface of nanoparticles.

Geometric Optimization of C-Shaped Cavities According to Bejan's Theory: General Review and Comparative Study

Abstract: The aim of this paper is to consider, by means of the numerical investigation, the geometric optimization of a cavity that intrudes into a solid with internal heat generation. The objective is to minimize the maximal dimensionless excess of temperature between the solid and the cavity. The cavity is rectangular, with fixed volume and variable aspect ratio. The cavity shape is optimized for two sets of boundary conditions: isothermal cavity and cavity cooled by convection heat transfer. The optimal cavity is the one that penetrates almost completely the conducting wall and proved to be practically independent of the boundary thermal conditions, for the external ratio of the solid wall smaller than 2. As for the convective cavity, it is worthy to know that for values of H/L greater than 2, the best shape is no longer the one that penetrates completely into the solid wall, but the one that presents the largest cavity aspect ratio H0/L0. Finally, when compared with the optimal cavity ratio calculated for the isothermal C-shaped square cavity, the cavities cooled by convection highlight almost the same optimal shape for values of the dimensionless group λ ≤ 0.01. Both cavities, isothermal and cooled by convection, also present similar optimal shapes for ϕ0 0.7. However, in the range 0.3 ≤ ϕ0 ≤ 0.7, the ratio (H0/L0)opt calculated for the cavities cooled by convection is greater than the one presented by isothermal cavities. This difference is approximately 17% when λ = 0.1 and ϕ0 = 0.7, and 20% for λ = 1 and ϕ0 = 0.5.