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Showing papers in "Microelectronics Reliability in 1982"


Journal ArticleDOI
TL;DR: In this paper, it was shown that a generic TMHMM can be transformed into an equivalent minimum-parameter form (canonical form) for failure-time distributions in reliability analysis, with particular emphasis on MHMM's representable by acyclic transition graphs.

196 citations


Journal ArticleDOI
TL;DR: Having the knowledge of the locations of the various computer centres (nodes), maximum permissible cost of installing the links and the possible position of links, an heuristic algorithm for obtaining an optimal network topology which gives the maximum s-t reliability is presented.

95 citations


PatentDOI
TL;DR: CPA is a method and circuit design discipline that will result in a testable multichip package given that each logical component is testable and the design is synchronous in nature, thus reducing manufacturing tester time.

65 citations


Journal ArticleDOI
TL;DR: A review of the literature related to optimal inspection and maintenance schedules of failing systems can be found in this article, where the authors present a state-of-the-art review.

58 citations


PatentDOI
TL;DR: In this article, the authors monitor the control, in particular, software crashes in a multiprocessor machine control system to prevent machine malfunctions and monitor key operations such as the number of tasks to be completed by the control.

54 citations


Journal ArticleDOI
TL;DR: Two mathematical Markov models to predict human reliability of time continuous operation tasks are presented and Laplace transforms of the state probability equations are developed.

50 citations


PatentDOI
TL;DR: In this paper, the authors proposed a method for manufacturing a semiconductor device of high reliability, high performance and high integration with high yield, which has the steps of forming at least one groove in a semiconducting substrate, forming a non-single-crystalline semiconductor film to cover an entire surface of the semiconductor substrate including an inner surface of a groove, selectively etching the non- single-crystaline semiconductonductor film so as to leave the nonsingle-polysilicon semiconductor material on at least a side wall of the groove, and forming

50 citations


PatentDOI
TL;DR: Multiplexer is provided at the output buffers of a memory for multiplexing conventional bit segments with spare columns of bit cells, wherein the spare columns are only activated, that is, selected, when a particular column in the conventional bit segment has been identified to be defective.

40 citations


PatentDOI
TL;DR: In this paper, a testing method and structure for leakage current characterization in the manufacture of dynamic RAM cells is presented, where the testing structure includes two large gate-controlled diodes, each diode having a diffused junction which is substantially identical with that of the other diode, with different perimeter-to-area ratios, such that when testing is carried out, the leakage current components due to the contribution of the thin oxide area can be isolated from the perimeter-contributed components of the isolating thick oxide; dynamic testing can also be performed and, because of the

37 citations


Journal ArticleDOI
TL;DR: A general and simple technique for the evaluation of symbolic reliability expression in the case of practical systems such as a communication system having fixed channel capacities of its various communicating links, a computer communication network allowing a fixed amount of data exchange amongst different terminals of various computer centres and a power distribution system having limited power ratings of itsVarious power lines.

31 citations


PatentDOI
TL;DR: This method can determine the physical configuration of the memory circuit despite the incorporation of redundant elements into the primary memory array.

Journal ArticleDOI
TL;DR: The authors have presented a new design approach, based on search technique, to design a microprocessor based equipment to determine minimal pathset and minimal cutset from the incidence matrix of the graph.

Journal ArticleDOI
TL;DR: This paper presents models and their applications in terms of reliability analysis to situations where the system can have wholerange of states and all its components can also have whole range of multiple states.

PatentDOI
TL;DR: A method for fabricating a three-dimensional multi-layer integrated circuit of single crystalline CeO 2 and Si is proposed in this paper, where the SiO 2 insulation layer is transformed into a SiO2 insulation layer by selectively introducing oxygen ions through the single-closest Si layer and reacting the oxygen ions with the single Si layer.

Journal ArticleDOI
TL;DR: In this article, the authors considered a two unit cold standby redundant system subject to a single repair facility with exponential failure and general repair time distribution and derived the reliability parameters e.g. mean time to system failure, steady state availability, mean recurrence to a state and expected number of visits to a states, first two moments of time in transient state.

Journal ArticleDOI
TL;DR: A Petri net approach to enumerate all system success paths between a specified pair of nodes that requires only vector additions on a single matrix is presented.

Journal ArticleDOI
TL;DR: In this article, the power of the Weibull test against commonly used statistical models is evaluated using Monte-Carlo methods, including the Gumbel distribution, Extreme Value Distribution, Type I of Maxima.

Journal ArticleDOI
TL;DR: In this article, the cost-benefit analysis of a single-server two-unit cold standby redundant repairable system subject to inspection is presented, in which the failure of a unit is detected by inspection only but system failure is detected instantaneously without inspection.

PatentDOI
John Terence Chamberlain1
TL;DR: In this article, a very large scale integrated circuit, covering the entire surface of a semiconductor wafer, comprises a plurality of data processing cells and a port, which can be made to couple to neighboring cells which are then tested and incorporated into the overall working of the integrated circuit if functional to grow a functional array of interconnected cells on the wafer.

PatentDOI
TL;DR: This technique may be used not only for isolating faults in the stabilization circuit, but also for analyzing a fault in a faulty load by so varying parameters of the computing system as to simulate operation of the actual load with the fault.

Journal ArticleDOI
TL;DR: In this paper, an inspection strategy is proposed in which the failure of a unit as well as the system failure is detected by inspection only, and the Laplace transform technique is adopted to solve these equations.

Journal ArticleDOI
D.J Ager1, G.F Cornwell1, I.W Stanley1
TL;DR: In this paper, a new method of testing digital integrated circuits is described which is based upon a measurement of the minimum values of supply voltage (marginal voltages) which are necessary to just maintain the correct logical operation of a circuit during a functional test.

PatentDOI
TL;DR: The testing apparatus is disclosed which provides for testing a wide variety of different types of electrical circuit devices, such as PROM integrated circuit chips, with very little if any programming being required, and without concern as to which of the terminals of the chip are inputs or outputs.

PatentDOI
Tadashi Kiriseko1
TL;DR: In this paper, a method for producing a bipolar transistor which has no emitter-base short and which attains a high density of integration is proposed, which comprises the steps of forming a polycrystalline silicon layer on an anti-oxidation masking layer formed on a base region, selectively etching the poly-crystallINE silicon layer to form an opening, introducing impurities into the base region to create an emitter region, converting the polycale silicon layer into an oxide layer whereby the size of the opening is reduced, and forming electrodes.

PatentDOI
Pasquinelli Rossano1
TL;DR: In this article, the authors present an approach for testing dynamic noise immunity of digital integrated circuits wherein noise pulses of prefixed duration and amplitude are applied to the inputs of an integrated circuit under test.

Journal ArticleDOI
TL;DR: In this paper, a brief introduction and an extensive list of selective references on transit system reliability is presented, along with a detailed discussion of the reliability of the transit system in general.

Journal ArticleDOI
TL;DR: In this article, the availability and reliability of an n-unit warm standby system with repair facilities, in which the operating online unit is subjected to preventive maintenance, are obtained. And an optimal PM policy is also derived.

Journal ArticleDOI
TL;DR: In this paper, the costbenefit analysis of a 1-server 2-unit system has been carried out by considering three different repair policies, namely, policy I: retain the repair facility throughout 2.

Journal ArticleDOI
TL;DR: In this paper, a reliability analysis of time-dependent 2-cascade and 3-Cascade systems is carried out using stress/strength models by considering each of the stress and strength variables as deterministic or random fixed or random independent.

Journal ArticleDOI
TL;DR: Petri nets can be viewed as formal automata or as an automation which can generate the formal languages or a model to analyse and synthesize various kinds of systems.