Showing papers in "Microelectronics Reliability in 2004"

TL;DR: The composite of diamond and copper have a potential for a heat spreading substrate with high performance and high reliability because not only its thermal conductivity is high but its coefficient of thermal expansion can be tailored according to a semiconductor material of electronics devices.

TL;DR: This article discusses the impact of the differences in the material properties and integration process on reliability of copper interconnects, including dielectric breakdown, temperature cycle, and stability within packages.

TL;DR: For the first time, an accurate life prediction model is proposed for board level drop test to estimate the number of drops to failure for a package, and a failure-free state can be determined, and drop test performance of new package design can be quantified, and further enhanced through modeling.

TL;DR: Basic electromigration physics is reviewed in which the main differences between Al- and Cu-based interconnects relevant to electromigration are covered and the methodology of electromigration lifetime extrapolation, including reliability assessments of more complex interconnect geometries, is covered.

TL;DR: The foundations and limitations of the proposed conduction models in the light of others and the authors' experimental results are critically examined, putting special emphasis on those approaches providing final closed expressions.

TL;DR: A comprehensive and integrated package stress model is established for quad flat non-lead package with detailed considerations of effects of moisture diffusion, heat transfer, thermo-mechanical stress, hygro-meanical stress and vapor pressure induced during reflow.

TL;DR: In this paper, the growth pattern and chemistry of intermetallic compounds formed between a 25 μm 4 N gold wire and aluminium pad metallization after isothermal ageing in air at 175 °C.

TL;DR: It is shown that some alternative gate dielectrics exhibit excellent tolerance to heavy ion induced Gate dielectric breakdown, however, it is not yet known how irradiation with energetic particles will affect the long term reliability of MOS devices with high- κ gateDielectrics in a space environment.

TL;DR: This work investigates optimum curing conditions to achieve the best performance of ACF joints and shows a strong dependence of curing condition on the electrical and mechanical performances.

TL;DR: Creep data, that was gained on specimens of different microstructures, have been presented and models of SnAg3.5 and SnAg4Cu0.5, that can be used with the ANSYS FEM software package, will be presented.

TL;DR: The conduction mechanisms in the gate dielectric films of MOSFETs for VLSI and ULSI technologies are reviewed, including Fowler–Nordheim tunneling, internal Schottky (or Pool–Frenkel) effect, two-step (or trap-assisted) Tunneling, shallow-trap-assisted tunneling and band-to-band tunneling.

TL;DR: This work shows that on-chip power cycling can be used to cause identical failure mechanisms to those caused by normal temperature cycling, and not to accelerate degradation caused by thermal excursions on solder bumps.

TL;DR: It is proposed that time for charge to be trapped in HfO 2 is longer than t on of unipolar stress under high frequency, and it is shown that longer lifetime of Hf O 2 has been observed when compared to constant voltage stress.

TL;DR: The electromigration median time to failure (MTF) were found to be dependent upon the line width for the lower layer test structures while it remained unaffected in the case of upper layer test structure, and back stress effect on short lines was evident on both upper and lower layer structures.

TL;DR: This simple physical model describes the reliability of metal insulator metal (MIM) capacitors with PECVD SiN remarkably well and predicts correctly the voltage acceleration factor and its temperature dependence and the activation energy.

TL;DR: All the three contributions, i.e., the elastic, the creep, and the time-independent plastic material behaviour, are required in the model and would be incomplete and hence insufficient for assisting in the design of today's electronics packages even with respect to the most frequent load cases.

TL;DR: The results indicate that the reliability performance of Al GaN/GaN HEMTs could strongly depend on the material quality of AlGaN/ GaN epitaxial layers on SiC substrates.

TL;DR: The reliability issues for plastic flip-chip packages, which have become an enabling technology for future packaging development, are reviewed and the results and impacts on delamination at the die/underfill interface and in the underfill region above the plated through-hole via are discussed.

TL;DR: In the present study, micro-heat pipes with cross-section of polygon have been manufactured and tested for operating characteristics and heat transfer limit and a high precision technology is needed in manufacturing process for a small-sized heat pipe.

TL;DR: A tree model, called Time-to-Failure tree, has been presented, which can be used to accelerate the Monte Carlo simulation of fault trees, and shows that the speed-up grows with the size of the fault trees.

TL;DR: This paper discusses the process development and reliability assessment that was completed to achieve a low cost flip chip on paper assembly process and the various characteristics of ACA made it an enabling technology for this smart label application.

TL;DR: It is shown that the value of adhesion strength at the metallisation/polymer interface can be determined directly from a printed wiring board (PWB) by a pull-off method, however, careful optimisation of the test geometry is required.

TL;DR: The dominance of the contribution from the reversible electron trapping on the pre-existing defects in the low voltage stress response raises the question on the applicability of the conventional reliability assessment methodology to the high-k dielectrics.

TL;DR: In this paper, the first research results on stencil printing of 80 and 60 μm pitch peripheral array configurations with Type 7 Sn63/Pb37 solder paste were provided.

TL;DR: A laser-assisted bonding technique is demonstrated for low temperature region selective processing that is especially suitable for encapsulation and vacuum packaging of chips or wafers containing MEMS and other micro devices with low temperature budgets, where managing stress distribution is important.

TL;DR: An automatic alignment algorithm was developed for wafer dicing which calculated compensation value which minimized x, y, θ errors and control strategy was designed according to characteristics of each axis.

TL;DR: The results show that the three bonding parameters, temperature, time, and pressure, all affect joint reliability, and most detrimental, however, seems to be reflow treatment performed after bonding.

TL;DR: The reliability of lead-free solders and the effect of microstructures on joint reliability are discussed.

TL;DR: 3D fatigue model is established for stacked die BGA with considerations of detailed pad design, realistic shape of solder ball, and non-linear material properties, and the effect of number of layers of stacked-die is investigated.

TL;DR: Reliability results of a novel type of electrostatically actuated RF MEMS capacitive switches developed by the group are discussed and the proposed method has been used to study the reliability, failure, and hold-down test characteristics of flexible circuit-basedRF MEMS switches.