Showing papers in "Solid-state Electronics in 1972"

Models for contacts to planar devices

Abstract: Two basic models for rectangular contacts to planar devices, the Kennedy-Murley Model (KMM) and the Transmission Line Model (TLM) are discussed and compared. The KMM does not take into account the interface resistance between metal and semiconductor, whereas the TLM disregards the vertical structure of the semiconductor layer. An extension of the TLM is derived (ETLM), which approximately considers this vertical structure. KMM and TLM thus appear as special cases of the ETLM. The calibration of the latter on the KMM then yields a simple quantitative criterion for the applicability of the KMM or the pure TLM. Measurement results on typical aluminum-silicon contacts are described satisfactorily by the (E)TLM. Concurrently with the applicability criterion, the KMM proves inadequate for these contacts due to the disregard of interface resistance. Conclusions are derived from the TLM pertaining to current distribution over the contact area and to contact resistance. In particular, the contacts are classified according to their operation mode. Finally, the TLM approach is applied also to circular contacts.

Fundamental limitations in microelectronics—I. MOS technology

Abstract: The physical phenomena which will ultimately limit MOS circuit miniaturization are considered. It is found that the minimum MOS transistor size is determined by gate oxide breakdown and drain-source punch-through. Other factors which limit device size are drain-substrate breakdown, drain ‘corner’ breakdown and substrate doping fluctuations. However these limitations are less severe than the oxide breakdown limitation mentioned above. Power dissipation and metal migration limit the frequency and/or packing density of fully dynamic and of complementary MOS circuits. In static non-complementary circuits, power dissipation is the principal limitation of the number of circuit functions per chip. The channel length of a minimum size MOS transistor is a factor of 10 smaller than that of the smallest present day devices. The tolerances required to manufacture such a transistor are compatible with electron beam masking techniques. It is thus possible to envision fully dynamic silicon chips with up to 10^7–10^8 MOS transistors per cm^2.

Compound tellurides and their alloys for peltier cooling—A review

Abstract: The most recent data on the thermoelectric properties of cooling materials suitable for use near room temperature have been reviewed. The materials discussed include Bi2Te3 and its pseudo-binary Bi2Te3-Sb2Te3 and Bi2Te3-Bi2Se3 alloys, with the major emphasis on the pseudo-ternary alloys in the system Bi2Te3-Sb2Te3-Sb2Te3. The data presented include (1) the Seebeck coefficient, thermal conductivity, and figure of merit as a function of electrical resistivity; (2) the variations in the lattice thermal conductivity with alloying; (3) the temperature dependence of thermoelectric properties of the pseudo-ternary alloys. Presented also are the results of a recent study of growth variables on the thermoelectric properties of these alloys. The pseudo-ternary Bi2Te3-Sb3-Sb2Te2-Sb2Se3 system provided the best n- and p-type materials. These materials, which gave an average figure of merit of 3·3 × 10−3 deg−1 at room temperature, achieved a maximum Peltier cooling from room temperature of 78°K in a single-stage refrigerating couple. Furthermore, a temperature as low as 159°K was attained continuously from 300°K by a six-stage Peltier refrigerator constructed from these ternary alloys. The superior thermoelectric properties of these ternary alloys were interpreted on the basis of a large reduction and a small temperature dependence of the lattice thermal conductivity, and an increase in the energy band gap of the alloys with additions of Sb2Se3.

BiSb alloys for magneto-thermoelectric and thermomagnetic cooling

Abstract: The thermoelectric and thermomagnetic properties of undoped Bi-Sb alloys have been investigated with highly homogeneous single crystals throughout the entire alloy composition as functions of temperature (77–300°K), magnetic field (0–7·5 kilo-oersteds), and crystallographic direction (∥ and ⊥ to the trigonal axis). The undoped, n-type Bi85Sb15 alloy gave the largest magneto-thermoelectric figure of merit (11 × 10−3 deg−1) at 100°K and the same value at 80°K in transverse fields of 3 and 1·3 kilo-oersteds, respectively. Within the range of field intensity used, the largest thermomagnetic figure of merit (4·1 × 10−3 deg−1) was obtained at 100°K with undoped n-types Bi99Sb1 in a field of 7·5 kilo-oersteds. The possibility has been explored of obtaining p-type Bi-Sb alloys through additions of acceptor impurities and by applying transverse magnetic fields. The results showed that a Sn-doped Bi88Sb12 alloy yields a p-type figure of merit of 2·3 × 10−3 deg−1 at 85°K in 7·5 kilo-oersteds. The difference between the adiabatic and isothermal conditions was reviewed in some detail in connection with measurements of various transport coefficients that enter into the calculation of the figures of merit. Also, a comparison was given on the difference between the magneto-Peltier and the Ettingshausen cooling. With a hybrid cooling unit based on the combination of the Peltier and magneto-Peltier effects in telluride alloys and BiSb alloys, respectively, a continuous cooling as large as 172°K, from room temperature down to 128°K, has been achieved.

Interface states in MOS structures with 20–40 Å thick SiO2 films on nondegenerate Si

Abstract: MOS structures having different metal contacts on 20–40 A thick SiO2 films and non-degenerate Si have been investigated. These structures show large frequency dispersion of the measured admittance curves caused by carrier recombination in interface states. However, build-up of a Si inversion layer is not observed because the minority carriers are drained away by tunneling through the oxide into the metal. Interface state density distributions across the whole Si band gap are obtained by evaluating measured capacitance and conductance curves. Characteristic peaks of 0.12–0.30 eV half width are found for the metal contacts, Mg at 0.54 eV, Cu at 0.23 eV, Cr at 0.18 eV and 0.52 eV, and Au at 0.15 eV and 0.97 eV above the valence band edge. The position of a peak seems to be related to the valence of the metal. Interface states caused by Cr, Cu and Mg contacts are of acceptor type. Their capture cross-section obtained from conductance measurements varies between 10−7 and 10−18 cm−2. A rapid increase of the state density with decreasing oxide thickness or sample annealing indicates that the states are caused by metal diffusion through the oxide into the interface. An observed saturation of the state density at about 2 × 1013 cm−2 V−1 is possibly due to a limited solubility of metal impurities in the oxide.

Interface states in SiSiO2 interfaces

Abstract: Interface state parameters were studied in MOS capacitors over a wide range of energy by conductance and capacitance measurements at various temperatures from room temperature to liquid nitrogen temperature. A new technique was developed for analysis of the data which allows to obtain the density of states, the capture cross section, the surface potential and the dispersion parameter from the conductance and capacitance vs. frequency curves. The density of interface states as well as the electron capture cross section were found to be a function of energy only and to be independent of temperature. Maxima in the density of states have not been found.

Impurity centers in PN junctions determined from shifts in the thermally stimulated current and capacitance response with heating rate

Abstract: A theory is developed for the thermal response of pn junction current and capacitance where the junction contains deep impurity centers. Measurements lead to values for the energy level, emission coefficient and concentration of these centers. Energy levels and emission coefficients are found from shifts in either the current maxima or the capacitance slope maxima with heating rate. The theory indicates that the heating rate may be non-linear and that energy levels may be found independent of the emission coefficient. The analysis accounts for the possibility that only a portion of the space-charge region may contain charged deep centers. This allows the identification of centers in a small segment of the space-charge region. In addition, the analysis allows for the motion of the space-charge width as deep centers discharge. A gold-doped silicon n + p junction is used to verify the theory. The experimental hole emission parameters for the gold donor are in good agreement with those values obtained by other workers using different methods.

Surface breakdown in silicon planar diodes equipped with field plate

Abstract: The distribution of the electrical potential around the edge of the field plate in a silicon planar diode has been solved by means of a computer. The breakdown voltage related to this region has been derived as a function of impurity doping in silicon and of oxide thickness. If the oxide layer is not thick enough, avalanche breakdown voltage is often considerably lower than the value allowed by the material. The effect of Q ss has been found to be negligible. Breakdown voltage vs. gate voltage measurement on gated diodes and avalanche light emission support an edge breakdown mechanism. Breakdown voltage on field plated diodes matches rather well with the calculated values. It normally drifts towards higher values and during this walkout a hot carrier current is collected by the field plate. The field plate current is fairly proportional to avalanche current and increases with bulk doping. A new planar diode structure suitable for a BV up to 900 V has been designed. The discharge voltage in air between field plate and equipotential ring (EQR) is shown to be correlated with the actual field at the edge.

Low level currents in insulated gate field effect transistors

Abstract: A theory for low-level current operation in Insulated Gate Field Effect Transistors is developed. Using the depletion approximation for the semiconductor surface potential, an analytical expression is obtained which is accurate for gate voltages corresponding to surface operation from depletion to the onset of strong inversion. Numerical calculations that avoid the limitations on gate voltage have shown the theory to hold as well for surface potentials corresponding to strong inversion.

Die abhängigkeit der trägerbeweglichkeit in silizium von der konzentration der freien ladungsträger—I☆

Abstract: Zusammenfassung Die freien Ladungstrager eines Halbleiters werden bei nicht allzu hohen Konzentrationen im wesentlichen nur durch die Phononen der Gitterschwingungen und durch evtl. Storstellen des Gitters gestreut. Von Konzentrationen von ca. 10 16 cm −3 ab macht sich aber ein dritter Streumechanismus bemerkabar, namlich die gegenseitige Streuung der freien Ladungstrager untereinander. In einer so stark injizierten Gleichrichter- oder Thyristorstruktur beginnt infolgedessen die Beweglichkeitssumme μ n + μ p abzusinken. Das quantitative Ausmas dieses Effektes wurde experimentell ermittelt, und zwar durch Messung des Spannungssprungs beim Umschalten einer psn -Struktur von Durchlas zu Sperrbelastung. An Silizium-Dioden gewonnene Mesergebnisse werden mit Theorien von Fletcher und von Davies verglichen. Namentlich mit Fletcher ergibt sich gute Ubereinstimmung.

Structure and electrical characteristics of epitaxial palladium silicide contacts on single crystal silicon and diffused P-N diodes

Abstract: Pd2Si contacts to single crystal silicon have been made by depositing Pd at room temperature and annealing at a succession of elevated temperatures. The silicide initially formed is a single crystal, even at room temperature. Its crystal structure is uniquely related to that of the underlying silicon with the basal plane of Pd2Si making an excellent match, with respect to silicon atom positions, with the (111) plane of silicon. Understanding this epitaxy leads to an appreciation of the excellent electrical characteristics of these contacts which are shown to be superior to alloyed aluminum. For comparison, barrier height measurements reproduce earlier results of Kircher on Pd2Si formed during a high temperature (200°C) deposition of Pd.

Die abhängigkeit der trägerbeweglichkeit in silizium von der konzentration der freien ladungsträger—II

Abstract: Zusammenfassung Die in der vorhergehenden Arbeit von Dannhauser behandelte Abnahme der Beweglichkeitssumme (μn + μp) der freien Ladungstrager eines Halbleiters wird zu noch hoheren Konzentrationen als bei Dannhauser weiter verfolgt. Durch Beobachtung der ultraroten Rekombinationsstrahlung lassen sich die Tragerkonzentrationen im schwach dotierten Mittelgebiet einer psn-Struktur mit abrupten Ubergangen ermitteln, insbesondere die Randwerte dieser Konzentrationen. Daraus werden die Boltzmann-Spannungen am ps- und am sn- U bergang sowie die Dember-Spannung ermittelt. Durch Subtraktion dieser Terme von der Gesamtspannung UF an den Proben erhalt man die ohmsche Spannung UmOhm uber das s Gebiet der psn-Struktur, woraus—da die Stromdichte iF ebenfalls gemessen wird—die Beweglichkeitssumme (μn + μp) der freien Ladungstrager folgt. Die Mesergebnisse schliesen an die von Dannhauser gut an und bestatigen ebenfalls die Theorie von Fletcher.

Admittance of p-n junctions containing traps☆

Abstract: A p-n junction containing large densities of deep levels is analyzed using a truncated space-charge approximation. The continuity equation for the occupation of deep levels is solved simultaneously with Poisson's equation to obtain the frequency dependent capacitance of a junction containing one or more levels. That portion of the capacitance which enters the field-effect transconductance is also obtained and is found to have a different frequency dependence. An apparent dependence of the deep level time constant on compensation is shown to arise from the interaction between the total charge in the levels and the electron concentration in the space-charge region. This interaction further alters all the time constants when two or more deep levels are present. The single level theory is compared with the experiments and more exact numerical calculations of Sah and co-workers, and the two level theory is compared with experimental results on neutron-irradiated junction field-effect transistors.

GaAsGaAlAs heterojunction transistor for high frequency operation

Abstract: A bipolar transistor structure is proposed having application for either high frequency operation or integration with certain types of light emitting devices. The structure involves liquid phase epitaxially grown layers of GaAs for the collector and base regions, and of Ga1−xAlxAs for the heterojunction emitter. The high frequency potential of this device results primarily from the high electron mobility in GaAs and the ability to heavily dope the base region with slowly diffusing acceptors. The Ga1−xAlxAs emitter region provides a favorable injection efficiency and, because it is etched preferentially relative to GaAs, access to the base layer for making contact. Transistor action with d.c. common emitter current gains of 25 have been thus for observed. Calculations of the high speed capability of this transistor are presented.

Field-effects in polycrystalline-silicon films

Abstract: The effect of a normal electric field applied near the surface of a chemically deposited, polycrystalline-silicon film has been studied. Since such polycrystalline films generally contain large numbers of deep donor and acceptor defect levels within the forbidden gap, an analysis of the effect of these deep defect levels has been performed. This analysis shows that deep donors increase the magnitude of the threshold voltage of a p -channel MOS transistor constructed with the conducting channel in the polycrystalline-silicon film, while deep acceptors have the opposite effect. The effects partially cancel when both types of defects are present. Experimental investigation of threshold voltages of p channel MOS transistors constructed in doped films indicates that the magnitude of the threshold voltage is increased by defect levels for both n - and p -type films. The effect is generally greates for films with minimum dopant concentration, in agreement with the expected behavior. Field-effect mobilities of approximately 30 cm 2 /V-sec are observed for most films. Films deposited at various temperatures over the range 650–1100°C with no intentional doping show that the magnitude of the threshold voltage generally decreases with increasing deposition temperature.

Preswitching electrical properties, ‘forming’, and switching in amorphous chalcogenide alloy threshold and memory devices

Abstract: Results are presented on the preswitching current-voltage characteristics, the ‘forming’ or ‘firstfire’ process on virgin devices, and the switching operation of two chalcogenide alloys. The properties are given as a function of film thickness, temperature of operation, and preswitching heat treatment. Electron diffraction micrographs are used to illustrate the anneal phenomena and to emphasise that the microstructure so produced should be included in any model of switching in these materials.

Interpretation of steady-state surface photovoltage measurements in epitaxial semiconductor layers

Abstract: Analysis of the steady-state surface photovoltage (SPV) method of measuring minority carrier diffusion length ( L ) has been extended to the case of an epitaxial layer on a thick substrate. In layers with thickness greater than four diffusion lengths, the measurement yields the bulk value of L . For layers thinner than 0.5 L , the measured value is that of the substrate. For intermediate thicknesses, the bulk value of L can be estimated. The method also provides a sensitive means of observing the influence of surface conditions on the absorption characteristics of silicon.

The growth and properties of LPE GaAs

Abstract: Air leaks in the growth apparatus and impurities in the source material are the major sources of charged defect centers in LPE GaAs grown in rotary reactors from Ga solutions With perfected apparatus and purified source material the residual acceptor concentration in n -type layers is routinely 10 14 cm −3 or less Doping with Sn and Ge is studied and characterized by donor-acceptor partition ratios and segregation coefficients Theory and experiment are compared for the dependence of the mobility of electrons and holes on concentration at 77°K and 300°K for 3 × 10 13 cm −3 ⩾ n ⩾ 3 × 10 16 cm −3 and 10 15 cm −3 ⩽ p ⩽ 10 19 cm −3 Thickness and doping uniformity and reproducibility and surface morphology are characterized

Pn junctions in polycristalline-silicon films

Abstract: Junction diodes have been fabricated in chemically deposited polycrystalline-silicon films The current-voltage characteristics indicate the predominance of recombination-generation current Minority carrier lifetimes of about 2 × 10−11 sec and 2 × 10−10 sec have been measured in 2 and 8 μm-thick films, respectively The capacitance-voltage relation has been found to be frequency dependent The capacitance decreases more rapidly with voltage at higher frequencies, consistent with the inability of trapped carriers to respond to high-frequency excitation

Iterative scheme for computer simulation of semiconductor devices

Abstract: This paper describes a simple numerical method for the solution of the one-dimensional steady-state carrier-transport equations as they apply to semiconductor devices. The proposed method uses an implicit method in its treatment of the recombination-rate term in the continuity equations, rather than the explicit method employed by Gummel and De Mari. The method is particularly suited to the solution of problems involving heavy recombination, and it is shown that, in such cases, it is capable of yielding solutions which are unobtainable by using the Gummel-De Mari method.

A two-dimensional analysis of gallium arsenide junction field effect transistors with long and short channels

Abstract: A two-dimensional analysis of indium phosphide junction field effect transistors with long and short gates is presented. The two devices are shown to have properties similar to those of gallium arsenide JFETs. The short gate device has a negative resistance region at low drain voltages which is absent in the long gate device. The negative resistance region is determined by the distribution of the drift velocity along the conducting channel, and the resulting distribution of the electron charge. A field dependent mobility is used, and its effect on current saturation is discussed. The electrostatic charge distribution and electric field distribution are calculated for both devices, and are shown in graphic form.

On the post-injection voltage decay of p-s-n rectifiers at high injection levels

Abstract: The post-injection voltage decay of p+-s-n+ rectifiers is analysed at high carrier levels where the recombination in the heavily-doped end regions is significant. On interrupting the current, the drop in ohmic voltage is followed by a very rapid initial decay of the post-injection voltage, which becomes increasingly important with growing injection level. Hence the initial voltage drop appears larger than the ohmic voltage; from the post-injection voltage, values for the injected carriers concentration are obtained which are too small. The rapid initial decay is followed by a slow and almost linear decay for large base widths. The lifetime determined from this slow voltage decay portion can be equated to the carrier lifetime in the base for an important range of w/L (w base width, L diffusion length), although the recombination in the end regions may be significant. Hence in contrast to the method of stored charge, the post-injection voltage method is suited for a lifetime determination also at these high injection levels. Using the theory, measurements made by both methods are compared. in silicon, a high-level lifetime in the order of 10 μsec is observed to be independent of the injected carrier concentration up to 1017 cm−3.

Limitations in microelectronics — II. Bipolar technology☆

Abstract: The physical phenomena which will ultimately limit miniaturization of planar bipolar integrated circuits are examined. The maximum packing density is obtained by minimizing the supply voltage and the size of the devices. The minimum transistor size is determined by junction breakdown, punch through and doping fluctuations. For circuits that are fully active the maximum number of circuit functions per chip is determined by power dissipation. The packing density of read-only memories becomes limited by the area occupied by devices and interconnections. The limitations of MOS and bipolar technologies are compared. It is concluded that read-only memories will reach approximately the same performance and packing density with MOS and bipolar technologies, while fully active circuits will reach the highest levels of integration with dynamic MOS or complementary MOS technologies.

General transport theory of noise in pn junction-like devices—I. Three-dimensional Green's function formulation

Abstract: A general collective treatment of noise in three-dimensional junction devices of arbitrary geometry is presented, using Green's functions as in recent transport noise theories. The low-injection theory is extended to open-circuited devices. The density spectra are given in a form in which the volume part is linear in the Green's function and the covariance function, while the surface part is quadratic in the Green's function. The density covariance function for the short-circuited junction is Poissonian for low injection, except for a surface singularity. The noise input e.m.f and output current generator, as well as their cross correlation, are found directly for the hybrid transistor model and are expressed in the h ′ parameters, without the usual network transformation. The exact results indicate distributed effects; in particular, the current gain in the noise expressions (α noise ) is not equal to the small signal current gain α. The one-dimensional standard results are recovered in a lumped model approximation. For high injection, only the case of quasi band-band recombination (the Shockley-Read levels have equal capture probabilities for electrons and holes) is considered in this paper. The covariance function is then as for low injection but of half strength. The terminal noise depends, besides on the admittance or impedance and the current, on the emitter efficiency γ, the mobility ratio b , and the ratio of the junction admittance and the bulk admittance resulting from modulation effects. As a byproduct of this study, all pertinent network parameters are expressed in Green's functions.

Contact resistances of AuGeNi, AuZn and Al to III–V compounds

Abstract: The specific contact resistances of AuGe to n -type Al 0.4 Ga 0.6 As, GaAs 0.6 P 0.4 and GaP over a range of doping concentrations (∼ 10 17 −10 18 cm −3 ) have been measured. AuGeNi shows ohmic characteristics to these materials after heat treatment. The specific contact resistances of AuZn and Al to p -type Al 0.4 Ga 0.6 As, GaAs 0.6 P 0.4 and GaP with carrier concentration ∼ 2 × 10 19 cm −3 have also been investigated. AuZn contact is applicable to all three p -type materials but Al contact is only recommended to p -type GaAs 0.6 P 0.4 .

Specific contact resistance of ohmic contacts to gallium arsenide

Abstract: Values of specific contact resistance Rc have been obtained for Sn, Sn:Ag, and Au:Ge:Ni contacts to N-type gallium arsenide of resistivity 0.4 to 30 Ωcm. An approximate relationship R e ∝ 1 N , where N is the bulk carrier concentration, was shown to apply. The relationship between the value of Rc and the contact structure is discussed. It is pointed out, in particular, that Rc may be negative when its usual, phenomenological definition is used.

The lattice contraction coefficient of boron and phosphorus in silicon

Abstract: The aim of this work was to develop a method for determining the solute lattice contraction coefficient of boron and phosphorus in silicon. An expression was derived which relates the curvature of silicon slices, one surface of which has been diffused with boron or phosphorus, to the amount of diffused impurity. The expression can be written as t 2 ϱ =6β ∫ 0 ∞ C(y) d y where ρ is the radius of curvature, β is the lattice contraction coefficient, t is the thickness of the slice and C(y) is the impurity concentration as a function of depth of penetration. The slice curvatures were measured by an X-ray technique and the amounts of diffused impurity were determined from sheet resistance and junction depth measurements. A plot of t2/ϱ vs. the amount of diffused impurity gave a straight line from which the solute lattice contraction coefficient, β, was derived. The relationship was linear over the complete range of experimental values. Stress relief mechanisms, such as dislocations or precipitates, were not observed even at the highest concentrations. From the plots, the solute lattice contraction coefficient was calculated to be 5·2 × 10−24 cm3 atom−1 for boron and 1·0 × 10−24 cm3 atom−1 for phosphorus. These values are critically compared with other values, derived by different techniques, reported in the literature.

An accurate two-dimensional numerical analysis of the MOS transistor

Abstract: A two dimensional numerical analysis has been made for MOS transistors with both small and large values of channel lenghts and various bias conditions. Results are compared with a simplified analysis of the MOST and with experimental data obtained on devices. Detailed pictures of the free carriers density distribution and of the voltage distribution are presented for various channel lengths and two dimensional effects are clearly seen near the source and the drain that are very hardly accounted for in a simplified one dimensional analysis. Such a program seems to be a very powerful tool for device optimisation and physical understanding of the behaviour of very small devices used in complex circuits.

Threshold shift calculations for ion implanted MOS devices

Abstract: The solutions of Poisson's equation applicable to ion implanted MOS devices have been used to generate capacitance-voltage relationships for capacitors and threshold voltage shifts for transistors. The calculations agree well with previously published transistor data for profiles centered near Si-SiO 2 interface. These shallow implants ( μ m) are easily controlled by the gate and yield voltage shifts equal to that expected for all of the charge lumped at the silicon surface. In addition, the observed saturation of gate voltage shift for deeper implants in enhancement mode transistors can be duplicated by the calculations provided that the stopping power of SiO 2 is reduced as has been proposed elsewhere. Further, it has been predicted that gate control will be lost for depletion mode transistors with sufficiently deep implants. This is caused by the formation of a deep channel which is isolated from gate control by an induced surface charge layer. The inability of the gate field to pinch off the channel defeats device use for transistor inverter loads.

Thermionic saturation of diffusion currents in transistors

Abstract: Macroscopic diffusion theory is not applicable to large percentage variations in carrier concentration over distances comparable to a scattering path length. It is plausible that the transport velocity for thermionic emission over a barrier of zero height constitutes a limit on the velocity of diffusive current flow at any point in a bulk semiconductor. Not incorporating a thermionic limit, the drift-diffusion current transport equation cannot account for thermionic emission. While a full remedy to these difficulties can only lie in a complete investigation of the relevant statistical physics, we present herein an empirical modification of the current transport equation based on the elementary concept of thermionic saturation of the diffusion current. The modified equation appears capable of accounting, at least in a crude way, for thermionically limited current flow, while permitting a unified treatment of diffusion-drift-thermionic transport. For narrow base transistors (wb ∼ 1000 A), much larger ratios of stored base charge to collector current are predicted than from diffusion theory. A thermionic emission-diffusion equation is derived for barrier injection in floating base transistors biased into punch-through. It is found for silicon structures that transport is diffusion-drift dominated at base impurity concentrations < 1017 cm−3, and thermionically controlled at higher base doping. A possible small reduction in the thermionic Richardson constant by a factor ≲ e is also predicted from the diffusion saturation equation.